arch/arm/mach-omap2/board-flash.c

   1 /*
   2  * board-flash.c
   3  * Modified from mach-omap2/board-3430sdp-flash.c
   4  *
   5  * Copyright (C) 2009 Nokia Corporation
   6  * Copyright (C) 2009 Texas Instruments
   7  *
   8  * Vimal Singh <vimalsingh@ti.com>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/mtd/physmap.h>
  18 #include <linux/io.h>
  19
  20 #include <plat/cpu.h>
  21 #include <plat/gpmc.h>
  22 #include <linux/platform_data/mtd-nand-omap2.h>
  23 #include <linux/platform_data/mtd-onenand-omap2.h>
  24 #include <plat/tc.h>
  25
  26 #include "common.h"
  27 #include "board-flash.h"
  28
  29 #define REG_FPGA_REV                    0x10
  30 #define REG_FPGA_DIP_SWITCH_INPUT2      0x60
  31 #define MAX_SUPPORTED_GPMC_CONFIG       3
  32
  33 #define DEBUG_BASE              0x08000000 /* debug board */
  34
  35 /* various memory sizes */
  36 #define FLASH_SIZE_SDPV1        SZ_64M  /* NOR flash (64 Meg aligned) */
  37 #define FLASH_SIZE_SDPV2        SZ_128M /* NOR flash (256 Meg aligned) */
  38
  39 static struct physmap_flash_data board_nor_data = {
  40         .width          = 2,
  41 };
  42
  43 static struct resource board_nor_resource = {
  44         .flags          = IORESOURCE_MEM,
  45 };
  46
  47 static struct platform_device board_nor_device = {
  48         .name           = "physmap-flash",
  49         .id             = 0,
  50         .dev            = {
  51                         .platform_data = &board_nor_data,
  52         },
  53         .num_resources  = 1,
  54         .resource       = &board_nor_resource,
  55 };
  56
  57 static void
  58 __init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
  59 {
  60         int err;
  61
  62         board_nor_data.parts    = nor_parts;
  63         board_nor_data.nr_parts = nr_parts;
  64
  65         /* Configure start address and size of NOR device */
  66         if (omap_rev() >= OMAP3430_REV_ES1_0) {
  67                 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
  68                                 (unsigned long *)&board_nor_resource.start);
  69                 board_nor_resource.end = board_nor_resource.start
  70                                         + FLASH_SIZE_SDPV2 - 1;
  71         } else {
  72                 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
  73                                 (unsigned long *)&board_nor_resource.start);
  74                 board_nor_resource.end = board_nor_resource.start
  75                                         + FLASH_SIZE_SDPV1 - 1;
  76         }
  77         if (err < 0) {
  78                 pr_err("NOR: Can't request GPMC CS\n");
  79                 return;
  80         }
  81         if (platform_device_register(&board_nor_device) < 0)
  82                 pr_err("Unable to register NOR device\n");
  83 }
  84
  85 #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
  86                 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
  87 static struct omap_onenand_platform_data board_onenand_data = {
  88         .dma_channel    = -1,   /* disable DMA in OMAP OneNAND driver */
  89 };
  90
  91 void
  92 __init board_onenand_init(struct mtd_partition *onenand_parts,
  93                                 u8 nr_parts, u8 cs)
  94 {
  95         board_onenand_data.cs           = cs;
  96         board_onenand_data.parts        = onenand_parts;
  97         board_onenand_data.nr_parts     = nr_parts;
  98
  99         gpmc_onenand_init(&board_onenand_data);
 100 }
 101 #endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
 102
 103 #if defined(CONFIG_MTD_NAND_OMAP2) || \
 104                 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
 105
 106 /* Note that all values in this struct are in nanoseconds */
 107 static struct gpmc_timings nand_timings = {
 108
 109         .sync_clk = 0,
 110
 111         .cs_on = 0,
 112         .cs_rd_off = 36,
 113         .cs_wr_off = 36,
 114
 115         .adv_on = 6,
 116         .adv_rd_off = 24,
 117         .adv_wr_off = 36,
 118
 119         .we_off = 30,
 120         .oe_off = 48,
 121
 122         .access = 54,
 123         .rd_cycle = 72,
 124         .wr_cycle = 72,
 125
 126         .wr_access = 30,
 127         .wr_data_mux_bus = 0,
 128 };
 129
 130 static struct omap_nand_platform_data board_nand_data = {
 131         .gpmc_t         = &nand_timings,
 132 };
 133
 134 void
 135 __init board_nand_init(struct mtd_partition *nand_parts,
 136                         u8 nr_parts, u8 cs, int nand_type)
 137 {
 138         board_nand_data.cs              = cs;
 139         board_nand_data.parts           = nand_parts;
 140         board_nand_data.nr_parts        = nr_parts;
 141         board_nand_data.devsize         = nand_type;
 142
 143         board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
 144         gpmc_nand_init(&board_nand_data);
 145 }
 146 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
 147
 148 /**
 149  * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
 150  * the various cs values.
 151  */
 152 static u8 get_gpmc0_type(void)
 153 {
 154         u8 cs = 0;
 155         void __iomem *fpga_map_addr;
 156
 157         fpga_map_addr = ioremap(DEBUG_BASE, 4096);
 158         if (!fpga_map_addr)
 159                 return -ENOMEM;
 160
 161         if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
 162                 /* we dont have an DEBUG FPGA??? */
 163                 /* Depend on #defines!! default to strata boot return param */
 164                 goto unmap;
 165
 166         /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
 167         cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
 168
 169         /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
 170         if (omap_rev() >= OMAP3430_REV_ES1_0)
 171                 /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
 172                 cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
 173                         ((cs & 2) << 1) | ((cs & 1) << 3);
 174         else
 175                 /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
 176                 cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
 177 unmap:
 178         iounmap(fpga_map_addr);
 179         return cs;
 180 }
 181
 182 /**
 183  * board_flash_init - Identify devices connected to GPMC and register.
 184  *
 185  * @return - void.
 186  */
 187 void __init board_flash_init(struct flash_partitions partition_info[],
 188                         char chip_sel_board[][GPMC_CS_NUM], int nand_type)
 189 {
 190         u8              cs = 0;
 191         u8              norcs = GPMC_CS_NUM + 1;
 192         u8              nandcs = GPMC_CS_NUM + 1;
 193         u8              onenandcs = GPMC_CS_NUM + 1;
 194         u8              idx;
 195         unsigned char   *config_sel = NULL;
 196
 197         /* REVISIT: Is this return correct idx for 2430 SDP?
 198          * for which cs configuration matches for 2430 SDP?
 199          */
 200         idx = get_gpmc0_type();
 201         if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
 202                 pr_err("%s: Invalid chip select: %d\n", __func__, cs);
 203                 return;
 204         }
 205         config_sel = (unsigned char *)(chip_sel_board[idx]);
 206
 207         while (cs < GPMC_CS_NUM) {
 208                 switch (config_sel[cs]) {
 209                 case PDC_NOR:
 210                         if (norcs > GPMC_CS_NUM)
 211                                 norcs = cs;
 212                         break;
 213                 case PDC_NAND:
 214                         if (nandcs > GPMC_CS_NUM)
 215                                 nandcs = cs;
 216                         break;
 217                 case PDC_ONENAND:
 218                         if (onenandcs > GPMC_CS_NUM)
 219                                 onenandcs = cs;
 220                         break;
 221                 }
 222                 cs++;
 223         }
 224
 225         if (norcs > GPMC_CS_NUM)
 226                 pr_err("NOR: Unable to find configuration in GPMC\n");
 227         else
 228                 board_nor_init(partition_info[0].parts,
 229                                 partition_info[0].nr_parts, norcs);
 230
 231         if (onenandcs > GPMC_CS_NUM)
 232                 pr_err("OneNAND: Unable to find configuration in GPMC\n");
 233         else
 234                 board_onenand_init(partition_info[1].parts,
 235                                         partition_info[1].nr_parts, onenandcs);
 236
 237         if (nandcs > GPMC_CS_NUM)
 238                 pr_err("NAND: Unable to find configuration in GPMC\n");
 239         else
 240                 board_nand_init(partition_info[2].parts,
 241                         partition_info[2].nr_parts, nandcs, nand_type);
 242 }