1d8e926b52fe21c5b31d8e1579812e5b31f30400
[deliverable/linux.git] / arch / arm / mach-omap2 / board-omap3evm.c
1 /*
2 * linux/arch/arm/mach-omap2/board-omap3evm.c
3 *
4 * Copyright (C) 2008 Texas Instruments
5 *
6 * Modified from mach-omap2/board-3430sdp.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/err.h>
20 #include <linux/clk.h>
21 #include <linux/gpio.h>
22 #include <linux/input.h>
23 #include <linux/input/matrix_keypad.h>
24 #include <linux/leds.h>
25 #include <linux/interrupt.h>
26
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/partitions.h>
29 #include <linux/mtd/nand.h>
30
31 #include <linux/spi/spi.h>
32 #include <linux/spi/ads7846.h>
33 #include <linux/i2c/twl.h>
34 #include <linux/usb/otg.h>
35 #include <linux/usb/nop-usb-xceiv.h>
36 #include <linux/smsc911x.h>
37
38 #include <linux/wl12xx.h>
39 #include <linux/regulator/fixed.h>
40 #include <linux/regulator/machine.h>
41 #include <linux/mmc/host.h>
42 #include <linux/export.h>
43
44 #include <asm/mach-types.h>
45 #include <asm/mach/arch.h>
46 #include <asm/mach/map.h>
47
48 #include <plat/usb.h>
49 #include <linux/platform_data/mtd-nand-omap2.h>
50 #include "common.h"
51 #include <linux/platform_data/spi-omap2-mcspi.h>
52 #include <video/omapdss.h>
53 #include <video/omap-panel-tfp410.h>
54
55 #include "mux.h"
56 #include "sdram-micron-mt46h32m32lf-6.h"
57 #include "hsmmc.h"
58 #include "common-board-devices.h"
59 #include "board-flash.h"
60
61 #define NAND_CS 0
62
63 #define OMAP3_EVM_TS_GPIO 175
64 #define OMAP3_EVM_EHCI_VBUS 22
65 #define OMAP3_EVM_EHCI_SELECT 61
66
67 #define OMAP3EVM_ETHR_START 0x2c000000
68 #define OMAP3EVM_ETHR_SIZE 1024
69 #define OMAP3EVM_ETHR_ID_REV 0x50
70 #define OMAP3EVM_ETHR_GPIO_IRQ 176
71 #define OMAP3EVM_SMSC911X_CS 5
72 /*
73 * Eth Reset signal
74 * 64 = Generation 1 (<=RevD)
75 * 7 = Generation 2 (>=RevE)
76 */
77 #define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
78 #define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
79
80 /*
81 * OMAP35x EVM revision
82 * Run time detection of EVM revision is done by reading Ethernet
83 * PHY ID -
84 * GEN_1 = 0x01150000
85 * GEN_2 = 0x92200000
86 */
87 enum {
88 OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
89 OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
90 };
91
92 static u8 omap3_evm_version;
93
94 static u8 get_omap3_evm_rev(void)
95 {
96 return omap3_evm_version;
97 }
98
99 static void __init omap3_evm_get_revision(void)
100 {
101 void __iomem *ioaddr;
102 unsigned int smsc_id;
103
104 /* Ethernet PHY ID is stored at ID_REV register */
105 ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
106 if (!ioaddr)
107 return;
108 smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000;
109 iounmap(ioaddr);
110
111 switch (smsc_id) {
112 /*SMSC9115 chipset*/
113 case 0x01150000:
114 omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
115 break;
116 /*SMSC 9220 chipset*/
117 case 0x92200000:
118 default:
119 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
120 }
121 }
122
123 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
124 #include "gpmc-smsc911x.h"
125
126 static struct omap_smsc911x_platform_data smsc911x_cfg = {
127 .cs = OMAP3EVM_SMSC911X_CS,
128 .gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ,
129 .gpio_reset = -EINVAL,
130 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
131 };
132
133 static inline void __init omap3evm_init_smsc911x(void)
134 {
135 /* Configure ethernet controller reset gpio */
136 if (cpu_is_omap3430()) {
137 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
138 smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST;
139 else
140 smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
141 }
142
143 gpmc_smsc911x_init(&smsc911x_cfg);
144 }
145
146 #else
147 static inline void __init omap3evm_init_smsc911x(void) { return; }
148 #endif
149
150 /*
151 * OMAP3EVM LCD Panel control signals
152 */
153 #define OMAP3EVM_LCD_PANEL_LR 2
154 #define OMAP3EVM_LCD_PANEL_UD 3
155 #define OMAP3EVM_LCD_PANEL_INI 152
156 #define OMAP3EVM_LCD_PANEL_ENVDD 153
157 #define OMAP3EVM_LCD_PANEL_QVGA 154
158 #define OMAP3EVM_LCD_PANEL_RESB 155
159 #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210
160 #define OMAP3EVM_DVI_PANEL_EN_GPIO 199
161
162 static struct gpio omap3_evm_dss_gpios[] __initdata = {
163 { OMAP3EVM_LCD_PANEL_RESB, GPIOF_OUT_INIT_HIGH, "lcd_panel_resb" },
164 { OMAP3EVM_LCD_PANEL_INI, GPIOF_OUT_INIT_HIGH, "lcd_panel_ini" },
165 { OMAP3EVM_LCD_PANEL_QVGA, GPIOF_OUT_INIT_LOW, "lcd_panel_qvga" },
166 { OMAP3EVM_LCD_PANEL_LR, GPIOF_OUT_INIT_HIGH, "lcd_panel_lr" },
167 { OMAP3EVM_LCD_PANEL_UD, GPIOF_OUT_INIT_HIGH, "lcd_panel_ud" },
168 { OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, "lcd_panel_envdd" },
169 };
170
171 static int lcd_enabled;
172 static int dvi_enabled;
173
174 static void __init omap3_evm_display_init(void)
175 {
176 int r;
177
178 r = gpio_request_array(omap3_evm_dss_gpios,
179 ARRAY_SIZE(omap3_evm_dss_gpios));
180 if (r)
181 printk(KERN_ERR "failed to get lcd_panel_* gpios\n");
182 }
183
184 static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev)
185 {
186 if (dvi_enabled) {
187 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
188 return -EINVAL;
189 }
190 gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0);
191
192 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
193 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
194 else
195 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
196
197 lcd_enabled = 1;
198 return 0;
199 }
200
201 static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev)
202 {
203 gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1);
204
205 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
206 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
207 else
208 gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
209
210 lcd_enabled = 0;
211 }
212
213 static struct omap_dss_device omap3_evm_lcd_device = {
214 .name = "lcd",
215 .driver_name = "sharp_ls_panel",
216 .type = OMAP_DISPLAY_TYPE_DPI,
217 .phy.dpi.data_lines = 18,
218 .platform_enable = omap3_evm_enable_lcd,
219 .platform_disable = omap3_evm_disable_lcd,
220 };
221
222 static int omap3_evm_enable_tv(struct omap_dss_device *dssdev)
223 {
224 return 0;
225 }
226
227 static void omap3_evm_disable_tv(struct omap_dss_device *dssdev)
228 {
229 }
230
231 static struct omap_dss_device omap3_evm_tv_device = {
232 .name = "tv",
233 .driver_name = "venc",
234 .type = OMAP_DISPLAY_TYPE_VENC,
235 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
236 .platform_enable = omap3_evm_enable_tv,
237 .platform_disable = omap3_evm_disable_tv,
238 };
239
240 static struct tfp410_platform_data dvi_panel = {
241 .power_down_gpio = OMAP3EVM_DVI_PANEL_EN_GPIO,
242 };
243
244 static struct omap_dss_device omap3_evm_dvi_device = {
245 .name = "dvi",
246 .type = OMAP_DISPLAY_TYPE_DPI,
247 .driver_name = "tfp410",
248 .data = &dvi_panel,
249 .phy.dpi.data_lines = 24,
250 };
251
252 static struct omap_dss_device *omap3_evm_dss_devices[] = {
253 &omap3_evm_lcd_device,
254 &omap3_evm_tv_device,
255 &omap3_evm_dvi_device,
256 };
257
258 static struct omap_dss_board_info omap3_evm_dss_data = {
259 .num_devices = ARRAY_SIZE(omap3_evm_dss_devices),
260 .devices = omap3_evm_dss_devices,
261 .default_device = &omap3_evm_lcd_device,
262 };
263
264 static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
265 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
266 };
267
268 static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
269 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
270 };
271
272 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
273 static struct regulator_init_data omap3evm_vmmc1 = {
274 .constraints = {
275 .min_uV = 1850000,
276 .max_uV = 3150000,
277 .valid_modes_mask = REGULATOR_MODE_NORMAL
278 | REGULATOR_MODE_STANDBY,
279 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
280 | REGULATOR_CHANGE_MODE
281 | REGULATOR_CHANGE_STATUS,
282 },
283 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply),
284 .consumer_supplies = omap3evm_vmmc1_supply,
285 };
286
287 /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
288 static struct regulator_init_data omap3evm_vsim = {
289 .constraints = {
290 .min_uV = 1800000,
291 .max_uV = 3000000,
292 .valid_modes_mask = REGULATOR_MODE_NORMAL
293 | REGULATOR_MODE_STANDBY,
294 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
295 | REGULATOR_CHANGE_MODE
296 | REGULATOR_CHANGE_STATUS,
297 },
298 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply),
299 .consumer_supplies = omap3evm_vsim_supply,
300 };
301
302 static struct omap2_hsmmc_info mmc[] = {
303 {
304 .mmc = 1,
305 .caps = MMC_CAP_4_BIT_DATA,
306 .gpio_cd = -EINVAL,
307 .gpio_wp = 63,
308 .deferred = true,
309 },
310 #ifdef CONFIG_WL12XX_PLATFORM_DATA
311 {
312 .name = "wl1271",
313 .mmc = 2,
314 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
315 .gpio_wp = -EINVAL,
316 .gpio_cd = -EINVAL,
317 .nonremovable = true,
318 },
319 #endif
320 {} /* Terminator */
321 };
322
323 static struct gpio_led gpio_leds[] = {
324 {
325 .name = "omap3evm::ledb",
326 /* normally not visible (board underside) */
327 .default_trigger = "default-on",
328 .gpio = -EINVAL, /* gets replaced */
329 .active_low = true,
330 },
331 };
332
333 static struct gpio_led_platform_data gpio_led_info = {
334 .leds = gpio_leds,
335 .num_leds = ARRAY_SIZE(gpio_leds),
336 };
337
338 static struct platform_device leds_gpio = {
339 .name = "leds-gpio",
340 .id = -1,
341 .dev = {
342 .platform_data = &gpio_led_info,
343 },
344 };
345
346
347 static int omap3evm_twl_gpio_setup(struct device *dev,
348 unsigned gpio, unsigned ngpio)
349 {
350 int r, lcd_bl_en;
351
352 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
353 mmc[0].gpio_cd = gpio + 0;
354 omap_hsmmc_late_init(mmc);
355
356 /*
357 * Most GPIOs are for USB OTG. Some are mostly sent to
358 * the P2 connector; notably LEDA for the LCD backlight.
359 */
360
361 /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */
362 lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ?
363 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
364 r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL");
365 if (r)
366 printk(KERN_ERR "failed to get/set lcd_bkl gpio\n");
367
368 /* gpio + 7 == DVI Enable */
369 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
370
371 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
372 gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
373
374 platform_device_register(&leds_gpio);
375
376 /* Enable VBUS switch by setting TWL4030.GPIO2DIR as output
377 * for starting USB tranceiver
378 */
379 #ifdef CONFIG_TWL4030_CORE
380 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
381 u8 val;
382
383 twl_i2c_read_u8(TWL4030_MODULE_GPIO, &val, REG_GPIODATADIR1);
384 val |= 0x04; /* TWL4030.GPIO2DIR BIT at GPIODATADIR1(0x9B) */
385 twl_i2c_write_u8(TWL4030_MODULE_GPIO, val, REG_GPIODATADIR1);
386 }
387 #endif
388
389 return 0;
390 }
391
392 static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
393 .use_leds = true,
394 .setup = omap3evm_twl_gpio_setup,
395 };
396
397 static uint32_t board_keymap[] = {
398 KEY(0, 0, KEY_LEFT),
399 KEY(0, 1, KEY_DOWN),
400 KEY(0, 2, KEY_ENTER),
401 KEY(0, 3, KEY_M),
402
403 KEY(1, 0, KEY_RIGHT),
404 KEY(1, 1, KEY_UP),
405 KEY(1, 2, KEY_I),
406 KEY(1, 3, KEY_N),
407
408 KEY(2, 0, KEY_A),
409 KEY(2, 1, KEY_E),
410 KEY(2, 2, KEY_J),
411 KEY(2, 3, KEY_O),
412
413 KEY(3, 0, KEY_B),
414 KEY(3, 1, KEY_F),
415 KEY(3, 2, KEY_K),
416 KEY(3, 3, KEY_P)
417 };
418
419 static struct matrix_keymap_data board_map_data = {
420 .keymap = board_keymap,
421 .keymap_size = ARRAY_SIZE(board_keymap),
422 };
423
424 static struct twl4030_keypad_data omap3evm_kp_data = {
425 .keymap_data = &board_map_data,
426 .rows = 4,
427 .cols = 4,
428 .rep = 1,
429 };
430
431 /* ads7846 on SPI */
432 static struct regulator_consumer_supply omap3evm_vio_supply[] = {
433 REGULATOR_SUPPLY("vcc", "spi1.0"),
434 };
435
436 /* VIO for ads7846 */
437 static struct regulator_init_data omap3evm_vio = {
438 .constraints = {
439 .min_uV = 1800000,
440 .max_uV = 1800000,
441 .apply_uV = true,
442 .valid_modes_mask = REGULATOR_MODE_NORMAL
443 | REGULATOR_MODE_STANDBY,
444 .valid_ops_mask = REGULATOR_CHANGE_MODE
445 | REGULATOR_CHANGE_STATUS,
446 },
447 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply),
448 .consumer_supplies = omap3evm_vio_supply,
449 };
450
451 #ifdef CONFIG_WL12XX_PLATFORM_DATA
452
453 #define OMAP3EVM_WLAN_PMENA_GPIO (150)
454 #define OMAP3EVM_WLAN_IRQ_GPIO (149)
455
456 static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
457 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
458 };
459
460 /* VMMC2 for driving the WL12xx module */
461 static struct regulator_init_data omap3evm_vmmc2 = {
462 .constraints = {
463 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
464 },
465 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
466 .consumer_supplies = omap3evm_vmmc2_supply,
467 };
468
469 static struct fixed_voltage_config omap3evm_vwlan = {
470 .supply_name = "vwl1271",
471 .microvolts = 1800000, /* 1.80V */
472 .gpio = OMAP3EVM_WLAN_PMENA_GPIO,
473 .startup_delay = 70000, /* 70ms */
474 .enable_high = 1,
475 .enabled_at_boot = 0,
476 .init_data = &omap3evm_vmmc2,
477 };
478
479 static struct platform_device omap3evm_wlan_regulator = {
480 .name = "reg-fixed-voltage",
481 .id = 1,
482 .dev = {
483 .platform_data = &omap3evm_vwlan,
484 },
485 };
486
487 struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
488 .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
489 };
490 #endif
491
492 /* VAUX2 for USB */
493 static struct regulator_consumer_supply omap3evm_vaux2_supplies[] = {
494 REGULATOR_SUPPLY("VDD_CSIPHY1", "omap3isp"), /* OMAP ISP */
495 REGULATOR_SUPPLY("VDD_CSIPHY2", "omap3isp"), /* OMAP ISP */
496 REGULATOR_SUPPLY("hsusb1", "ehci-omap.0"),
497 REGULATOR_SUPPLY("vaux2", NULL),
498 };
499
500 static struct regulator_init_data omap3evm_vaux2 = {
501 .constraints = {
502 .min_uV = 2800000,
503 .max_uV = 2800000,
504 .apply_uV = true,
505 .valid_modes_mask = REGULATOR_MODE_NORMAL
506 | REGULATOR_MODE_STANDBY,
507 .valid_ops_mask = REGULATOR_CHANGE_MODE
508 | REGULATOR_CHANGE_STATUS,
509 },
510 .num_consumer_supplies = ARRAY_SIZE(omap3evm_vaux2_supplies),
511 .consumer_supplies = omap3evm_vaux2_supplies,
512 };
513
514 static struct twl4030_platform_data omap3evm_twldata = {
515 /* platform_data for children goes here */
516 .keypad = &omap3evm_kp_data,
517 .gpio = &omap3evm_gpio_data,
518 .vio = &omap3evm_vio,
519 .vmmc1 = &omap3evm_vmmc1,
520 .vsim = &omap3evm_vsim,
521 };
522
523 static int __init omap3_evm_i2c_init(void)
524 {
525 omap3_pmic_get_config(&omap3evm_twldata,
526 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
527 TWL_COMMON_PDATA_AUDIO,
528 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
529
530 omap3evm_twldata.vdac->constraints.apply_uV = true;
531 omap3evm_twldata.vpll2->constraints.apply_uV = true;
532
533 omap3_pmic_init("twl4030", &omap3evm_twldata);
534 omap_register_i2c_bus(2, 400, NULL, 0);
535 omap_register_i2c_bus(3, 400, NULL, 0);
536 return 0;
537 }
538
539 static struct usbhs_omap_board_data usbhs_bdata __initdata = {
540
541 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
542 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
543 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
544
545 .phy_reset = true,
546 /* PHY reset GPIO will be runtime programmed based on EVM version */
547 .reset_gpio_port[0] = -EINVAL,
548 .reset_gpio_port[1] = -EINVAL,
549 .reset_gpio_port[2] = -EINVAL
550 };
551
552 #ifdef CONFIG_OMAP_MUX
553 static struct omap_board_mux omap35x_board_mux[] __initdata = {
554 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
555 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
556 OMAP_PIN_OFF_WAKEUPENABLE),
557 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
558 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
559 OMAP_PIN_OFF_WAKEUPENABLE),
560 OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
561 OMAP_PIN_OFF_NONE),
562 OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
563 OMAP_PIN_OFF_NONE),
564 #ifdef CONFIG_WL12XX_PLATFORM_DATA
565 /* WLAN IRQ - GPIO 149 */
566 OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
567
568 /* WLAN POWER ENABLE - GPIO 150 */
569 OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
570
571 /* MMC2 SDIO pin muxes for WL12xx */
572 OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
573 OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
574 OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
575 OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
576 OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
577 OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
578 #endif
579 { .reg_offset = OMAP_MUX_TERMINATOR },
580 };
581
582 static struct omap_board_mux omap36x_board_mux[] __initdata = {
583 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
584 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
585 OMAP_PIN_OFF_WAKEUPENABLE),
586 OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
587 OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
588 OMAP_PIN_OFF_WAKEUPENABLE),
589 /* AM/DM37x EVM: DSS data bus muxed with sys_boot */
590 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
591 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
592 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
593 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
594 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
595 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
596 OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
597 OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
598 OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
599 OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
600 OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
601 OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
602 #ifdef CONFIG_WL12XX_PLATFORM_DATA
603 /* WLAN IRQ - GPIO 149 */
604 OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
605
606 /* WLAN POWER ENABLE - GPIO 150 */
607 OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
608
609 /* MMC2 SDIO pin muxes for WL12xx */
610 OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
611 OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
612 OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
613 OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
614 OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
615 OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
616 #endif
617
618 { .reg_offset = OMAP_MUX_TERMINATOR },
619 };
620 #else
621 #define omap35x_board_mux NULL
622 #define omap36x_board_mux NULL
623 #endif
624
625 static struct omap_musb_board_data musb_board_data = {
626 .interface_type = MUSB_INTERFACE_ULPI,
627 .mode = MUSB_OTG,
628 .power = 100,
629 };
630
631 static struct gpio omap3_evm_ehci_gpios[] __initdata = {
632 { OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" },
633 { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
634 };
635
636 static void __init omap3_evm_wl12xx_init(void)
637 {
638 #ifdef CONFIG_WL12XX_PLATFORM_DATA
639 int ret;
640
641 /* WL12xx WLAN Init */
642 omap3evm_wlan_data.irq = gpio_to_irq(OMAP3EVM_WLAN_IRQ_GPIO);
643 ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
644 if (ret)
645 pr_err("error setting wl12xx data: %d\n", ret);
646 ret = platform_device_register(&omap3evm_wlan_regulator);
647 if (ret)
648 pr_err("error registering wl12xx device: %d\n", ret);
649 #endif
650 }
651
652 static struct regulator_consumer_supply dummy_supplies[] = {
653 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
654 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
655 };
656
657 static struct mtd_partition omap3evm_nand_partitions[] = {
658 /* All the partition sizes are listed in terms of NAND block size */
659 {
660 .name = "X-Loader",
661 .offset = 0,
662 .size = 4*(SZ_128K),
663 .mask_flags = MTD_WRITEABLE
664 },
665 {
666 .name = "U-Boot",
667 .offset = MTDPART_OFS_APPEND,
668 .size = 14*(SZ_128K),
669 .mask_flags = MTD_WRITEABLE
670 },
671 {
672 .name = "U-Boot Env",
673 .offset = MTDPART_OFS_APPEND,
674 .size = 2*(SZ_128K)
675 },
676 {
677 .name = "Kernel",
678 .offset = MTDPART_OFS_APPEND,
679 .size = 40*(SZ_128K)
680 },
681 {
682 .name = "File system",
683 .size = MTDPART_SIZ_FULL,
684 .offset = MTDPART_OFS_APPEND,
685 },
686 };
687
688 static void __init omap3_evm_init(void)
689 {
690 struct omap_board_mux *obm;
691
692 omap3_evm_get_revision();
693 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
694
695 obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
696 omap3_mux_init(obm, OMAP_PACKAGE_CBB);
697
698 omap_mux_init_gpio(63, OMAP_PIN_INPUT);
699 omap_hsmmc_init(mmc);
700
701 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
702 omap3evm_twldata.vaux2 = &omap3evm_vaux2;
703
704 omap3_evm_i2c_init();
705
706 omap_display_init(&omap3_evm_dss_data);
707
708 omap_serial_init();
709 omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
710
711 /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
712 usb_nop_xceiv_register();
713
714 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
715 /* enable EHCI VBUS using GPIO22 */
716 omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP);
717 /* Select EHCI port on main board */
718 omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT,
719 OMAP_PIN_INPUT_PULLUP);
720 gpio_request_array(omap3_evm_ehci_gpios,
721 ARRAY_SIZE(omap3_evm_ehci_gpios));
722
723 /* setup EHCI phy reset config */
724 omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP);
725 usbhs_bdata.reset_gpio_port[1] = 21;
726
727 /* EVM REV >= E can supply 500mA with EXTVBUS programming */
728 musb_board_data.power = 500;
729 musb_board_data.extvbus = 1;
730 } else {
731 /* setup EHCI phy reset on MDC */
732 omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
733 usbhs_bdata.reset_gpio_port[1] = 135;
734 }
735 usb_musb_init(&musb_board_data);
736 usbhs_init(&usbhs_bdata);
737 board_nand_init(omap3evm_nand_partitions,
738 ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS,
739 NAND_BUSWIDTH_16, NULL);
740
741 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
742 omap3evm_init_smsc911x();
743 omap3_evm_display_init();
744 omap3_evm_wl12xx_init();
745 omap_twl4030_audio_init("omap3evm");
746 }
747
748 MACHINE_START(OMAP3EVM, "OMAP3 EVM")
749 /* Maintainer: Syed Mohammed Khasim - Texas Instruments */
750 .atag_offset = 0x100,
751 .reserve = omap_reserve,
752 .map_io = omap3_map_io,
753 .init_early = omap35xx_init_early,
754 .init_irq = omap3_init_irq,
755 .handle_irq = omap3_intc_handle_irq,
756 .init_machine = omap3_evm_init,
757 .init_late = omap35xx_init_late,
758 .timer = &omap3_timer,
759 .restart = omap_prcm_restart,
760 MACHINE_END
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