2 * linux/arch/arm/mach-omap2/clock.c
4 * Copyright (C) 2005-2008 Texas Instruments, Inc.
5 * Copyright (C) 2004-2010 Nokia Corporation
8 * Richard Woodruff <r-woodruff2@ti.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
17 #include <linux/kernel.h>
18 #include <linux/export.h>
19 #include <linux/list.h>
20 #include <linux/errno.h>
21 #include <linux/err.h>
22 #include <linux/delay.h>
23 #ifdef CONFIG_COMMON_CLK
24 #include <linux/clk-provider.h>
26 #include <linux/clk.h>
29 #include <linux/bitops.h>
34 #include <trace/events/power.h>
37 #include "clockdomain.h"
42 #include "cm-regbits-24xx.h"
43 #include "cm-regbits-34xx.h"
47 * MAX_MODULE_ENABLE_WAIT: maximum of number of microseconds to wait
48 * for a module to indicate that it is no longer in idle
50 #define MAX_MODULE_ENABLE_WAIT 100000
55 * clkdm_control: if true, then when a clock is enabled in the
56 * hardware, its clockdomain will first be enabled; and when a clock
57 * is disabled in the hardware, its clockdomain will be disabled
60 static bool clkdm_control
= true;
62 static LIST_HEAD(clocks
);
63 static DEFINE_MUTEX(clocks_mutex
);
64 #ifndef CONFIG_COMMON_CLK
65 static DEFINE_SPINLOCK(clockfw_lock
);
68 #ifdef CONFIG_COMMON_CLK
69 static LIST_HEAD(clk_hw_omap_clocks
);
72 * Used for clocks that have the same value as the parent clock,
73 * divided by some factor
75 unsigned long omap_fixed_divisor_recalc(struct clk_hw
*hw
,
76 unsigned long parent_rate
)
78 struct clk_hw_omap
*oclk
;
81 pr_warn("%s: hw is NULL\n", __func__
);
85 oclk
= to_clk_hw_omap(hw
);
87 WARN_ON(!oclk
->fixed_div
);
89 return parent_rate
/ oclk
->fixed_div
;
94 * OMAP2+ specific clock functions
97 /* Private functions */
101 * _wait_idlest_generic - wait for a module to leave the idle state
102 * @reg: virtual address of module IDLEST register
103 * @mask: value to mask against to determine if the module is active
104 * @idlest: idle state indicator (0 or 1) for the clock
105 * @name: name of the clock (for printk)
107 * Wait for a module to leave idle, where its idle-status register is
108 * not inside the CM module. Returns 1 if the module left idle
109 * promptly, or 0 if the module did not leave idle before the timeout
110 * elapsed. XXX Deprecated - should be moved into drivers for the
111 * individual IP block that the IDLEST register exists in.
113 static int _wait_idlest_generic(void __iomem
*reg
, u32 mask
, u8 idlest
,
118 ena
= (idlest
) ? 0 : mask
;
120 omap_test_timeout(((__raw_readl(reg
) & mask
) == ena
),
121 MAX_MODULE_ENABLE_WAIT
, i
);
123 if (i
< MAX_MODULE_ENABLE_WAIT
)
124 pr_debug("omap clock: module associated with clock %s ready after %d loops\n",
127 pr_err("omap clock: module associated with clock %s didn't enable in %d tries\n",
128 name
, MAX_MODULE_ENABLE_WAIT
);
130 return (i
< MAX_MODULE_ENABLE_WAIT
) ? 1 : 0;
134 * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE
135 * @clk: struct clk * belonging to the module
137 * If the necessary clocks for the OMAP hardware IP block that
138 * corresponds to clock @clk are enabled, then wait for the module to
139 * indicate readiness (i.e., to leave IDLE). This code does not
140 * belong in the clock code and will be moved in the medium term to
141 * module-dependent code. No return value.
143 #ifdef CONFIG_COMMON_CLK
144 static void _omap2_module_wait_ready(struct clk_hw_omap
*clk
)
146 static void _omap2_module_wait_ready(struct clk
*clk
)
149 void __iomem
*companion_reg
, *idlest_reg
;
150 u8 other_bit
, idlest_bit
, idlest_val
, idlest_reg_id
;
154 /* Not all modules have multiple clocks that their IDLEST depends on */
155 if (clk
->ops
->find_companion
) {
156 clk
->ops
->find_companion(clk
, &companion_reg
, &other_bit
);
157 if (!(__raw_readl(companion_reg
) & (1 << other_bit
)))
161 clk
->ops
->find_idlest(clk
, &idlest_reg
, &idlest_bit
, &idlest_val
);
162 r
= cm_split_idlest_reg(idlest_reg
, &prcm_mod
, &idlest_reg_id
);
164 /* IDLEST register not in the CM module */
165 _wait_idlest_generic(idlest_reg
, (1 << idlest_bit
), idlest_val
,
166 #ifdef CONFIG_COMMON_CLK
167 __clk_get_name(clk
->hw
.clk
));
172 cm_wait_module_ready(prcm_mod
, idlest_reg_id
, idlest_bit
);
176 /* Public functions */
179 * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk
180 * @clk: OMAP clock struct ptr to use
182 * Convert a clockdomain name stored in a struct clk 'clk' into a
183 * clockdomain pointer, and save it into the struct clk. Intended to be
184 * called during clk_register(). No return value.
186 #ifdef CONFIG_COMMON_CLK
187 void omap2_init_clk_clkdm(struct clk_hw
*hw
)
189 struct clk_hw_omap
*clk
= to_clk_hw_omap(hw
);
191 void omap2_init_clk_clkdm(struct clk
*clk
)
194 struct clockdomain
*clkdm
;
195 const char *clk_name
;
197 if (!clk
->clkdm_name
)
200 #ifdef CONFIG_COMMON_CLK
201 clk_name
= __clk_get_name(hw
->clk
);
203 clk_name
= __clk_get_name(clk
);
206 clkdm
= clkdm_lookup(clk
->clkdm_name
);
208 pr_debug("clock: associated clk %s to clkdm %s\n",
209 clk_name
, clk
->clkdm_name
);
212 pr_debug("clock: could not associate clk %s to clkdm %s\n",
213 clk_name
, clk
->clkdm_name
);
218 * omap2_clk_disable_clkdm_control - disable clkdm control on clk enable/disable
220 * Prevent the OMAP clock code from calling into the clockdomain code
221 * when a hardware clock in that clockdomain is enabled or disabled.
222 * Intended to be called at init time from omap*_clk_init(). No
225 void __init
omap2_clk_disable_clkdm_control(void)
227 clkdm_control
= false;
231 * omap2_clk_dflt_find_companion - find companion clock to @clk
232 * @clk: struct clk * to find the companion clock of
233 * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
234 * @other_bit: u8 ** to return the companion clock bit shift in
236 * Note: We don't need special code here for INVERT_ENABLE for the
237 * time being since INVERT_ENABLE only applies to clocks enabled by
240 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes it's
241 * just a matter of XORing the bits.
243 * Some clocks don't have companion clocks. For example, modules with
244 * only an interface clock (such as MAILBOXES) don't have a companion
245 * clock. Right now, this code relies on the hardware exporting a bit
246 * in the correct companion register that indicates that the
247 * nonexistent 'companion clock' is active. Future patches will
248 * associate this type of code with per-module data structures to
249 * avoid this issue, and remove the casts. No return value.
251 #ifdef CONFIG_COMMON_CLK
252 void omap2_clk_dflt_find_companion(struct clk_hw_omap
*clk
,
254 void omap2_clk_dflt_find_companion(struct clk
*clk
,
256 void __iomem
**other_reg
, u8
*other_bit
)
261 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes
262 * it's just a matter of XORing the bits.
264 r
= ((__force u32
)clk
->enable_reg
^ (CM_FCLKEN
^ CM_ICLKEN
));
266 *other_reg
= (__force
void __iomem
*)r
;
267 *other_bit
= clk
->enable_bit
;
271 * omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk
272 * @clk: struct clk * to find IDLEST info for
273 * @idlest_reg: void __iomem ** to return the CM_IDLEST va in
274 * @idlest_bit: u8 * to return the CM_IDLEST bit shift in
275 * @idlest_val: u8 * to return the idle status indicator
277 * Return the CM_IDLEST register address and bit shift corresponding
278 * to the module that "owns" this clock. This default code assumes
279 * that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that
280 * the IDLEST register address ID corresponds to the CM_*CLKEN
281 * register address ID (e.g., that CM_FCLKEN2 corresponds to
282 * CM_IDLEST2). This is not true for all modules. No return value.
284 #ifdef CONFIG_COMMON_CLK
285 void omap2_clk_dflt_find_idlest(struct clk_hw_omap
*clk
,
287 void omap2_clk_dflt_find_idlest(struct clk
*clk
,
289 void __iomem
**idlest_reg
, u8
*idlest_bit
, u8
*idlest_val
)
293 r
= (((__force u32
)clk
->enable_reg
& ~0xf0) | 0x20);
294 *idlest_reg
= (__force
void __iomem
*)r
;
295 *idlest_bit
= clk
->enable_bit
;
298 * 24xx uses 0 to indicate not ready, and 1 to indicate ready.
299 * 34xx reverses this, just to keep us on our toes
300 * AM35xx uses both, depending on the module.
302 if (cpu_is_omap24xx())
303 *idlest_val
= OMAP24XX_CM_IDLEST_VAL
;
304 else if (cpu_is_omap34xx())
305 *idlest_val
= OMAP34XX_CM_IDLEST_VAL
;
311 #ifdef CONFIG_COMMON_CLK
313 * omap2_dflt_clk_enable - enable a clock in the hardware
314 * @hw: struct clk_hw * of the clock to enable
316 * Enable the clock @hw in the hardware. We first call into the OMAP
317 * clockdomain code to "enable" the corresponding clockdomain if this
318 * is the first enabled user of the clockdomain. Then program the
319 * hardware to enable the clock. Then wait for the IP block that uses
320 * this clock to leave idle (if applicable). Returns the error value
321 * from clkdm_clk_enable() if it terminated with an error, or -EINVAL
322 * if @hw has a null clock enable_reg, or zero upon success.
324 int omap2_dflt_clk_enable(struct clk_hw
*hw
)
326 struct clk_hw_omap
*clk
;
330 clk
= to_clk_hw_omap(hw
);
332 if (clkdm_control
&& clk
->clkdm
) {
333 ret
= clkdm_clk_enable(clk
->clkdm
, hw
->clk
);
335 WARN(1, "%s: could not enable %s's clockdomain %s: %d\n",
336 __func__
, __clk_get_name(hw
->clk
),
337 clk
->clkdm
->name
, ret
);
342 if (unlikely(clk
->enable_reg
== NULL
)) {
343 pr_err("%s: %s missing enable_reg\n", __func__
,
344 __clk_get_name(hw
->clk
));
349 /* FIXME should not have INVERT_ENABLE bit here */
350 v
= __raw_readl(clk
->enable_reg
);
351 if (clk
->flags
& INVERT_ENABLE
)
352 v
&= ~(1 << clk
->enable_bit
);
354 v
|= (1 << clk
->enable_bit
);
355 __raw_writel(v
, clk
->enable_reg
);
356 v
= __raw_readl(clk
->enable_reg
); /* OCP barrier */
358 if (clk
->ops
&& clk
->ops
->find_idlest
)
359 _omap2_module_wait_ready(clk
);
364 if (clkdm_control
&& clk
->clkdm
)
365 clkdm_clk_disable(clk
->clkdm
, hw
->clk
);
370 * omap2_dflt_clk_disable - disable a clock in the hardware
371 * @hw: struct clk_hw * of the clock to disable
373 * Disable the clock @hw in the hardware, and call into the OMAP
374 * clockdomain code to "disable" the corresponding clockdomain if all
375 * clocks/hwmods in that clockdomain are now disabled. No return
378 void omap2_dflt_clk_disable(struct clk_hw
*hw
)
380 struct clk_hw_omap
*clk
;
383 clk
= to_clk_hw_omap(hw
);
384 if (!clk
->enable_reg
) {
386 * 'independent' here refers to a clock which is not
387 * controlled by its parent.
389 pr_err("%s: independent clock %s has no enable_reg\n",
390 __func__
, __clk_get_name(hw
->clk
));
394 v
= __raw_readl(clk
->enable_reg
);
395 if (clk
->flags
& INVERT_ENABLE
)
396 v
|= (1 << clk
->enable_bit
);
398 v
&= ~(1 << clk
->enable_bit
);
399 __raw_writel(v
, clk
->enable_reg
);
400 /* No OCP barrier needed here since it is a disable operation */
402 if (clkdm_control
&& clk
->clkdm
)
403 clkdm_clk_disable(clk
->clkdm
, hw
->clk
);
407 * omap2_clkops_enable_clkdm - increment usecount on clkdm of @hw
408 * @hw: struct clk_hw * of the clock being enabled
410 * Increment the usecount of the clockdomain of the clock pointed to
411 * by @hw; if the usecount is 1, the clockdomain will be "enabled."
412 * Only needed for clocks that don't use omap2_dflt_clk_enable() as
413 * their enable function pointer. Passes along the return value of
414 * clkdm_clk_enable(), -EINVAL if @hw is not associated with a
415 * clockdomain, or 0 if clock framework-based clockdomain control is
418 int omap2_clkops_enable_clkdm(struct clk_hw
*hw
)
420 struct clk_hw_omap
*clk
;
423 clk
= to_clk_hw_omap(hw
);
425 if (unlikely(!clk
->clkdm
)) {
426 pr_err("%s: %s: no clkdm set ?!\n", __func__
,
427 __clk_get_name(hw
->clk
));
431 if (unlikely(clk
->enable_reg
))
432 pr_err("%s: %s: should use dflt_clk_enable ?!\n", __func__
,
433 __clk_get_name(hw
->clk
));
435 if (!clkdm_control
) {
436 pr_err("%s: %s: clkfw-based clockdomain control disabled ?!\n",
437 __func__
, __clk_get_name(hw
->clk
));
441 ret
= clkdm_clk_enable(clk
->clkdm
, hw
->clk
);
442 WARN(ret
, "%s: could not enable %s's clockdomain %s: %d\n",
443 __func__
, __clk_get_name(hw
->clk
), clk
->clkdm
->name
, ret
);
449 * omap2_clkops_disable_clkdm - decrement usecount on clkdm of @hw
450 * @hw: struct clk_hw * of the clock being disabled
452 * Decrement the usecount of the clockdomain of the clock pointed to
453 * by @hw; if the usecount is 0, the clockdomain will be "disabled."
454 * Only needed for clocks that don't use omap2_dflt_clk_disable() as their
455 * disable function pointer. No return value.
457 void omap2_clkops_disable_clkdm(struct clk_hw
*hw
)
459 struct clk_hw_omap
*clk
;
461 clk
= to_clk_hw_omap(hw
);
463 if (unlikely(!clk
->clkdm
)) {
464 pr_err("%s: %s: no clkdm set ?!\n", __func__
,
465 __clk_get_name(hw
->clk
));
469 if (unlikely(clk
->enable_reg
))
470 pr_err("%s: %s: should use dflt_clk_disable ?!\n", __func__
,
471 __clk_get_name(hw
->clk
));
473 if (!clkdm_control
) {
474 pr_err("%s: %s: clkfw-based clockdomain control disabled ?!\n",
475 __func__
, __clk_get_name(hw
->clk
));
479 clkdm_clk_disable(clk
->clkdm
, hw
->clk
);
483 * omap2_dflt_clk_is_enabled - is clock enabled in the hardware?
484 * @hw: struct clk_hw * to check
486 * Return 1 if the clock represented by @hw is enabled in the
487 * hardware, or 0 otherwise. Intended for use in the struct
488 * clk_ops.is_enabled function pointer.
490 int omap2_dflt_clk_is_enabled(struct clk_hw
*hw
)
492 struct clk_hw_omap
*clk
= to_clk_hw_omap(hw
);
495 v
= __raw_readl(clk
->enable_reg
);
497 if (clk
->flags
& INVERT_ENABLE
)
498 v
^= BIT(clk
->enable_bit
);
500 v
&= BIT(clk
->enable_bit
);
505 static int __initdata mpurate
;
508 * By default we use the rate set by the bootloader.
509 * You can override this with mpurate= cmdline option.
511 static int __init
omap_clk_setup(char *str
)
513 get_option(&str
, &mpurate
);
523 __setup("mpurate=", omap_clk_setup
);
526 * omap2_init_clk_hw_omap_clocks - initialize an OMAP clock
527 * @clk: struct clk * to initialize
529 * Add an OMAP clock @clk to the internal list of OMAP clocks. Used
530 * temporarily for autoidle handling, until this support can be
531 * integrated into the common clock framework code in some way. No
534 void omap2_init_clk_hw_omap_clocks(struct clk
*clk
)
536 struct clk_hw_omap
*c
;
538 if (__clk_get_flags(clk
) & CLK_IS_BASIC
)
541 c
= to_clk_hw_omap(__clk_get_hw(clk
));
542 list_add(&c
->node
, &clk_hw_omap_clocks
);
546 * omap2_clk_enable_autoidle_all - enable autoidle on all OMAP clocks that
549 * Enable clock autoidle on all OMAP clocks that have allow_idle
550 * function pointers associated with them. This function is intended
551 * to be temporary until support for this is added to the common clock
554 int omap2_clk_enable_autoidle_all(void)
556 struct clk_hw_omap
*c
;
558 list_for_each_entry(c
, &clk_hw_omap_clocks
, node
)
559 if (c
->ops
&& c
->ops
->allow_idle
)
560 c
->ops
->allow_idle(c
);
565 * omap2_clk_disable_autoidle_all - disable autoidle on all OMAP clocks that
568 * Disable clock autoidle on all OMAP clocks that have allow_idle
569 * function pointers associated with them. This function is intended
570 * to be temporary until support for this is added to the common clock
573 int omap2_clk_disable_autoidle_all(void)
575 struct clk_hw_omap
*c
;
577 list_for_each_entry(c
, &clk_hw_omap_clocks
, node
)
578 if (c
->ops
&& c
->ops
->deny_idle
)
579 c
->ops
->deny_idle(c
);
584 * omap2_clk_enable_init_clocks - prepare & enable a list of clocks
585 * @clk_names: ptr to an array of strings of clock names to enable
586 * @num_clocks: number of clock names in @clk_names
588 * Prepare and enable a list of clocks, named by @clk_names. No
589 * return value. XXX Deprecated; only needed until these clocks are
590 * properly claimed and enabled by the drivers or core code that uses
591 * them. XXX What code disables & calls clk_put on these clocks?
593 void omap2_clk_enable_init_clocks(const char **clk_names
, u8 num_clocks
)
595 struct clk
*init_clk
;
598 for (i
= 0; i
< num_clocks
; i
++) {
599 init_clk
= clk_get(NULL
, clk_names
[i
]);
600 clk_prepare_enable(init_clk
);
604 const struct clk_hw_omap_ops clkhwops_wait
= {
605 .find_idlest
= omap2_clk_dflt_find_idlest
,
606 .find_companion
= omap2_clk_dflt_find_companion
,
609 int omap2_dflt_clk_enable(struct clk
*clk
)
613 if (unlikely(clk
->enable_reg
== NULL
)) {
614 pr_err("clock.c: Enable for %s without enable code\n",
616 return 0; /* REVISIT: -EINVAL */
619 v
= __raw_readl(clk
->enable_reg
);
620 if (clk
->flags
& INVERT_ENABLE
)
621 v
&= ~(1 << clk
->enable_bit
);
623 v
|= (1 << clk
->enable_bit
);
624 __raw_writel(v
, clk
->enable_reg
);
625 v
= __raw_readl(clk
->enable_reg
); /* OCP barrier */
627 if (clk
->ops
->find_idlest
)
628 _omap2_module_wait_ready(clk
);
633 void omap2_dflt_clk_disable(struct clk
*clk
)
637 if (!clk
->enable_reg
) {
639 * 'Independent' here refers to a clock which is not
640 * controlled by its parent.
642 pr_err("clock: clk_disable called on independent clock %s which has no enable_reg\n", clk
->name
);
646 v
= __raw_readl(clk
->enable_reg
);
647 if (clk
->flags
& INVERT_ENABLE
)
648 v
|= (1 << clk
->enable_bit
);
650 v
&= ~(1 << clk
->enable_bit
);
651 __raw_writel(v
, clk
->enable_reg
);
652 /* No OCP barrier needed here since it is a disable operation */
655 const struct clkops clkops_omap2_dflt_wait
= {
656 .enable
= omap2_dflt_clk_enable
,
657 .disable
= omap2_dflt_clk_disable
,
658 .find_companion
= omap2_clk_dflt_find_companion
,
659 .find_idlest
= omap2_clk_dflt_find_idlest
,
662 const struct clkops clkops_omap2_dflt
= {
663 .enable
= omap2_dflt_clk_enable
,
664 .disable
= omap2_dflt_clk_disable
,
668 * omap2_clk_disable - disable a clock, if the system is not using it
669 * @clk: struct clk * to disable
671 * Decrements the usecount on struct clk @clk. If there are no users
672 * left, call the clkops-specific clock disable function to disable it
673 * in hardware. If the clock is part of a clockdomain (which they all
674 * should be), request that the clockdomain be disabled. (It too has
675 * a usecount, and so will not be disabled in the hardware until it no
676 * longer has any users.) If the clock has a parent clock (most of
677 * them do), then call ourselves, recursing on the parent clock. This
678 * can cause an entire branch of the clock tree to be powered off by
679 * simply disabling one clock. Intended to be called with the clockfw_lock
680 * spinlock held. No return value.
682 void omap2_clk_disable(struct clk
*clk
)
684 if (clk
->usecount
== 0) {
685 WARN(1, "clock: %s: omap2_clk_disable() called, but usecount already 0?", clk
->name
);
689 pr_debug("clock: %s: decrementing usecount\n", clk
->name
);
693 if (clk
->usecount
> 0)
696 pr_debug("clock: %s: disabling in hardware\n", clk
->name
);
698 if (clk
->ops
&& clk
->ops
->disable
) {
699 trace_clock_disable(clk
->name
, 0, smp_processor_id());
700 clk
->ops
->disable(clk
);
703 if (clkdm_control
&& clk
->clkdm
)
704 clkdm_clk_disable(clk
->clkdm
, clk
);
707 omap2_clk_disable(clk
->parent
);
711 * omap2_clk_enable - request that the system enable a clock
712 * @clk: struct clk * to enable
714 * Increments the usecount on struct clk @clk. If there were no users
715 * previously, then recurse up the clock tree, enabling all of the
716 * clock's parents and all of the parent clockdomains, and finally,
717 * enabling @clk's clockdomain, and @clk itself. Intended to be
718 * called with the clockfw_lock spinlock held. Returns 0 upon success
719 * or a negative error code upon failure.
721 int omap2_clk_enable(struct clk
*clk
)
725 pr_debug("clock: %s: incrementing usecount\n", clk
->name
);
729 if (clk
->usecount
> 1)
732 pr_debug("clock: %s: enabling in hardware\n", clk
->name
);
735 ret
= omap2_clk_enable(clk
->parent
);
737 WARN(1, "clock: %s: could not enable parent %s: %d\n",
738 clk
->name
, clk
->parent
->name
, ret
);
743 if (clkdm_control
&& clk
->clkdm
) {
744 ret
= clkdm_clk_enable(clk
->clkdm
, clk
);
746 WARN(1, "clock: %s: could not enable clockdomain %s: %d\n",
747 clk
->name
, clk
->clkdm
->name
, ret
);
752 if (clk
->ops
&& clk
->ops
->enable
) {
753 trace_clock_enable(clk
->name
, 1, smp_processor_id());
754 ret
= clk
->ops
->enable(clk
);
756 WARN(1, "clock: %s: could not enable: %d\n",
765 if (clkdm_control
&& clk
->clkdm
)
766 clkdm_clk_disable(clk
->clkdm
, clk
);
769 omap2_clk_disable(clk
->parent
);
776 /* Given a clock and a rate apply a clock specific rounding function */
777 long omap2_clk_round_rate(struct clk
*clk
, unsigned long rate
)
780 return clk
->round_rate(clk
, rate
);
785 /* Set the clock rate for a clock source */
786 int omap2_clk_set_rate(struct clk
*clk
, unsigned long rate
)
790 pr_debug("clock: set_rate for clock %s to rate %ld\n", clk
->name
, rate
);
792 /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */
794 trace_clock_set_rate(clk
->name
, rate
, smp_processor_id());
795 ret
= clk
->set_rate(clk
, rate
);
801 int omap2_clk_set_parent(struct clk
*clk
, struct clk
*new_parent
)
806 if (clk
->parent
== new_parent
)
809 return omap2_clksel_set_parent(clk
, new_parent
);
813 * OMAP2+ clock reset and init functions
816 #ifdef CONFIG_OMAP_RESET_CLOCKS
817 void omap2_clk_disable_unused(struct clk
*clk
)
821 v
= (clk
->flags
& INVERT_ENABLE
) ? (1 << clk
->enable_bit
) : 0;
823 regval32
= __raw_readl(clk
->enable_reg
);
824 if ((regval32
& (1 << clk
->enable_bit
)) == v
)
827 pr_debug("Disabling unused clock \"%s\"\n", clk
->name
);
828 if (cpu_is_omap34xx()) {
829 omap2_clk_enable(clk
);
830 omap2_clk_disable(clk
);
832 clk
->ops
->disable(clk
);
834 if (clk
->clkdm
!= NULL
)
835 pwrdm_state_switch(clk
->clkdm
->pwrdm
.ptr
);
839 #endif /* CONFIG_COMMON_CLK */
842 * omap2_clk_switch_mpurate_at_boot - switch ARM MPU rate by boot-time argument
843 * @mpurate_ck_name: clk name of the clock to change rate
845 * Change the ARM MPU clock rate to the rate specified on the command
846 * line, if one was specified. @mpurate_ck_name should be
847 * "virt_prcm_set" on OMAP2xxx and "dpll1_ck" on OMAP34xx/OMAP36xx.
848 * XXX Does not handle voltage scaling - on OMAP2xxx this is currently
849 * handled by the virt_prcm_set clock, but this should be handled by
850 * the OPP layer. XXX This is intended to be handled by the OPP layer
851 * code in the near future and should be removed from the clock code.
852 * Returns -EINVAL if 'mpurate' is zero or if clk_set_rate() rejects
853 * the rate, -ENOENT if the struct clk referred to by @mpurate_ck_name
854 * cannot be found, or 0 upon success.
856 int __init
omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name
)
858 struct clk
*mpurate_ck
;
864 mpurate_ck
= clk_get(NULL
, mpurate_ck_name
);
865 if (WARN(IS_ERR(mpurate_ck
), "Failed to get %s.\n", mpurate_ck_name
))
868 r
= clk_set_rate(mpurate_ck
, mpurate
);
869 if (IS_ERR_VALUE(r
)) {
870 WARN(1, "clock: %s: unable to set MPU rate to %d: %d\n",
871 mpurate_ck_name
, mpurate
, r
);
877 #ifndef CONFIG_COMMON_CLK
878 recalculate_root_clocks();
887 * omap2_clk_print_new_rates - print summary of current clock tree rates
888 * @hfclkin_ck_name: clk name for the off-chip HF oscillator
889 * @core_ck_name: clk name for the on-chip CORE_CLK
890 * @mpu_ck_name: clk name for the ARM MPU clock
892 * Prints a short message to the console with the HFCLKIN oscillator
893 * rate, the rate of the CORE clock, and the rate of the ARM MPU clock.
894 * Called by the boot-time MPU rate switching code. XXX This is intended
895 * to be handled by the OPP layer code in the near future and should be
896 * removed from the clock code. No return value.
898 void __init
omap2_clk_print_new_rates(const char *hfclkin_ck_name
,
899 const char *core_ck_name
,
900 const char *mpu_ck_name
)
902 struct clk
*hfclkin_ck
, *core_ck
, *mpu_ck
;
903 unsigned long hfclkin_rate
;
905 mpu_ck
= clk_get(NULL
, mpu_ck_name
);
906 if (WARN(IS_ERR(mpu_ck
), "clock: failed to get %s.\n", mpu_ck_name
))
909 core_ck
= clk_get(NULL
, core_ck_name
);
910 if (WARN(IS_ERR(core_ck
), "clock: failed to get %s.\n", core_ck_name
))
913 hfclkin_ck
= clk_get(NULL
, hfclkin_ck_name
);
914 if (WARN(IS_ERR(hfclkin_ck
), "Failed to get %s.\n", hfclkin_ck_name
))
917 hfclkin_rate
= clk_get_rate(hfclkin_ck
);
919 pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
920 (hfclkin_rate
/ 1000000), ((hfclkin_rate
/ 100000) % 10),
921 (clk_get_rate(core_ck
) / 1000000),
922 (clk_get_rate(mpu_ck
) / 1000000));
925 #ifndef CONFIG_COMMON_CLK
927 int clk_enable(struct clk
*clk
)
932 if (clk
== NULL
|| IS_ERR(clk
))
935 spin_lock_irqsave(&clockfw_lock
, flags
);
936 ret
= omap2_clk_enable(clk
);
937 spin_unlock_irqrestore(&clockfw_lock
, flags
);
941 EXPORT_SYMBOL(clk_enable
);
943 void clk_disable(struct clk
*clk
)
947 if (clk
== NULL
|| IS_ERR(clk
))
950 spin_lock_irqsave(&clockfw_lock
, flags
);
951 if (clk
->usecount
== 0) {
952 pr_err("Trying disable clock %s with 0 usecount\n",
958 omap2_clk_disable(clk
);
961 spin_unlock_irqrestore(&clockfw_lock
, flags
);
963 EXPORT_SYMBOL(clk_disable
);
965 unsigned long clk_get_rate(struct clk
*clk
)
970 if (clk
== NULL
|| IS_ERR(clk
))
973 spin_lock_irqsave(&clockfw_lock
, flags
);
975 spin_unlock_irqrestore(&clockfw_lock
, flags
);
979 EXPORT_SYMBOL(clk_get_rate
);
982 * Optional clock functions defined in include/linux/clk.h
985 long clk_round_rate(struct clk
*clk
, unsigned long rate
)
990 if (clk
== NULL
|| IS_ERR(clk
))
993 spin_lock_irqsave(&clockfw_lock
, flags
);
994 ret
= omap2_clk_round_rate(clk
, rate
);
995 spin_unlock_irqrestore(&clockfw_lock
, flags
);
999 EXPORT_SYMBOL(clk_round_rate
);
1001 int clk_set_rate(struct clk
*clk
, unsigned long rate
)
1003 unsigned long flags
;
1006 if (clk
== NULL
|| IS_ERR(clk
))
1009 spin_lock_irqsave(&clockfw_lock
, flags
);
1010 ret
= omap2_clk_set_rate(clk
, rate
);
1012 propagate_rate(clk
);
1013 spin_unlock_irqrestore(&clockfw_lock
, flags
);
1017 EXPORT_SYMBOL(clk_set_rate
);
1019 int clk_set_parent(struct clk
*clk
, struct clk
*parent
)
1021 unsigned long flags
;
1024 if (clk
== NULL
|| IS_ERR(clk
) || parent
== NULL
|| IS_ERR(parent
))
1027 spin_lock_irqsave(&clockfw_lock
, flags
);
1028 if (clk
->usecount
== 0) {
1029 ret
= omap2_clk_set_parent(clk
, parent
);
1031 propagate_rate(clk
);
1035 spin_unlock_irqrestore(&clockfw_lock
, flags
);
1039 EXPORT_SYMBOL(clk_set_parent
);
1041 struct clk
*clk_get_parent(struct clk
*clk
)
1045 EXPORT_SYMBOL(clk_get_parent
);
1048 * OMAP specific clock functions shared between omap1 and omap2
1051 int __initdata mpurate
;
1054 * By default we use the rate set by the bootloader.
1055 * You can override this with mpurate= cmdline option.
1057 static int __init
omap_clk_setup(char *str
)
1059 get_option(&str
, &mpurate
);
1069 __setup("mpurate=", omap_clk_setup
);
1071 /* Used for clocks that always have same value as the parent clock */
1072 unsigned long followparent_recalc(struct clk
*clk
)
1074 return clk
->parent
->rate
;
1078 * Used for clocks that have the same value as the parent clock,
1079 * divided by some factor
1081 unsigned long omap_fixed_divisor_recalc(struct clk
*clk
)
1083 WARN_ON(!clk
->fixed_div
);
1085 return clk
->parent
->rate
/ clk
->fixed_div
;
1088 void clk_reparent(struct clk
*child
, struct clk
*parent
)
1090 list_del_init(&child
->sibling
);
1092 list_add(&child
->sibling
, &parent
->children
);
1093 child
->parent
= parent
;
1095 /* now do the debugfs renaming to reattach the child
1096 to the proper parent */
1099 /* Propagate rate to children */
1100 void propagate_rate(struct clk
*tclk
)
1104 list_for_each_entry(clkp
, &tclk
->children
, sibling
) {
1106 clkp
->rate
= clkp
->recalc(clkp
);
1107 propagate_rate(clkp
);
1111 static LIST_HEAD(root_clks
);
1114 * recalculate_root_clocks - recalculate and propagate all root clocks
1116 * Recalculates all root clocks (clocks with no parent), which if the
1117 * clock's .recalc is set correctly, should also propagate their rates.
1120 void recalculate_root_clocks(void)
1124 list_for_each_entry(clkp
, &root_clks
, sibling
) {
1126 clkp
->rate
= clkp
->recalc(clkp
);
1127 propagate_rate(clkp
);
1132 * clk_preinit - initialize any fields in the struct clk before clk init
1133 * @clk: struct clk * to initialize
1135 * Initialize any struct clk fields needed before normal clk initialization
1136 * can run. No return value.
1138 void clk_preinit(struct clk
*clk
)
1140 INIT_LIST_HEAD(&clk
->children
);
1143 int clk_register(struct clk
*clk
)
1145 if (clk
== NULL
|| IS_ERR(clk
))
1149 * trap out already registered clocks
1151 if (clk
->node
.next
|| clk
->node
.prev
)
1154 mutex_lock(&clocks_mutex
);
1156 list_add(&clk
->sibling
, &clk
->parent
->children
);
1158 list_add(&clk
->sibling
, &root_clks
);
1160 list_add(&clk
->node
, &clocks
);
1163 mutex_unlock(&clocks_mutex
);
1167 EXPORT_SYMBOL(clk_register
);
1169 void clk_unregister(struct clk
*clk
)
1171 if (clk
== NULL
|| IS_ERR(clk
))
1174 mutex_lock(&clocks_mutex
);
1175 list_del(&clk
->sibling
);
1176 list_del(&clk
->node
);
1177 mutex_unlock(&clocks_mutex
);
1179 EXPORT_SYMBOL(clk_unregister
);
1181 void clk_enable_init_clocks(void)
1185 list_for_each_entry(clkp
, &clocks
, node
)
1186 if (clkp
->flags
& ENABLE_ON_INIT
)
1191 * omap_clk_get_by_name - locate OMAP struct clk by its name
1192 * @name: name of the struct clk to locate
1194 * Locate an OMAP struct clk by its name. Assumes that struct clk
1195 * names are unique. Returns NULL if not found or a pointer to the
1196 * struct clk if found.
1198 struct clk
*omap_clk_get_by_name(const char *name
)
1201 struct clk
*ret
= NULL
;
1203 mutex_lock(&clocks_mutex
);
1205 list_for_each_entry(c
, &clocks
, node
) {
1206 if (!strcmp(c
->name
, name
)) {
1212 mutex_unlock(&clocks_mutex
);
1217 int omap_clk_enable_autoidle_all(void)
1220 unsigned long flags
;
1222 spin_lock_irqsave(&clockfw_lock
, flags
);
1224 list_for_each_entry(c
, &clocks
, node
)
1225 if (c
->ops
->allow_idle
)
1226 c
->ops
->allow_idle(c
);
1228 spin_unlock_irqrestore(&clockfw_lock
, flags
);
1233 int omap_clk_disable_autoidle_all(void)
1236 unsigned long flags
;
1238 spin_lock_irqsave(&clockfw_lock
, flags
);
1240 list_for_each_entry(c
, &clocks
, node
)
1241 if (c
->ops
->deny_idle
)
1242 c
->ops
->deny_idle(c
);
1244 spin_unlock_irqrestore(&clockfw_lock
, flags
);
1252 static int clkll_enable_null(struct clk
*clk
)
1257 static void clkll_disable_null(struct clk
*clk
)
1261 const struct clkops clkops_null
= {
1262 .enable
= clkll_enable_null
,
1263 .disable
= clkll_disable_null
,
1269 * Used for clock aliases that are needed on some OMAPs, but not others
1271 struct clk dummy_ck
= {
1273 .ops
= &clkops_null
,
1280 #ifdef CONFIG_OMAP_RESET_CLOCKS
1282 * Disable any unused clocks left on by the bootloader
1284 static int __init
clk_disable_unused(void)
1287 unsigned long flags
;
1289 pr_info("clock: disabling unused clocks to save power\n");
1291 spin_lock_irqsave(&clockfw_lock
, flags
);
1292 list_for_each_entry(ck
, &clocks
, node
) {
1293 if (ck
->ops
== &clkops_null
)
1296 if (ck
->usecount
> 0 || !ck
->enable_reg
)
1299 omap2_clk_disable_unused(ck
);
1301 spin_unlock_irqrestore(&clockfw_lock
, flags
);
1305 late_initcall(clk_disable_unused
);
1306 late_initcall(omap_clk_enable_autoidle_all
);
1309 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
1311 * debugfs support to trace clock tree hierarchy and attributes
1314 #include <linux/debugfs.h>
1315 #include <linux/seq_file.h>
1317 static struct dentry
*clk_debugfs_root
;
1319 static int clk_dbg_show_summary(struct seq_file
*s
, void *unused
)
1324 mutex_lock(&clocks_mutex
);
1325 seq_printf(s
, "%-30s %-30s %-10s %s\n",
1326 "clock-name", "parent-name", "rate", "use-count");
1328 list_for_each_entry(c
, &clocks
, node
) {
1330 seq_printf(s
, "%-30s %-30s %-10lu %d\n",
1331 c
->name
, pa
? pa
->name
: "none", c
->rate
,
1334 mutex_unlock(&clocks_mutex
);
1339 static int clk_dbg_open(struct inode
*inode
, struct file
*file
)
1341 return single_open(file
, clk_dbg_show_summary
, inode
->i_private
);
1344 static const struct file_operations debug_clock_fops
= {
1345 .open
= clk_dbg_open
,
1347 .llseek
= seq_lseek
,
1348 .release
= single_release
,
1351 static int clk_debugfs_register_one(struct clk
*c
)
1355 struct clk
*pa
= c
->parent
;
1357 d
= debugfs_create_dir(c
->name
, pa
? pa
->dent
: clk_debugfs_root
);
1362 d
= debugfs_create_u8("usecount", S_IRUGO
, c
->dent
, (u8
*)&c
->usecount
);
1367 d
= debugfs_create_u32("rate", S_IRUGO
, c
->dent
, (u32
*)&c
->rate
);
1372 d
= debugfs_create_x32("flags", S_IRUGO
, c
->dent
, (u32
*)&c
->flags
);
1380 debugfs_remove_recursive(c
->dent
);
1384 static int clk_debugfs_register(struct clk
*c
)
1387 struct clk
*pa
= c
->parent
;
1389 if (pa
&& !pa
->dent
) {
1390 err
= clk_debugfs_register(pa
);
1396 err
= clk_debugfs_register_one(c
);
1403 static int __init
clk_debugfs_init(void)
1409 d
= debugfs_create_dir("clock", NULL
);
1412 clk_debugfs_root
= d
;
1414 list_for_each_entry(c
, &clocks
, node
) {
1415 err
= clk_debugfs_register(c
);
1420 d
= debugfs_create_file("summary", S_IRUGO
,
1421 d
, NULL
, &debug_clock_fops
);
1427 debugfs_remove_recursive(clk_debugfs_root
);
1430 late_initcall(clk_debugfs_init
);
1432 #endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */
1433 #endif /* CONFIG_COMMON_CLK */