arch/arm/mach-omap2/clock3517.c

   1 /*
   2  * OMAP3517/3505-specific clock framework functions
   3  *
   4  * Copyright (C) 2010 Texas Instruments, Inc.
   5  * Copyright (C) 2011 Nokia Corporation
   6  *
   7  * Ranjith Lohithakshan
   8  * Paul Walmsley
   9  *
  10  * Parts of this code are based on code written by
  11  * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu,
  12  * Russell King
  13  *
  14  * This program is free software; you can redistribute it and/or modify
  15  * it under the terms of the GNU General Public License version 2 as
  16  * published by the Free Software Foundation.
  17  */
  18 #undef DEBUG
  19
  20 #include <linux/kernel.h>
  21 #include <linux/clk.h>
  22 #include <linux/io.h>
  23
  24 #include "clock.h"
  25 #include "clock3517.h"
  26 #include "cm2xxx_3xxx.h"
  27 #include "cm-regbits-34xx.h"
  28
  29 /*
  30  * In AM35xx IPSS, the {ICK,FCK} enable bits for modules are exported
  31  * in the same register at a bit offset of 0x8. The EN_ACK for ICK is
  32  * at an offset of 4 from ICK enable bit.
  33  */
  34 #define AM35XX_IPSS_ICK_MASK                    0xF
  35 #define AM35XX_IPSS_ICK_EN_ACK_OFFSET           0x4
  36 #define AM35XX_IPSS_ICK_FCK_OFFSET              0x8
  37 #define AM35XX_IPSS_CLK_IDLEST_VAL              0
  38
  39 /**
  40  * am35xx_clk_find_idlest - return clock ACK info for AM35XX IPSS
  41  * @clk: struct clk * being enabled
  42  * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
  43  * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
  44  * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
  45  *
  46  * The interface clocks on AM35xx IPSS reflects the clock idle status
  47  * in the enable register itsel at a bit offset of 4 from the enable
  48  * bit. A value of 1 indicates that clock is enabled.
  49  */
  50 static void am35xx_clk_find_idlest(struct clk *clk,
  51                                             void __iomem **idlest_reg,
  52                                             u8 *idlest_bit,
  53                                             u8 *idlest_val)
  54 {
  55         *idlest_reg = (__force void __iomem *)(clk->enable_reg);
  56         *idlest_bit = clk->enable_bit + AM35XX_IPSS_ICK_EN_ACK_OFFSET;
  57         *idlest_val = AM35XX_IPSS_CLK_IDLEST_VAL;
  58 }
  59
  60 /**
  61  * am35xx_clk_find_companion - find companion clock to @clk
  62  * @clk: struct clk * to find the companion clock of
  63  * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
  64  * @other_bit: u8 ** to return the companion clock bit shift in
  65  *
  66  * Some clocks don't have companion clocks.  For example, modules with
  67  * only an interface clock (such as HECC) don't have a companion
  68  * clock.  Right now, this code relies on the hardware exporting a bit
  69  * in the correct companion register that indicates that the
  70  * nonexistent 'companion clock' is active.  Future patches will
  71  * associate this type of code with per-module data structures to
  72  * avoid this issue, and remove the casts.  No return value.
  73  */
  74 static void am35xx_clk_find_companion(struct clk *clk, void __iomem **other_reg,
  75                                             u8 *other_bit)
  76 {
  77         *other_reg = (__force void __iomem *)(clk->enable_reg);
  78         if (clk->enable_bit & AM35XX_IPSS_ICK_MASK)
  79                 *other_bit = clk->enable_bit + AM35XX_IPSS_ICK_FCK_OFFSET;
  80         else
  81                 *other_bit = clk->enable_bit - AM35XX_IPSS_ICK_FCK_OFFSET;
  82 }
  83
  84 const struct clkops clkops_am35xx_ipss_module_wait = {
  85         .enable         = omap2_dflt_clk_enable,
  86         .disable        = omap2_dflt_clk_disable,
  87         .find_idlest    = am35xx_clk_find_idlest,
  88         .find_companion = am35xx_clk_find_companion,
  89 };
  90
  91 /**
  92  * am35xx_clk_ipss_find_idlest - return CM_IDLEST info for IPSS
  93  * @clk: struct clk * being enabled
  94  * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
  95  * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
  96  * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
  97  *
  98  * The IPSS target CM_IDLEST bit is at a different shift from the
  99  * CM_{I,F}CLKEN bit.  Pass back the correct info via @idlest_reg
 100  * and @idlest_bit.  No return value.
 101  */
 102 static void am35xx_clk_ipss_find_idlest(struct clk *clk,
 103                                             void __iomem **idlest_reg,
 104                                             u8 *idlest_bit,
 105                                             u8 *idlest_val)
 106 {
 107         u32 r;
 108
 109         r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20);
 110         *idlest_reg = (__force void __iomem *)r;
 111         *idlest_bit = AM35XX_ST_IPSS_SHIFT;
 112         *idlest_val = OMAP34XX_CM_IDLEST_VAL;
 113 }
 114
 115 const struct clkops clkops_am35xx_ipss_wait = {
 116         .enable         = omap2_dflt_clk_enable,
 117         .disable        = omap2_dflt_clk_disable,
 118         .find_idlest    = am35xx_clk_ipss_find_idlest,
 119         .find_companion = omap2_clk_dflt_find_companion,
 120         .allow_idle     = omap2_clkt_iclk_allow_idle,
 121         .deny_idle      = omap2_clkt_iclk_deny_idle,
 122 };
 123
 124