arch/arm/mach-omap2/common.h

   1 /*
   2  * Header for code common to all OMAP2+ machines.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  10  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  12  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  13  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  14  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  15  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  16  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  17  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  18  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  19  *
  20  * You should have received a copy of the  GNU General Public License along
  21  * with this program; if not, write  to the Free Software Foundation, Inc.,
  22  * 675 Mass Ave, Cambridge, MA 02139, USA.
  23  */
  24
  25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
  26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
  27 #ifndef __ASSEMBLER__
  28
  29 #include <linux/irq.h>
  30 #include <linux/delay.h>
  31 #include <linux/i2c.h>
  32 #include <linux/i2c/twl.h>
  33 #include <linux/i2c-omap.h>
  34 #include <linux/reboot.h>
  35 #include <linux/irqchip/irq-omap-intc.h>
  36
  37 #include <asm/proc-fns.h>
  38 #include <asm/hardware/cache-l2x0.h>
  39
  40 #include "i2c.h"
  41 #include "serial.h"
  42
  43 #include "usb.h"
  44
  45 #define OMAP_INTC_START         NR_IRQS
  46
  47 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
  48 int omap2_pm_init(void);
  49 #else
  50 static inline int omap2_pm_init(void)
  51 {
  52         return 0;
  53 }
  54 #endif
  55
  56 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
  57 int omap3_pm_init(void);
  58 #else
  59 static inline int omap3_pm_init(void)
  60 {
  61         return 0;
  62 }
  63 #endif
  64
  65 #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
  66 int omap4_pm_init(void);
  67 int omap4_pm_init_early(void);
  68 #else
  69 static inline int omap4_pm_init(void)
  70 {
  71         return 0;
  72 }
  73
  74 static inline int omap4_pm_init_early(void)
  75 {
  76         return 0;
  77 }
  78 #endif
  79
  80 #ifdef CONFIG_OMAP_MUX
  81 int omap_mux_late_init(void);
  82 #else
  83 static inline int omap_mux_late_init(void)
  84 {
  85         return 0;
  86 }
  87 #endif
  88
  89 extern void omap2_init_common_infrastructure(void);
  90
  91 extern void omap_init_time(void);
  92 extern void omap3_secure_sync32k_timer_init(void);
  93 extern void omap3_gptimer_timer_init(void);
  94 extern void omap4_local_timer_init(void);
  95 #ifdef CONFIG_CACHE_L2X0
  96 int omap_l2_cache_init(void);
  97 #define OMAP_L2C_AUX_CTRL       (L2C_AUX_CTRL_SHARED_OVERRIDE | \
  98                                  L310_AUX_CTRL_DATA_PREFETCH | \
  99                                  L310_AUX_CTRL_INSTR_PREFETCH)
 100 void omap4_l2c310_write_sec(unsigned long val, unsigned reg);
 101 #else
 102 static inline int omap_l2_cache_init(void)
 103 {
 104         return 0;
 105 }
 106
 107 #define OMAP_L2C_AUX_CTRL       0
 108 #define omap4_l2c310_write_sec  NULL
 109 #endif
 110 extern void omap5_realtime_timer_init(void);
 111
 112 void omap2420_init_early(void);
 113 void omap2430_init_early(void);
 114 void omap3430_init_early(void);
 115 void omap35xx_init_early(void);
 116 void omap3630_init_early(void);
 117 void omap3_init_early(void);    /* Do not use this one */
 118 void am33xx_init_early(void);
 119 void am35xx_init_early(void);
 120 void ti814x_init_early(void);
 121 void ti816x_init_early(void);
 122 void am33xx_init_early(void);
 123 void am43xx_init_early(void);
 124 void am43xx_init_late(void);
 125 void omap4430_init_early(void);
 126 void omap5_init_early(void);
 127 void omap3_init_late(void);     /* Do not use this one */
 128 void omap4430_init_late(void);
 129 void omap2420_init_late(void);
 130 void omap2430_init_late(void);
 131 void omap3430_init_late(void);
 132 void omap35xx_init_late(void);
 133 void omap3630_init_late(void);
 134 void am35xx_init_late(void);
 135 void ti81xx_init_late(void);
 136 void am33xx_init_late(void);
 137 void omap5_init_late(void);
 138 int omap2_common_pm_late_init(void);
 139 void dra7xx_init_early(void);
 140 void dra7xx_init_late(void);
 141
 142 #ifdef CONFIG_SOC_BUS
 143 void omap_soc_device_init(void);
 144 #else
 145 static inline void omap_soc_device_init(void)
 146 {
 147 }
 148 #endif
 149
 150 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
 151 void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
 152 #else
 153 static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
 154 {
 155 }
 156 #endif
 157
 158 #ifdef CONFIG_SOC_AM33XX
 159 void am33xx_restart(enum reboot_mode mode, const char *cmd);
 160 #else
 161 static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
 162 {
 163 }
 164 #endif
 165
 166 #ifdef CONFIG_ARCH_OMAP3
 167 void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
 168 #else
 169 static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
 170 {
 171 }
 172 #endif
 173
 174 #ifdef CONFIG_SOC_TI81XX
 175 void ti81xx_restart(enum reboot_mode mode, const char *cmd);
 176 #else
 177 static inline void ti81xx_restart(enum reboot_mode mode, const char *cmd)
 178 {
 179 }
 180 #endif
 181
 182 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
 183         defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
 184 void omap44xx_restart(enum reboot_mode mode, const char *cmd);
 185 #else
 186 static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
 187 {
 188 }
 189 #endif
 190
 191 #ifdef CONFIG_OMAP_INTERCONNECT_BARRIER
 192 void omap_barrier_reserve_memblock(void);
 193 void omap_barriers_init(void);
 194 #else
 195 static inline void omap_barrier_reserve_memblock(void)
 196 {
 197 }
 198 #endif
 199
 200 /* This gets called from mach-omap2/io.c, do not call this */
 201 void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
 202
 203 void __init omap242x_map_io(void);
 204 void __init omap243x_map_io(void);
 205 void __init omap3_map_io(void);
 206 void __init am33xx_map_io(void);
 207 void __init omap4_map_io(void);
 208 void __init omap5_map_io(void);
 209 void __init dra7xx_map_io(void);
 210 void __init ti81xx_map_io(void);
 211
 212 /**
 213  * omap_test_timeout - busy-loop, testing a condition
 214  * @cond: condition to test until it evaluates to true
 215  * @timeout: maximum number of microseconds in the timeout
 216  * @index: loop index (integer)
 217  *
 218  * Loop waiting for @cond to become true or until at least @timeout
 219  * microseconds have passed.  To use, define some integer @index in the
 220  * calling code.  After running, if @index == @timeout, then the loop has
 221  * timed out.
 222  */
 223 #define omap_test_timeout(cond, timeout, index)                 \
 224 ({                                                              \
 225         for (index = 0; index < timeout; index++) {             \
 226                 if (cond)                                       \
 227                         break;                                  \
 228                 udelay(1);                                      \
 229         }                                                       \
 230 })
 231
 232 extern struct device *omap2_get_mpuss_device(void);
 233 extern struct device *omap2_get_iva_device(void);
 234 extern struct device *omap2_get_l3_device(void);
 235 extern struct device *omap4_get_dsp_device(void);
 236
 237 unsigned int omap4_xlate_irq(unsigned int hwirq);
 238 void omap_gic_of_init(void);
 239
 240 #ifdef CONFIG_CACHE_L2X0
 241 extern void __iomem *omap4_get_l2cache_base(void);
 242 #endif
 243
 244 struct device_node;
 245
 246 #ifdef CONFIG_SMP
 247 extern void __iomem *omap4_get_scu_base(void);
 248 #else
 249 static inline void __iomem *omap4_get_scu_base(void)
 250 {
 251         return NULL;
 252 }
 253 #endif
 254
 255 extern void gic_dist_disable(void);
 256 extern void gic_dist_enable(void);
 257 extern bool gic_dist_disabled(void);
 258 extern void gic_timer_retrigger(void);
 259 extern void omap_smc1(u32 fn, u32 arg);
 260 extern void omap4_sar_ram_init(void);
 261 extern void __iomem *omap4_get_sar_ram_base(void);
 262 extern void omap4_mpuss_early_init(void);
 263 extern void omap_do_wfi(void);
 264
 265 extern void omap4_secondary_startup(void);
 266 extern void omap4460_secondary_startup(void);
 267
 268 #ifdef CONFIG_SMP
 269 /* Needed for secondary core boot */
 270 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
 271 extern void omap_auxcoreboot_addr(u32 cpu_addr);
 272 extern u32 omap_read_auxcoreboot0(void);
 273
 274 extern void omap4_cpu_die(unsigned int cpu);
 275 extern int omap4_cpu_kill(unsigned int cpu);
 276
 277 extern const struct smp_operations omap4_smp_ops;
 278
 279 extern void omap5_secondary_startup(void);
 280 extern void omap5_secondary_hyp_startup(void);
 281 #endif
 282
 283 #if defined(CONFIG_SMP) && defined(CONFIG_PM)
 284 extern int omap4_mpuss_init(void);
 285 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
 286 extern int omap4_finish_suspend(unsigned long cpu_state);
 287 extern void omap4_cpu_resume(void);
 288 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
 289 #else
 290 static inline int omap4_enter_lowpower(unsigned int cpu,
 291                                         unsigned int power_state)
 292 {
 293         cpu_do_idle();
 294         return 0;
 295 }
 296
 297 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
 298 {
 299         cpu_do_idle();
 300         return 0;
 301 }
 302
 303 static inline int omap4_mpuss_init(void)
 304 {
 305         return 0;
 306 }
 307
 308 static inline int omap4_finish_suspend(unsigned long cpu_state)
 309 {
 310         return 0;
 311 }
 312
 313 static inline void omap4_cpu_resume(void)
 314 {}
 315
 316 #endif
 317
 318 void pdata_quirks_init(const struct of_device_id *);
 319 void omap_auxdata_legacy_init(struct device *dev);
 320 void omap_pcs_legacy_init(int irq, void (*rearm)(void));
 321
 322 struct omap_sdrc_params;
 323 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
 324                                       struct omap_sdrc_params *sdrc_cs1);
 325 struct omap2_hsmmc_info;
 326 extern void omap_reserve(void);
 327
 328 struct omap_hwmod;
 329 extern int omap_dss_reset(struct omap_hwmod *);
 330
 331 /* SoC specific clock initializer */
 332 int omap_clk_init(void);
 333
 334 int __init omapdss_init_of(void);
 335 void __init omapdss_early_init_of(void);
 336
 337 #endif /* __ASSEMBLER__ */
 338 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */