2 * linux/arch/arm/mach-omap2/cpuidle34xx.c
4 * OMAP3 CPU IDLE Routines
6 * Copyright (C) 2008 Texas Instruments, Inc.
7 * Rajendra Nayak <rnayak@ti.com>
9 * Copyright (C) 2007 Texas Instruments, Inc.
10 * Karthik Dasu <karthik-dp@ti.com>
12 * Copyright (C) 2006 Nokia Corporation
13 * Tony Lindgren <tony@atomide.com>
15 * Copyright (C) 2005 Texas Instruments, Inc.
16 * Richard Woodruff <r-woodruff2@ti.com>
18 * Based on pm.c for omap2
20 * This program is free software; you can redistribute it and/or modify
21 * it under the terms of the GNU General Public License version 2 as
22 * published by the Free Software Foundation.
25 #include <linux/sched.h>
26 #include <linux/cpuidle.h>
27 #include <linux/export.h>
28 #include <linux/cpu_pm.h>
29 #include <asm/cpuidle.h>
31 #include "powerdomain.h"
32 #include "clockdomain.h"
38 /* Mach specific information to be recorded in the C-state driver_data */
39 struct omap3_idle_statedata
{
46 static struct powerdomain
*mpu_pd
, *core_pd
, *per_pd
, *cam_pd
;
49 * Possible flag bits for struct omap3_idle_statedata.flags:
51 * OMAP_CPUIDLE_CX_NO_CLKDM_IDLE: don't allow the MPU clockdomain to go
52 * inactive. This in turn prevents the MPU DPLL from entering autoidle
53 * mode, so wakeup latency is greatly reduced, at the cost of additional
54 * energy consumption. This also prevents the CORE clockdomain from
57 #define OMAP_CPUIDLE_CX_NO_CLKDM_IDLE BIT(0)
60 * Prevent PER OFF if CORE is not in RETention or OFF as this would
61 * disable PER wakeups completely.
63 static struct omap3_idle_statedata omap3_idle_data
[] = {
65 .mpu_state
= PWRDM_POWER_ON
,
66 .core_state
= PWRDM_POWER_ON
,
67 /* In C1 do not allow PER state lower than CORE state */
68 .per_min_state
= PWRDM_POWER_ON
,
69 .flags
= OMAP_CPUIDLE_CX_NO_CLKDM_IDLE
,
72 .mpu_state
= PWRDM_POWER_ON
,
73 .core_state
= PWRDM_POWER_ON
,
74 .per_min_state
= PWRDM_POWER_RET
,
77 .mpu_state
= PWRDM_POWER_RET
,
78 .core_state
= PWRDM_POWER_ON
,
79 .per_min_state
= PWRDM_POWER_RET
,
82 .mpu_state
= PWRDM_POWER_OFF
,
83 .core_state
= PWRDM_POWER_ON
,
84 .per_min_state
= PWRDM_POWER_RET
,
87 .mpu_state
= PWRDM_POWER_RET
,
88 .core_state
= PWRDM_POWER_RET
,
89 .per_min_state
= PWRDM_POWER_OFF
,
92 .mpu_state
= PWRDM_POWER_OFF
,
93 .core_state
= PWRDM_POWER_RET
,
94 .per_min_state
= PWRDM_POWER_OFF
,
97 .mpu_state
= PWRDM_POWER_OFF
,
98 .core_state
= PWRDM_POWER_OFF
,
99 .per_min_state
= PWRDM_POWER_OFF
,
104 * omap3_enter_idle - Programs OMAP3 to enter the specified state
105 * @dev: cpuidle device
106 * @drv: cpuidle driver
107 * @index: the index of state to be entered
109 static int omap3_enter_idle(struct cpuidle_device
*dev
,
110 struct cpuidle_driver
*drv
,
113 struct omap3_idle_statedata
*cx
= &omap3_idle_data
[index
];
117 if (omap_irq_pending() || need_resched())
118 goto return_sleep_time
;
120 /* Deny idle for C1 */
121 if (cx
->flags
& OMAP_CPUIDLE_CX_NO_CLKDM_IDLE
) {
122 clkdm_deny_idle(mpu_pd
->pwrdm_clkdms
[0]);
124 pwrdm_set_next_pwrst(mpu_pd
, cx
->mpu_state
);
125 pwrdm_set_next_pwrst(core_pd
, cx
->core_state
);
129 * Call idle CPU PM enter notifier chain so that
130 * VFP context is saved.
132 if (cx
->mpu_state
== PWRDM_POWER_OFF
)
135 /* Execute ARM wfi */
139 * Call idle CPU PM enter notifier chain to restore
142 if (cx
->mpu_state
== PWRDM_POWER_OFF
&&
143 pwrdm_read_prev_pwrst(mpu_pd
) == PWRDM_POWER_OFF
)
146 /* Re-allow idle for C1 */
147 if (cx
->flags
& OMAP_CPUIDLE_CX_NO_CLKDM_IDLE
)
148 clkdm_allow_idle(mpu_pd
->pwrdm_clkdms
[0]);
157 * next_valid_state - Find next valid C-state
158 * @dev: cpuidle device
159 * @drv: cpuidle driver
160 * @index: Index of currently selected c-state
162 * If the state corresponding to index is valid, index is returned back
163 * to the caller. Else, this function searches for a lower c-state which is
164 * still valid (as defined in omap3_power_states[]) and returns its index.
166 * A state is valid if the 'valid' field is enabled and
167 * if it satisfies the enable_off_mode condition.
169 static int next_valid_state(struct cpuidle_device
*dev
,
170 struct cpuidle_driver
*drv
, int index
)
172 struct omap3_idle_statedata
*cx
= &omap3_idle_data
[index
];
173 u32 mpu_deepest_state
= PWRDM_POWER_RET
;
174 u32 core_deepest_state
= PWRDM_POWER_RET
;
176 int next_index
= 0; /* C1 is the default value */
178 if (enable_off_mode
) {
179 mpu_deepest_state
= PWRDM_POWER_OFF
;
181 * Erratum i583: valable for ES rev < Es1.2 on 3630.
182 * CORE OFF mode is not supported in a stable form, restrict
183 * instead the CORE state to RET.
185 if (!IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583
))
186 core_deepest_state
= PWRDM_POWER_OFF
;
189 /* Check if current state is valid */
190 if ((cx
->mpu_state
>= mpu_deepest_state
) &&
191 (cx
->core_state
>= core_deepest_state
))
195 * Drop to next valid state.
196 * Start search from the next (lower) state.
198 for (idx
= index
- 1; idx
>= 0; idx
--) {
199 cx
= &omap3_idle_data
[idx
];
200 if ((cx
->mpu_state
>= mpu_deepest_state
) &&
201 (cx
->core_state
>= core_deepest_state
)) {
211 * omap3_enter_idle_bm - Checks for any bus activity
212 * @dev: cpuidle device
213 * @drv: cpuidle driver
214 * @index: array index of target state to be programmed
216 * This function checks for any pending activity and then programs
217 * the device to the specified or a safer state.
219 static int omap3_enter_idle_bm(struct cpuidle_device
*dev
,
220 struct cpuidle_driver
*drv
,
223 int new_state_idx
, ret
;
224 u8 per_next_state
, per_saved_state
;
225 struct omap3_idle_statedata
*cx
;
228 * Use only C1 if CAM is active.
229 * CAM does not have wakeup capability in OMAP3.
231 if (pwrdm_read_pwrst(cam_pd
) == PWRDM_POWER_ON
)
232 new_state_idx
= drv
->safe_state_index
;
234 new_state_idx
= next_valid_state(dev
, drv
, index
);
237 * FIXME: we currently manage device-specific idle states
238 * for PER and CORE in combination with CPU-specific
239 * idle states. This is wrong, and device-specific
240 * idle management needs to be separated out into
244 /* Program PER state */
245 cx
= &omap3_idle_data
[new_state_idx
];
247 per_next_state
= pwrdm_read_next_pwrst(per_pd
);
248 per_saved_state
= per_next_state
;
249 if (per_next_state
< cx
->per_min_state
) {
250 per_next_state
= cx
->per_min_state
;
251 pwrdm_set_next_pwrst(per_pd
, per_next_state
);
254 ret
= omap3_enter_idle(dev
, drv
, new_state_idx
);
256 /* Restore original PER state if it was modified */
257 if (per_next_state
!= per_saved_state
)
258 pwrdm_set_next_pwrst(per_pd
, per_saved_state
);
263 static struct cpuidle_driver omap3_idle_driver
= {
264 .name
= "omap3_idle",
265 .owner
= THIS_MODULE
,
268 .enter
= omap3_enter_idle_bm
,
269 .exit_latency
= 2 + 2,
270 .target_residency
= 5,
271 .flags
= CPUIDLE_FLAG_TIME_VALID
,
273 .desc
= "MPU ON + CORE ON",
276 .enter
= omap3_enter_idle_bm
,
277 .exit_latency
= 10 + 10,
278 .target_residency
= 30,
279 .flags
= CPUIDLE_FLAG_TIME_VALID
,
281 .desc
= "MPU ON + CORE ON",
284 .enter
= omap3_enter_idle_bm
,
285 .exit_latency
= 50 + 50,
286 .target_residency
= 300,
287 .flags
= CPUIDLE_FLAG_TIME_VALID
,
289 .desc
= "MPU RET + CORE ON",
292 .enter
= omap3_enter_idle_bm
,
293 .exit_latency
= 1500 + 1800,
294 .target_residency
= 4000,
295 .flags
= CPUIDLE_FLAG_TIME_VALID
,
297 .desc
= "MPU OFF + CORE ON",
300 .enter
= omap3_enter_idle_bm
,
301 .exit_latency
= 2500 + 7500,
302 .target_residency
= 12000,
303 .flags
= CPUIDLE_FLAG_TIME_VALID
,
305 .desc
= "MPU RET + CORE RET",
308 .enter
= omap3_enter_idle_bm
,
309 .exit_latency
= 3000 + 8500,
310 .target_residency
= 15000,
311 .flags
= CPUIDLE_FLAG_TIME_VALID
,
313 .desc
= "MPU OFF + CORE RET",
316 .enter
= omap3_enter_idle_bm
,
317 .exit_latency
= 10000 + 30000,
318 .target_residency
= 30000,
319 .flags
= CPUIDLE_FLAG_TIME_VALID
,
321 .desc
= "MPU OFF + CORE OFF",
324 .state_count
= ARRAY_SIZE(omap3_idle_data
),
325 .safe_state_index
= 0,
328 /* Public functions */
331 * omap3_idle_init - Init routine for OMAP3 idle
333 * Registers the OMAP3 specific cpuidle driver to the cpuidle
334 * framework with the valid set of states.
336 int __init
omap3_idle_init(void)
338 mpu_pd
= pwrdm_lookup("mpu_pwrdm");
339 core_pd
= pwrdm_lookup("core_pwrdm");
340 per_pd
= pwrdm_lookup("per_pwrdm");
341 cam_pd
= pwrdm_lookup("cam_pwrdm");
343 if (!mpu_pd
|| !core_pd
|| !per_pd
|| !cam_pd
)
346 return cpuidle_register(&omap3_idle_driver
, NULL
);