Merge tag 'pm+acpi-3.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
[deliverable/linux.git] / arch / arm / mach-omap2 / cpuidle44xx.c
1 /*
2 * OMAP4+ CPU idle Routines
3 *
4 * Copyright (C) 2011-2013 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * Rajendra Nayak <rnayak@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/sched.h>
14 #include <linux/cpuidle.h>
15 #include <linux/cpu_pm.h>
16 #include <linux/export.h>
17
18 #include <asm/cpuidle.h>
19 #include <asm/proc-fns.h>
20
21 #include "common.h"
22 #include "pm.h"
23 #include "prm.h"
24 #include "clockdomain.h"
25
26 /* Machine specific information */
27 struct idle_statedata {
28 u32 cpu_state;
29 u32 mpu_logic_state;
30 u32 mpu_state;
31 };
32
33 static struct idle_statedata omap4_idle_data[] = {
34 {
35 .cpu_state = PWRDM_POWER_ON,
36 .mpu_state = PWRDM_POWER_ON,
37 .mpu_logic_state = PWRDM_POWER_RET,
38 },
39 {
40 .cpu_state = PWRDM_POWER_OFF,
41 .mpu_state = PWRDM_POWER_RET,
42 .mpu_logic_state = PWRDM_POWER_RET,
43 },
44 {
45 .cpu_state = PWRDM_POWER_OFF,
46 .mpu_state = PWRDM_POWER_RET,
47 .mpu_logic_state = PWRDM_POWER_OFF,
48 },
49 };
50
51 static struct powerdomain *mpu_pd, *cpu_pd[NR_CPUS];
52 static struct clockdomain *cpu_clkdm[NR_CPUS];
53
54 static atomic_t abort_barrier;
55 static bool cpu_done[NR_CPUS];
56 static struct idle_statedata *state_ptr = &omap4_idle_data[0];
57
58 /* Private functions */
59
60 /**
61 * omap_enter_idle_[simple/coupled] - OMAP4PLUS cpuidle entry functions
62 * @dev: cpuidle device
63 * @drv: cpuidle driver
64 * @index: the index of state to be entered
65 *
66 * Called from the CPUidle framework to program the device to the
67 * specified low power state selected by the governor.
68 * Returns the amount of time spent in the low power state.
69 */
70 static int omap_enter_idle_simple(struct cpuidle_device *dev,
71 struct cpuidle_driver *drv,
72 int index)
73 {
74 local_fiq_disable();
75 omap_do_wfi();
76 local_fiq_enable();
77
78 return index;
79 }
80
81 static int omap_enter_idle_coupled(struct cpuidle_device *dev,
82 struct cpuidle_driver *drv,
83 int index)
84 {
85 struct idle_statedata *cx = state_ptr + index;
86
87 local_fiq_disable();
88
89 /*
90 * CPU0 has to wait and stay ON until CPU1 is OFF state.
91 * This is necessary to honour hardware recommondation
92 * of triggeing all the possible low power modes once CPU1 is
93 * out of coherency and in OFF mode.
94 */
95 if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
96 while (pwrdm_read_pwrst(cpu_pd[1]) != PWRDM_POWER_OFF) {
97 cpu_relax();
98
99 /*
100 * CPU1 could have already entered & exited idle
101 * without hitting off because of a wakeup
102 * or a failed attempt to hit off mode. Check for
103 * that here, otherwise we could spin forever
104 * waiting for CPU1 off.
105 */
106 if (cpu_done[1])
107 goto fail;
108
109 }
110 }
111
112 /*
113 * Call idle CPU PM enter notifier chain so that
114 * VFP and per CPU interrupt context is saved.
115 */
116 cpu_pm_enter();
117
118 if (dev->cpu == 0) {
119 pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
120 omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
121
122 /*
123 * Call idle CPU cluster PM enter notifier chain
124 * to save GIC and wakeupgen context.
125 */
126 if ((cx->mpu_state == PWRDM_POWER_RET) &&
127 (cx->mpu_logic_state == PWRDM_POWER_OFF))
128 cpu_cluster_pm_enter();
129 }
130
131 omap4_enter_lowpower(dev->cpu, cx->cpu_state);
132 cpu_done[dev->cpu] = true;
133
134 /* Wakeup CPU1 only if it is not offlined */
135 if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
136 clkdm_wakeup(cpu_clkdm[1]);
137 clkdm_allow_idle(cpu_clkdm[1]);
138 }
139
140 /*
141 * Call idle CPU PM exit notifier chain to restore
142 * VFP and per CPU IRQ context.
143 */
144 cpu_pm_exit();
145
146 /*
147 * Call idle CPU cluster PM exit notifier chain
148 * to restore GIC and wakeupgen context.
149 */
150 if ((cx->mpu_state == PWRDM_POWER_RET) &&
151 (cx->mpu_logic_state == PWRDM_POWER_OFF))
152 cpu_cluster_pm_exit();
153
154 fail:
155 cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
156 cpu_done[dev->cpu] = false;
157
158 local_fiq_enable();
159
160 return index;
161 }
162
163 static struct cpuidle_driver omap4_idle_driver = {
164 .name = "omap4_idle",
165 .owner = THIS_MODULE,
166 .states = {
167 {
168 /* C1 - CPU0 ON + CPU1 ON + MPU ON */
169 .exit_latency = 2 + 2,
170 .target_residency = 5,
171 .flags = CPUIDLE_FLAG_TIME_VALID,
172 .enter = omap_enter_idle_simple,
173 .name = "C1",
174 .desc = "CPUx ON, MPUSS ON"
175 },
176 {
177 /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
178 .exit_latency = 328 + 440,
179 .target_residency = 960,
180 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
181 CPUIDLE_FLAG_TIMER_STOP,
182 .enter = omap_enter_idle_coupled,
183 .name = "C2",
184 .desc = "CPUx OFF, MPUSS CSWR",
185 },
186 {
187 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
188 .exit_latency = 460 + 518,
189 .target_residency = 1100,
190 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
191 CPUIDLE_FLAG_TIMER_STOP,
192 .enter = omap_enter_idle_coupled,
193 .name = "C3",
194 .desc = "CPUx OFF, MPUSS OSWR",
195 },
196 },
197 .state_count = ARRAY_SIZE(omap4_idle_data),
198 .safe_state_index = 0,
199 };
200
201 /* Public functions */
202
203 /**
204 * omap4_idle_init - Init routine for OMAP4+ idle
205 *
206 * Registers the OMAP4+ specific cpuidle driver to the cpuidle
207 * framework with the valid set of states.
208 */
209 int __init omap4_idle_init(void)
210 {
211 mpu_pd = pwrdm_lookup("mpu_pwrdm");
212 cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm");
213 cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm");
214 if ((!mpu_pd) || (!cpu_pd[0]) || (!cpu_pd[1]))
215 return -ENODEV;
216
217 cpu_clkdm[0] = clkdm_lookup("mpu0_clkdm");
218 cpu_clkdm[1] = clkdm_lookup("mpu1_clkdm");
219 if (!cpu_clkdm[0] || !cpu_clkdm[1])
220 return -ENODEV;
221
222 return cpuidle_register(&omap4_idle_driver, cpu_online_mask);
223 }
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