2 * OMAP4+ CPU idle Routines
4 * Copyright (C) 2011-2013 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * Rajendra Nayak <rnayak@ti.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/sched.h>
14 #include <linux/cpuidle.h>
15 #include <linux/cpu_pm.h>
16 #include <linux/export.h>
18 #include <asm/cpuidle.h>
19 #include <asm/proc-fns.h>
24 #include "clockdomain.h"
26 /* Machine specific information */
27 struct idle_statedata
{
33 static struct idle_statedata omap4_idle_data
[] = {
35 .cpu_state
= PWRDM_POWER_ON
,
36 .mpu_state
= PWRDM_POWER_ON
,
37 .mpu_logic_state
= PWRDM_POWER_RET
,
40 .cpu_state
= PWRDM_POWER_OFF
,
41 .mpu_state
= PWRDM_POWER_RET
,
42 .mpu_logic_state
= PWRDM_POWER_RET
,
45 .cpu_state
= PWRDM_POWER_OFF
,
46 .mpu_state
= PWRDM_POWER_RET
,
47 .mpu_logic_state
= PWRDM_POWER_OFF
,
51 static struct powerdomain
*mpu_pd
, *cpu_pd
[NR_CPUS
];
52 static struct clockdomain
*cpu_clkdm
[NR_CPUS
];
54 static atomic_t abort_barrier
;
55 static bool cpu_done
[NR_CPUS
];
56 static struct idle_statedata
*state_ptr
= &omap4_idle_data
[0];
58 /* Private functions */
61 * omap_enter_idle_[simple/coupled] - OMAP4PLUS cpuidle entry functions
62 * @dev: cpuidle device
63 * @drv: cpuidle driver
64 * @index: the index of state to be entered
66 * Called from the CPUidle framework to program the device to the
67 * specified low power state selected by the governor.
68 * Returns the amount of time spent in the low power state.
70 static int omap_enter_idle_simple(struct cpuidle_device
*dev
,
71 struct cpuidle_driver
*drv
,
81 static int omap_enter_idle_coupled(struct cpuidle_device
*dev
,
82 struct cpuidle_driver
*drv
,
85 struct idle_statedata
*cx
= state_ptr
+ index
;
90 * CPU0 has to wait and stay ON until CPU1 is OFF state.
91 * This is necessary to honour hardware recommondation
92 * of triggeing all the possible low power modes once CPU1 is
93 * out of coherency and in OFF mode.
95 if (dev
->cpu
== 0 && cpumask_test_cpu(1, cpu_online_mask
)) {
96 while (pwrdm_read_pwrst(cpu_pd
[1]) != PWRDM_POWER_OFF
) {
100 * CPU1 could have already entered & exited idle
101 * without hitting off because of a wakeup
102 * or a failed attempt to hit off mode. Check for
103 * that here, otherwise we could spin forever
104 * waiting for CPU1 off.
113 * Call idle CPU PM enter notifier chain so that
114 * VFP and per CPU interrupt context is saved.
119 pwrdm_set_logic_retst(mpu_pd
, cx
->mpu_logic_state
);
120 omap_set_pwrdm_state(mpu_pd
, cx
->mpu_state
);
123 * Call idle CPU cluster PM enter notifier chain
124 * to save GIC and wakeupgen context.
126 if ((cx
->mpu_state
== PWRDM_POWER_RET
) &&
127 (cx
->mpu_logic_state
== PWRDM_POWER_OFF
))
128 cpu_cluster_pm_enter();
131 omap4_enter_lowpower(dev
->cpu
, cx
->cpu_state
);
132 cpu_done
[dev
->cpu
] = true;
134 /* Wakeup CPU1 only if it is not offlined */
135 if (dev
->cpu
== 0 && cpumask_test_cpu(1, cpu_online_mask
)) {
136 clkdm_wakeup(cpu_clkdm
[1]);
137 clkdm_allow_idle(cpu_clkdm
[1]);
141 * Call idle CPU PM exit notifier chain to restore
142 * VFP and per CPU IRQ context.
147 * Call idle CPU cluster PM exit notifier chain
148 * to restore GIC and wakeupgen context.
150 if ((cx
->mpu_state
== PWRDM_POWER_RET
) &&
151 (cx
->mpu_logic_state
== PWRDM_POWER_OFF
))
152 cpu_cluster_pm_exit();
155 cpuidle_coupled_parallel_barrier(dev
, &abort_barrier
);
156 cpu_done
[dev
->cpu
] = false;
163 static struct cpuidle_driver omap4_idle_driver
= {
164 .name
= "omap4_idle",
165 .owner
= THIS_MODULE
,
168 /* C1 - CPU0 ON + CPU1 ON + MPU ON */
169 .exit_latency
= 2 + 2,
170 .target_residency
= 5,
171 .flags
= CPUIDLE_FLAG_TIME_VALID
,
172 .enter
= omap_enter_idle_simple
,
174 .desc
= "CPUx ON, MPUSS ON"
177 /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
178 .exit_latency
= 328 + 440,
179 .target_residency
= 960,
180 .flags
= CPUIDLE_FLAG_TIME_VALID
| CPUIDLE_FLAG_COUPLED
|
181 CPUIDLE_FLAG_TIMER_STOP
,
182 .enter
= omap_enter_idle_coupled
,
184 .desc
= "CPUx OFF, MPUSS CSWR",
187 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
188 .exit_latency
= 460 + 518,
189 .target_residency
= 1100,
190 .flags
= CPUIDLE_FLAG_TIME_VALID
| CPUIDLE_FLAG_COUPLED
|
191 CPUIDLE_FLAG_TIMER_STOP
,
192 .enter
= omap_enter_idle_coupled
,
194 .desc
= "CPUx OFF, MPUSS OSWR",
197 .state_count
= ARRAY_SIZE(omap4_idle_data
),
198 .safe_state_index
= 0,
201 /* Public functions */
204 * omap4_idle_init - Init routine for OMAP4+ idle
206 * Registers the OMAP4+ specific cpuidle driver to the cpuidle
207 * framework with the valid set of states.
209 int __init
omap4_idle_init(void)
211 mpu_pd
= pwrdm_lookup("mpu_pwrdm");
212 cpu_pd
[0] = pwrdm_lookup("cpu0_pwrdm");
213 cpu_pd
[1] = pwrdm_lookup("cpu1_pwrdm");
214 if ((!mpu_pd
) || (!cpu_pd
[0]) || (!cpu_pd
[1]))
217 cpu_clkdm
[0] = clkdm_lookup("mpu0_clkdm");
218 cpu_clkdm
[1] = clkdm_lookup("mpu1_clkdm");
219 if (!cpu_clkdm
[0] || !cpu_clkdm
[1])
222 return cpuidle_register(&omap4_idle_driver
, cpu_online_mask
);