arch/arm/mach-omap2/dma.h

   1 /*
   2  *  OMAP2PLUS DMA channel definitions
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17  */
  18
  19 #ifndef __OMAP2PLUS_DMA_CHANNEL_H
  20 #define __OMAP2PLUS_DMA_CHANNEL_H
  21
  22
  23 /* DMA channels for 24xx */
  24 #define OMAP24XX_DMA_NO_DEVICE          0
  25 #define OMAP24XX_DMA_EXT_DMAREQ0        2       /* S_DMA_1 */
  26 #define OMAP24XX_DMA_EXT_DMAREQ1        3       /* S_DMA_2 */
  27 #define OMAP24XX_DMA_GPMC               4       /* S_DMA_3 */
  28 #define OMAP24XX_DMA_AES_TX             9       /* S_DMA_8 */
  29 #define OMAP24XX_DMA_AES_RX             10      /* S_DMA_9 */
  30 #define OMAP242X_DMA_EXT_DMAREQ2        14      /* S_DMA_13 */
  31 #define OMAP242X_DMA_EXT_DMAREQ3        15      /* S_DMA_14 */
  32 #define OMAP242X_DMA_EXT_DMAREQ4        16      /* S_DMA_15 */
  33 #define OMAP34XX_DMA_I2C3_TX            25      /* S_DMA_24 */
  34 #define OMAP34XX_DMA_I2C3_RX            26      /* S_DMA_25 */
  35 #define OMAP24XX_DMA_I2C1_TX            27      /* S_DMA_26 */
  36 #define OMAP24XX_DMA_I2C1_RX            28      /* S_DMA_27 */
  37 #define OMAP24XX_DMA_I2C2_TX            29      /* S_DMA_28 */
  38 #define OMAP24XX_DMA_I2C2_RX            30      /* S_DMA_29 */
  39 #define OMAP24XX_DMA_MMC2_TX            47      /* S_DMA_46 */
  40 #define OMAP24XX_DMA_MMC2_RX            48      /* S_DMA_47 */
  41 #define OMAP24XX_DMA_UART1_TX           49      /* S_DMA_48 */
  42 #define OMAP24XX_DMA_UART1_RX           50      /* S_DMA_49 */
  43 #define OMAP24XX_DMA_UART2_TX           51      /* S_DMA_50 */
  44 #define OMAP24XX_DMA_UART2_RX           52      /* S_DMA_51 */
  45 #define OMAP24XX_DMA_UART3_TX           53      /* S_DMA_52 */
  46 #define OMAP24XX_DMA_UART3_RX           54      /* S_DMA_53 */
  47 #define OMAP24XX_DMA_MMC1_TX            61      /* S_DMA_60 */
  48 #define OMAP24XX_DMA_MMC1_RX            62      /* S_DMA_61 */
  49 #define OMAP242X_DMA_EXT_DMAREQ5        64      /* S_DMA_63 */
  50 #define OMAP34XX_DMA_AES2_TX            65      /* S_DMA_64 */
  51 #define OMAP34XX_DMA_AES2_RX            66      /* S_DMA_65 */
  52 #define OMAP34XX_DMA_SHA1MD5_RX         69      /* S_DMA_68 */
  53
  54 #define OMAP36XX_DMA_UART4_TX           81      /* S_DMA_80 */
  55 #define OMAP36XX_DMA_UART4_RX           82      /* S_DMA_81 */
  56
  57 /* Only for AM35xx */
  58 #define AM35XX_DMA_UART4_TX             54
  59 #define AM35XX_DMA_UART4_RX             55
  60
  61 #endif /* __OMAP2PLUS_DMA_CHANNEL_H */