2 * linux/arch/arm/mach-omap2/hsmmc.c
4 * Copyright (C) 2007-2008 Texas Instruments
5 * Copyright (C) 2008 Nokia Corporation
6 * Author: Texas Instruments
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/slab.h>
14 #include <linux/string.h>
15 #include <linux/delay.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_data/gpio-omap.h>
20 #include "omap_device.h"
28 #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
30 static u16 control_pbias_offset
;
31 static u16 control_devconf1_offset
;
32 static u16 control_mmc1
;
34 #define HSMMC_NAME_LEN 9
36 #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
38 static int hsmmc_get_context_loss(struct device
*dev
)
40 return omap_pm_get_dev_context_loss_count(dev
);
44 #define hsmmc_get_context_loss NULL
47 static void omap_hsmmc1_before_set_reg(struct device
*dev
, int slot
,
48 int power_on
, int vdd
)
51 struct omap_mmc_platform_data
*mmc
= dev
->platform_data
;
53 if (mmc
->slots
[0].remux
)
54 mmc
->slots
[0].remux(dev
, slot
, power_on
);
57 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
58 * card with Vcc regulator (from twl4030 or whatever). OMAP has both
59 * 1.8V and 3.0V modes, controlled by the PBIAS register.
61 * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
62 * is most naturally TWL VSIM; those pins also use PBIAS.
64 * FIXME handle VMMC1A as needed ...
67 if (cpu_is_omap2430()) {
68 reg
= omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1
);
69 if ((1 << vdd
) >= MMC_VDD_30_31
)
70 reg
|= OMAP243X_MMC1_ACTIVE_OVERWRITE
;
72 reg
&= ~OMAP243X_MMC1_ACTIVE_OVERWRITE
;
73 omap_ctrl_writel(reg
, OMAP243X_CONTROL_DEVCONF1
);
76 if (mmc
->slots
[0].internal_clock
) {
77 reg
= omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0
);
78 reg
|= OMAP2_MMCSDIO1ADPCLKISEL
;
79 omap_ctrl_writel(reg
, OMAP2_CONTROL_DEVCONF0
);
82 reg
= omap_ctrl_readl(control_pbias_offset
);
83 if (cpu_is_omap3630()) {
84 /* Set MMC I/O to 52Mhz */
85 prog_io
= omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1
);
86 prog_io
|= OMAP3630_PRG_SDMMC1_SPEEDCTRL
;
87 omap_ctrl_writel(prog_io
, OMAP343X_CONTROL_PROG_IO1
);
89 reg
|= OMAP2_PBIASSPEEDCTRL0
;
91 reg
&= ~OMAP2_PBIASLITEPWRDNZ0
;
92 omap_ctrl_writel(reg
, control_pbias_offset
);
94 reg
= omap_ctrl_readl(control_pbias_offset
);
95 reg
&= ~OMAP2_PBIASLITEPWRDNZ0
;
96 omap_ctrl_writel(reg
, control_pbias_offset
);
100 static void omap_hsmmc1_after_set_reg(struct device
*dev
, int slot
,
101 int power_on
, int vdd
)
105 /* 100ms delay required for PBIAS configuration */
109 reg
= omap_ctrl_readl(control_pbias_offset
);
110 reg
|= (OMAP2_PBIASLITEPWRDNZ0
| OMAP2_PBIASSPEEDCTRL0
);
111 if ((1 << vdd
) <= MMC_VDD_165_195
)
112 reg
&= ~OMAP2_PBIASLITEVMODE0
;
114 reg
|= OMAP2_PBIASLITEVMODE0
;
115 omap_ctrl_writel(reg
, control_pbias_offset
);
117 reg
= omap_ctrl_readl(control_pbias_offset
);
118 reg
|= (OMAP2_PBIASSPEEDCTRL0
| OMAP2_PBIASLITEPWRDNZ0
|
119 OMAP2_PBIASLITEVMODE0
);
120 omap_ctrl_writel(reg
, control_pbias_offset
);
124 static void omap4_hsmmc1_before_set_reg(struct device
*dev
, int slot
,
125 int power_on
, int vdd
)
130 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
131 * card with Vcc regulator (from twl4030 or whatever). OMAP has both
132 * 1.8V and 3.0V modes, controlled by the PBIAS register.
134 reg
= omap4_ctrl_pad_readl(control_pbias_offset
);
135 reg
&= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK
|
136 OMAP4_MMC1_PWRDNZ_MASK
|
137 OMAP4_MMC1_PBIASLITE_VMODE_MASK
);
138 omap4_ctrl_pad_writel(reg
, control_pbias_offset
);
141 static void omap4_hsmmc1_after_set_reg(struct device
*dev
, int slot
,
142 int power_on
, int vdd
)
145 unsigned long timeout
;
148 reg
= omap4_ctrl_pad_readl(control_pbias_offset
);
149 reg
|= OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK
;
150 if ((1 << vdd
) <= MMC_VDD_165_195
)
151 reg
&= ~OMAP4_MMC1_PBIASLITE_VMODE_MASK
;
153 reg
|= OMAP4_MMC1_PBIASLITE_VMODE_MASK
;
154 reg
|= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK
|
155 OMAP4_MMC1_PWRDNZ_MASK
);
156 omap4_ctrl_pad_writel(reg
, control_pbias_offset
);
158 timeout
= jiffies
+ msecs_to_jiffies(5);
160 reg
= omap4_ctrl_pad_readl(control_pbias_offset
);
161 if (!(reg
& OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK
))
163 usleep_range(100, 200);
164 } while (!time_after(jiffies
, timeout
));
166 if (reg
& OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK
) {
167 pr_err("Pbias Voltage is not same as LDO\n");
168 /* Caution : On VMODE_ERROR Power Down MMC IO */
169 reg
&= ~(OMAP4_MMC1_PWRDNZ_MASK
);
170 omap4_ctrl_pad_writel(reg
, control_pbias_offset
);
175 static void hsmmc2_select_input_clk_src(struct omap_mmc_platform_data
*mmc
)
179 reg
= omap_ctrl_readl(control_devconf1_offset
);
180 if (mmc
->slots
[0].internal_clock
)
181 reg
|= OMAP2_MMCSDIO2ADPCLKISEL
;
183 reg
&= ~OMAP2_MMCSDIO2ADPCLKISEL
;
184 omap_ctrl_writel(reg
, control_devconf1_offset
);
187 static void hsmmc2_before_set_reg(struct device
*dev
, int slot
,
188 int power_on
, int vdd
)
190 struct omap_mmc_platform_data
*mmc
= dev
->platform_data
;
192 if (mmc
->slots
[0].remux
)
193 mmc
->slots
[0].remux(dev
, slot
, power_on
);
196 hsmmc2_select_input_clk_src(mmc
);
199 static int am35x_hsmmc2_set_power(struct device
*dev
, int slot
,
200 int power_on
, int vdd
)
202 struct omap_mmc_platform_data
*mmc
= dev
->platform_data
;
205 hsmmc2_select_input_clk_src(mmc
);
210 static int nop_mmc_set_power(struct device
*dev
, int slot
, int power_on
,
216 static inline void omap_hsmmc_mux(struct omap_mmc_platform_data
*mmc_controller
,
219 if (gpio_is_valid(mmc_controller
->slots
[0].switch_pin
) &&
220 (mmc_controller
->slots
[0].switch_pin
< OMAP_MAX_GPIO_LINES
))
221 omap_mux_init_gpio(mmc_controller
->slots
[0].switch_pin
,
222 OMAP_PIN_INPUT_PULLUP
);
223 if (gpio_is_valid(mmc_controller
->slots
[0].gpio_wp
) &&
224 (mmc_controller
->slots
[0].gpio_wp
< OMAP_MAX_GPIO_LINES
))
225 omap_mux_init_gpio(mmc_controller
->slots
[0].gpio_wp
,
226 OMAP_PIN_INPUT_PULLUP
);
227 if (cpu_is_omap34xx()) {
228 if (controller_nr
== 0) {
229 omap_mux_init_signal("sdmmc1_clk",
230 OMAP_PIN_INPUT_PULLUP
);
231 omap_mux_init_signal("sdmmc1_cmd",
232 OMAP_PIN_INPUT_PULLUP
);
233 omap_mux_init_signal("sdmmc1_dat0",
234 OMAP_PIN_INPUT_PULLUP
);
235 if (mmc_controller
->slots
[0].caps
&
236 (MMC_CAP_4_BIT_DATA
| MMC_CAP_8_BIT_DATA
)) {
237 omap_mux_init_signal("sdmmc1_dat1",
238 OMAP_PIN_INPUT_PULLUP
);
239 omap_mux_init_signal("sdmmc1_dat2",
240 OMAP_PIN_INPUT_PULLUP
);
241 omap_mux_init_signal("sdmmc1_dat3",
242 OMAP_PIN_INPUT_PULLUP
);
244 if (mmc_controller
->slots
[0].caps
&
245 MMC_CAP_8_BIT_DATA
) {
246 omap_mux_init_signal("sdmmc1_dat4",
247 OMAP_PIN_INPUT_PULLUP
);
248 omap_mux_init_signal("sdmmc1_dat5",
249 OMAP_PIN_INPUT_PULLUP
);
250 omap_mux_init_signal("sdmmc1_dat6",
251 OMAP_PIN_INPUT_PULLUP
);
252 omap_mux_init_signal("sdmmc1_dat7",
253 OMAP_PIN_INPUT_PULLUP
);
256 if (controller_nr
== 1) {
258 omap_mux_init_signal("sdmmc2_clk",
259 OMAP_PIN_INPUT_PULLUP
);
260 omap_mux_init_signal("sdmmc2_cmd",
261 OMAP_PIN_INPUT_PULLUP
);
262 omap_mux_init_signal("sdmmc2_dat0",
263 OMAP_PIN_INPUT_PULLUP
);
266 * For 8 wire configurations, Lines DAT4, 5, 6 and 7
267 * need to be muxed in the board-*.c files
269 if (mmc_controller
->slots
[0].caps
&
270 (MMC_CAP_4_BIT_DATA
| MMC_CAP_8_BIT_DATA
)) {
271 omap_mux_init_signal("sdmmc2_dat1",
272 OMAP_PIN_INPUT_PULLUP
);
273 omap_mux_init_signal("sdmmc2_dat2",
274 OMAP_PIN_INPUT_PULLUP
);
275 omap_mux_init_signal("sdmmc2_dat3",
276 OMAP_PIN_INPUT_PULLUP
);
278 if (mmc_controller
->slots
[0].caps
&
279 MMC_CAP_8_BIT_DATA
) {
280 omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4",
281 OMAP_PIN_INPUT_PULLUP
);
282 omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5",
283 OMAP_PIN_INPUT_PULLUP
);
284 omap_mux_init_signal("sdmmc2_dat6.sdmmc2_dat6",
285 OMAP_PIN_INPUT_PULLUP
);
286 omap_mux_init_signal("sdmmc2_dat7.sdmmc2_dat7",
287 OMAP_PIN_INPUT_PULLUP
);
292 * For MMC3 the pins need to be muxed in the board-*.c files
297 static int __init
omap_hsmmc_pdata_init(struct omap2_hsmmc_info
*c
,
298 struct omap_mmc_platform_data
*mmc
)
302 hc_name
= kzalloc(sizeof(char) * (HSMMC_NAME_LEN
+ 1), GFP_KERNEL
);
304 pr_err("Cannot allocate memory for controller slot name\n");
310 strncpy(hc_name
, c
->name
, HSMMC_NAME_LEN
);
312 snprintf(hc_name
, (HSMMC_NAME_LEN
+ 1), "mmc%islot%i",
314 mmc
->slots
[0].name
= hc_name
;
316 mmc
->slots
[0].caps
= c
->caps
;
317 mmc
->slots
[0].pm_caps
= c
->pm_caps
;
318 mmc
->slots
[0].internal_clock
= !c
->ext_clock
;
319 mmc
->max_freq
= c
->max_freq
;
320 if (cpu_is_omap44xx())
321 mmc
->reg_offset
= OMAP4_MMC_REG_OFFSET
;
325 mmc
->get_context_loss_count
= hsmmc_get_context_loss
;
327 mmc
->slots
[0].switch_pin
= c
->gpio_cd
;
328 mmc
->slots
[0].gpio_wp
= c
->gpio_wp
;
330 mmc
->slots
[0].remux
= c
->remux
;
331 mmc
->slots
[0].init_card
= c
->init_card
;
334 mmc
->slots
[0].cover
= 1;
337 mmc
->slots
[0].nonremovable
= 1;
340 mmc
->slots
[0].power_saving
= 1;
343 mmc
->slots
[0].no_off
= 1;
346 mmc
->slots
[0].no_regulator_off_init
= c
->no_off_init
;
348 if (c
->vcc_aux_disable_is_sleep
)
349 mmc
->slots
[0].vcc_aux_disable_is_sleep
= 1;
352 * NOTE: MMC slots should have a Vcc regulator set up.
353 * This may be from a TWL4030-family chip, another
354 * controllable regulator, or a fixed supply.
356 * temporary HACK: ocr_mask instead of fixed supply
359 mmc
->slots
[0].ocr_mask
= MMC_VDD_165_195
|
366 mmc
->slots
[0].ocr_mask
= c
->ocr_mask
;
368 if (!soc_is_am35xx())
369 mmc
->slots
[0].features
|= HSMMC_HAS_PBIAS
;
371 if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0
))
372 mmc
->slots
[0].features
|= HSMMC_HAS_UPDATED_RESET
;
376 if (mmc
->slots
[0].features
& HSMMC_HAS_PBIAS
) {
377 /* on-chip level shifting via PBIAS0/PBIAS1 */
378 if (cpu_is_omap44xx()) {
379 mmc
->slots
[0].before_set_reg
=
380 omap4_hsmmc1_before_set_reg
;
381 mmc
->slots
[0].after_set_reg
=
382 omap4_hsmmc1_after_set_reg
;
384 mmc
->slots
[0].before_set_reg
=
385 omap_hsmmc1_before_set_reg
;
386 mmc
->slots
[0].after_set_reg
=
387 omap_hsmmc1_after_set_reg
;
392 mmc
->slots
[0].set_power
= nop_mmc_set_power
;
394 /* OMAP3630 HSMMC1 supports only 4-bit */
395 if (cpu_is_omap3630() &&
396 (c
->caps
& MMC_CAP_8_BIT_DATA
)) {
397 c
->caps
&= ~MMC_CAP_8_BIT_DATA
;
398 c
->caps
|= MMC_CAP_4_BIT_DATA
;
399 mmc
->slots
[0].caps
= c
->caps
;
404 mmc
->slots
[0].set_power
= am35x_hsmmc2_set_power
;
408 if (c
->transceiver
&& (c
->caps
& MMC_CAP_8_BIT_DATA
)) {
409 c
->caps
&= ~MMC_CAP_8_BIT_DATA
;
410 c
->caps
|= MMC_CAP_4_BIT_DATA
;
412 if (mmc
->slots
[0].features
& HSMMC_HAS_PBIAS
) {
413 /* off-chip level shifting, or none */
414 mmc
->slots
[0].before_set_reg
= hsmmc2_before_set_reg
;
415 mmc
->slots
[0].after_set_reg
= NULL
;
421 mmc
->slots
[0].before_set_reg
= NULL
;
422 mmc
->slots
[0].after_set_reg
= NULL
;
425 pr_err("MMC%d configuration not supported!\n", c
->mmc
);
432 static int omap_hsmmc_done
;
434 void omap_hsmmc_late_init(struct omap2_hsmmc_info
*c
)
436 struct platform_device
*pdev
;
437 struct omap_mmc_platform_data
*mmc_pdata
;
440 if (omap_hsmmc_done
!= 1)
445 for (; c
->mmc
; c
++) {
453 mmc_pdata
= pdev
->dev
.platform_data
;
457 mmc_pdata
->slots
[0].switch_pin
= c
->gpio_cd
;
458 mmc_pdata
->slots
[0].gpio_wp
= c
->gpio_wp
;
460 res
= omap_device_register(pdev
);
462 pr_err("Could not late init MMC %s\n",
467 #define MAX_OMAP_MMC_HWMOD_NAME_LEN 16
469 static void __init
omap_hsmmc_init_one(struct omap2_hsmmc_info
*hsmmcinfo
,
472 struct omap_hwmod
*oh
;
473 struct omap_hwmod
*ohs
[1];
474 struct omap_device
*od
;
475 struct platform_device
*pdev
;
476 char oh_name
[MAX_OMAP_MMC_HWMOD_NAME_LEN
];
477 struct omap_mmc_platform_data
*mmc_data
;
478 struct omap_mmc_dev_attr
*mmc_dev_attr
;
482 mmc_data
= kzalloc(sizeof(struct omap_mmc_platform_data
), GFP_KERNEL
);
484 pr_err("Cannot allocate memory for mmc device!\n");
488 res
= omap_hsmmc_pdata_init(hsmmcinfo
, mmc_data
);
492 omap_hsmmc_mux(mmc_data
, (ctrl_nr
- 1));
495 res
= snprintf(oh_name
, MAX_OMAP_MMC_HWMOD_NAME_LEN
,
497 WARN(res
>= MAX_OMAP_MMC_HWMOD_NAME_LEN
,
498 "String buffer overflow in MMC%d device setup\n", ctrl_nr
);
500 oh
= omap_hwmod_lookup(oh_name
);
502 pr_err("Could not look up %s\n", oh_name
);
506 if (oh
->dev_attr
!= NULL
) {
507 mmc_dev_attr
= oh
->dev_attr
;
508 mmc_data
->controller_flags
= mmc_dev_attr
->flags
;
510 * erratum 2.1.1.128 doesn't apply if board has
511 * a transceiver is attached
513 if (hsmmcinfo
->transceiver
)
514 mmc_data
->controller_flags
&=
515 ~OMAP_HSMMC_BROKEN_MULTIBLOCK_READ
;
518 pdev
= platform_device_alloc(name
, ctrl_nr
- 1);
520 pr_err("Could not allocate pdev for %s\n", name
);
523 dev_set_name(&pdev
->dev
, "%s.%d", pdev
->name
, pdev
->id
);
525 od
= omap_device_alloc(pdev
, ohs
, 1, NULL
, 0);
527 pr_err("Could not allocate od for %s\n", name
);
531 res
= platform_device_add_data(pdev
, mmc_data
,
532 sizeof(struct omap_mmc_platform_data
));
534 pr_err("Could not add pdata for %s\n", name
);
538 hsmmcinfo
->pdev
= pdev
;
540 if (hsmmcinfo
->deferred
)
543 res
= omap_device_register(pdev
);
545 pr_err("Could not register od for %s\n", name
);
552 omap_device_delete(od
);
555 platform_device_put(pdev
);
558 kfree(mmc_data
->slots
[0].name
);
564 void __init
omap_hsmmc_init(struct omap2_hsmmc_info
*controllers
)
573 if (!cpu_is_omap44xx()) {
574 if (cpu_is_omap2430()) {
575 control_pbias_offset
= OMAP243X_CONTROL_PBIAS_LITE
;
576 control_devconf1_offset
= OMAP243X_CONTROL_DEVCONF1
;
578 control_pbias_offset
= OMAP343X_CONTROL_PBIAS_LITE
;
579 control_devconf1_offset
= OMAP343X_CONTROL_DEVCONF1
;
582 control_pbias_offset
=
583 OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PBIASLITE
;
584 control_mmc1
= OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC1
;
585 reg
= omap4_ctrl_pad_readl(control_mmc1
);
586 reg
|= (OMAP4_SDMMC1_PUSTRENGTH_GRP0_MASK
|
587 OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK
);
588 reg
&= ~(OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK
|
589 OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK
);
590 reg
|= (OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK
|
591 OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK
|
592 OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK
);
593 omap4_ctrl_pad_writel(reg
, control_mmc1
);
596 for (; controllers
->mmc
; controllers
++)
597 omap_hsmmc_init_one(controllers
, controllers
->mmc
);