2 * linux/arch/arm/mach-omap2/id.c
4 * OMAP2 CPU identification code
6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
9 * Copyright (C) 2009-11 Texas Instruments
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
21 #include <linux/slab.h>
24 #include <linux/sys_soc.h>
27 #include <asm/cputype.h>
36 #define OMAP4_SILICON_TYPE_STANDARD 0x01
37 #define OMAP4_SILICON_TYPE_PERFORMANCE 0x02
39 #define OMAP_SOC_MAX_NAME_LENGTH 16
41 static unsigned int omap_revision
;
42 static char soc_name
[OMAP_SOC_MAX_NAME_LENGTH
];
43 static char soc_rev
[OMAP_SOC_MAX_NAME_LENGTH
];
46 unsigned int omap_rev(void)
50 EXPORT_SYMBOL(omap_rev
);
56 if (cpu_is_omap24xx()) {
57 val
= omap_ctrl_readl(OMAP24XX_CONTROL_STATUS
);
58 } else if (soc_is_am33xx()) {
59 val
= omap_ctrl_readl(AM33XX_CONTROL_STATUS
);
60 } else if (cpu_is_omap34xx()) {
61 val
= omap_ctrl_readl(OMAP343X_CONTROL_STATUS
);
62 } else if (cpu_is_omap44xx()) {
63 val
= omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS
);
64 } else if (soc_is_omap54xx()) {
65 val
= omap_ctrl_readl(OMAP5XXX_CONTROL_STATUS
);
66 val
&= OMAP5_DEVICETYPE_MASK
;
70 pr_err("Cannot detect omap type!\n");
74 val
&= OMAP2_DEVICETYPE_MASK
;
80 EXPORT_SYMBOL(omap_type
);
83 /*----------------------------------------------------------------------------*/
85 #define OMAP_TAP_IDCODE 0x0204
86 #define OMAP_TAP_DIE_ID_0 0x0218
87 #define OMAP_TAP_DIE_ID_1 0x021C
88 #define OMAP_TAP_DIE_ID_2 0x0220
89 #define OMAP_TAP_DIE_ID_3 0x0224
91 #define OMAP_TAP_DIE_ID_44XX_0 0x0200
92 #define OMAP_TAP_DIE_ID_44XX_1 0x0208
93 #define OMAP_TAP_DIE_ID_44XX_2 0x020c
94 #define OMAP_TAP_DIE_ID_44XX_3 0x0210
96 #define read_tap_reg(reg) __raw_readl(tap_base + (reg))
99 u16 hawkeye
; /* Silicon type (Hawkeye id) */
100 u8 dev
; /* Device type from production_id reg */
101 u32 type
; /* Combined type id copied to omap_revision */
104 /* Register values to detect the OMAP version */
105 static struct omap_id omap_ids
[] __initdata
= {
106 { .hawkeye
= 0xb5d9, .dev
= 0x0, .type
= 0x24200024 },
107 { .hawkeye
= 0xb5d9, .dev
= 0x1, .type
= 0x24201024 },
108 { .hawkeye
= 0xb5d9, .dev
= 0x2, .type
= 0x24202024 },
109 { .hawkeye
= 0xb5d9, .dev
= 0x4, .type
= 0x24220024 },
110 { .hawkeye
= 0xb5d9, .dev
= 0x8, .type
= 0x24230024 },
111 { .hawkeye
= 0xb68a, .dev
= 0x0, .type
= 0x24300024 },
114 static void __iomem
*tap_base
;
115 static u16 tap_prod_id
;
117 void omap_get_die_id(struct omap_die_id
*odi
)
119 if (cpu_is_omap44xx() || soc_is_omap54xx()) {
120 odi
->id_0
= read_tap_reg(OMAP_TAP_DIE_ID_44XX_0
);
121 odi
->id_1
= read_tap_reg(OMAP_TAP_DIE_ID_44XX_1
);
122 odi
->id_2
= read_tap_reg(OMAP_TAP_DIE_ID_44XX_2
);
123 odi
->id_3
= read_tap_reg(OMAP_TAP_DIE_ID_44XX_3
);
127 odi
->id_0
= read_tap_reg(OMAP_TAP_DIE_ID_0
);
128 odi
->id_1
= read_tap_reg(OMAP_TAP_DIE_ID_1
);
129 odi
->id_2
= read_tap_reg(OMAP_TAP_DIE_ID_2
);
130 odi
->id_3
= read_tap_reg(OMAP_TAP_DIE_ID_3
);
133 void __init
omap2xxx_check_revision(void)
139 struct omap_die_id odi
;
141 idcode
= read_tap_reg(OMAP_TAP_IDCODE
);
142 prod_id
= read_tap_reg(tap_prod_id
);
143 hawkeye
= (idcode
>> 12) & 0xffff;
144 rev
= (idcode
>> 28) & 0x0f;
145 dev_type
= (prod_id
>> 16) & 0x0f;
146 omap_get_die_id(&odi
);
148 pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
149 idcode
, rev
, hawkeye
, (idcode
>> 1) & 0x7ff);
150 pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n", odi
.id_0
);
151 pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
152 odi
.id_1
, (odi
.id_1
>> 28) & 0xf);
153 pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n", odi
.id_2
);
154 pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n", odi
.id_3
);
155 pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
158 /* Check hawkeye ids */
159 for (i
= 0; i
< ARRAY_SIZE(omap_ids
); i
++) {
160 if (hawkeye
== omap_ids
[i
].hawkeye
)
164 if (i
== ARRAY_SIZE(omap_ids
)) {
165 printk(KERN_ERR
"Unknown OMAP CPU id\n");
169 for (j
= i
; j
< ARRAY_SIZE(omap_ids
); j
++) {
170 if (dev_type
== omap_ids
[j
].dev
)
174 if (j
== ARRAY_SIZE(omap_ids
)) {
175 pr_err("Unknown OMAP device type. Handling it as OMAP%04x\n",
176 omap_ids
[i
].type
>> 16);
180 sprintf(soc_name
, "OMAP%04x", omap_rev() >> 16);
181 sprintf(soc_rev
, "ES%x", (omap_rev() >> 12) & 0xf);
183 pr_info("%s", soc_name
);
184 if ((omap_rev() >> 8) & 0x0f)
185 pr_info("%s", soc_rev
);
189 #define OMAP3_SHOW_FEATURE(feat) \
190 if (omap3_has_ ##feat()) \
193 static void __init
omap3_cpuinfo(void)
195 const char *cpu_name
;
198 * OMAP3430 and OMAP3530 are assumed to be same.
200 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
201 * on available features. Upon detection, update the CPU id
202 * and CPU class bits.
204 if (cpu_is_omap3630()) {
205 cpu_name
= "OMAP3630";
206 } else if (soc_is_am35xx()) {
207 cpu_name
= (omap3_has_sgx()) ? "AM3517" : "AM3505";
208 } else if (cpu_is_ti816x()) {
210 } else if (soc_is_am335x()) {
212 } else if (cpu_is_ti814x()) {
214 } else if (omap3_has_iva() && omap3_has_sgx()) {
215 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
216 cpu_name
= "OMAP3430/3530";
217 } else if (omap3_has_iva()) {
218 cpu_name
= "OMAP3525";
219 } else if (omap3_has_sgx()) {
220 cpu_name
= "OMAP3515";
222 cpu_name
= "OMAP3503";
225 sprintf(soc_name
, "%s", cpu_name
);
227 /* Print verbose information */
228 pr_info("%s %s (", soc_name
, soc_rev
);
230 OMAP3_SHOW_FEATURE(l2cache
);
231 OMAP3_SHOW_FEATURE(iva
);
232 OMAP3_SHOW_FEATURE(sgx
);
233 OMAP3_SHOW_FEATURE(neon
);
234 OMAP3_SHOW_FEATURE(isp
);
235 OMAP3_SHOW_FEATURE(192mhz_clk
);
240 #define OMAP3_CHECK_FEATURE(status,feat) \
241 if (((status & OMAP3_ ##feat## _MASK) \
242 >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \
243 omap_features |= OMAP3_HAS_ ##feat; \
246 void __init
omap3xxx_check_features(void)
252 status
= omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS
);
254 OMAP3_CHECK_FEATURE(status
, L2CACHE
);
255 OMAP3_CHECK_FEATURE(status
, IVA
);
256 OMAP3_CHECK_FEATURE(status
, SGX
);
257 OMAP3_CHECK_FEATURE(status
, NEON
);
258 OMAP3_CHECK_FEATURE(status
, ISP
);
259 if (cpu_is_omap3630())
260 omap_features
|= OMAP3_HAS_192MHZ_CLK
;
261 if (cpu_is_omap3430() || cpu_is_omap3630())
262 omap_features
|= OMAP3_HAS_IO_WAKEUP
;
263 if (cpu_is_omap3630() || omap_rev() == OMAP3430_REV_ES3_1
||
264 omap_rev() == OMAP3430_REV_ES3_1_2
)
265 omap_features
|= OMAP3_HAS_IO_CHAIN_CTRL
;
267 omap_features
|= OMAP3_HAS_SDRC
;
271 * - The am35x Chip ID register has bits 12, 7:5, and 3:2 marked as
272 * reserved and therefore return 0 when read. Unfortunately,
273 * OMAP3_CHECK_FEATURE() will interpret some of those zeroes to
274 * mean that a feature is present even though it isn't so clear
275 * the incorrectly set feature bits.
278 omap_features
&= ~(OMAP3_HAS_IVA
| OMAP3_HAS_ISP
);
281 * TODO: Get additional info (where applicable)
282 * e.g. Size of L2 cache.
288 void __init
omap4xxx_check_features(void)
293 (read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1
) >> 16) & 0x03;
295 if (si_type
== OMAP4_SILICON_TYPE_PERFORMANCE
)
296 omap_features
= OMAP4_HAS_PERF_SILICON
;
299 void __init
ti81xx_check_features(void)
301 omap_features
= OMAP3_HAS_NEON
;
305 void __init
omap3xxx_check_revision(void)
313 * We cannot access revision registers on ES1.0.
314 * If the processor type is Cortex-A8 and the revision is 0x0
315 * it means its Cortex r0p0 which is 3430 ES1.0.
317 cpuid
= read_cpuid_id();
318 if ((((cpuid
>> 4) & 0xfff) == 0xc08) && ((cpuid
& 0xf) == 0x0)) {
319 omap_revision
= OMAP3430_REV_ES1_0
;
325 * Detection for 34xx ES2.0 and above can be done with just
326 * hawkeye and rev. See TRM 1.5.2 Device Identification.
327 * Note that rev does not map directly to our defined processor
328 * revision numbers as ES1.0 uses value 0.
330 idcode
= read_tap_reg(OMAP_TAP_IDCODE
);
331 hawkeye
= (idcode
>> 12) & 0xffff;
332 rev
= (idcode
>> 28) & 0xff;
336 /* Handle 34xx/35xx devices */
338 case 0: /* Take care of early samples */
340 omap_revision
= OMAP3430_REV_ES2_0
;
344 omap_revision
= OMAP3430_REV_ES2_1
;
348 omap_revision
= OMAP3430_REV_ES3_0
;
352 omap_revision
= OMAP3430_REV_ES3_1
;
358 /* Use the latest known revision as default */
359 omap_revision
= OMAP3430_REV_ES3_1_2
;
365 * Handle OMAP/AM 3505/3517 devices
367 * Set the device to be OMAP3517 here. Actual device
368 * is identified later based on the features.
372 omap_revision
= AM35XX_REV_ES1_0
;
378 omap_revision
= AM35XX_REV_ES1_1
;
383 /* Handle 36xx devices */
386 case 0: /* Take care of early samples */
387 omap_revision
= OMAP3630_REV_ES1_0
;
391 omap_revision
= OMAP3630_REV_ES1_1
;
397 omap_revision
= OMAP3630_REV_ES1_2
;
404 omap_revision
= TI8168_REV_ES1_0
;
410 omap_revision
= TI8168_REV_ES1_1
;
418 omap_revision
= AM335X_REV_ES1_0
;
422 omap_revision
= AM335X_REV_ES2_0
;
428 omap_revision
= AM335X_REV_ES2_1
;
438 omap_revision
= TI8148_REV_ES1_0
;
442 omap_revision
= TI8148_REV_ES2_0
;
448 omap_revision
= TI8148_REV_ES2_1
;
454 /* Unknown default to latest silicon rev as default */
455 omap_revision
= OMAP3630_REV_ES1_2
;
457 pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
459 sprintf(soc_rev
, "ES%s", cpu_rev
);
462 void __init
omap4xxx_check_revision(void)
469 * The IC rev detection is done with hawkeye and rev.
470 * Note that rev does not map directly to defined processor
471 * revision numbers as ES1.0 uses value 0.
473 idcode
= read_tap_reg(OMAP_TAP_IDCODE
);
474 hawkeye
= (idcode
>> 12) & 0xffff;
475 rev
= (idcode
>> 28) & 0xf;
478 * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0
479 * Use ARM register to detect the correct ES version
481 if (!rev
&& (hawkeye
!= 0xb94e) && (hawkeye
!= 0xb975)) {
482 idcode
= read_cpuid_id();
483 rev
= (idcode
& 0xf) - 1;
490 omap_revision
= OMAP4430_REV_ES1_0
;
494 omap_revision
= OMAP4430_REV_ES2_0
;
500 omap_revision
= OMAP4430_REV_ES2_1
;
503 omap_revision
= OMAP4430_REV_ES2_2
;
507 omap_revision
= OMAP4430_REV_ES2_3
;
513 omap_revision
= OMAP4460_REV_ES1_0
;
517 omap_revision
= OMAP4460_REV_ES1_1
;
525 omap_revision
= OMAP4470_REV_ES1_0
;
530 /* Unknown default to latest silicon rev as default */
531 omap_revision
= OMAP4430_REV_ES2_3
;
534 sprintf(soc_name
, "OMAP%04x", omap_rev() >> 16);
535 sprintf(soc_rev
, "ES%d.%d", (omap_rev() >> 12) & 0xf,
536 (omap_rev() >> 8) & 0xf);
537 pr_info("%s %s\n", soc_name
, soc_rev
);
540 void __init
omap5xxx_check_revision(void)
546 idcode
= read_tap_reg(OMAP_TAP_IDCODE
);
547 hawkeye
= (idcode
>> 12) & 0xffff;
548 rev
= (idcode
>> 28) & 0xff;
553 omap_revision
= OMAP5430_REV_ES1_0
;
557 omap_revision
= OMAP5430_REV_ES2_0
;
564 omap_revision
= OMAP5432_REV_ES1_0
;
568 omap_revision
= OMAP5432_REV_ES2_0
;
573 /* Unknown default to latest silicon rev as default*/
574 omap_revision
= OMAP5430_REV_ES2_0
;
577 sprintf(soc_name
, "OMAP%04x", omap_rev() >> 16);
578 sprintf(soc_rev
, "ES%d.0", (omap_rev() >> 12) & 0xf);
580 pr_info("%s %s\n", soc_name
, soc_rev
);
584 * Set up things for map_io and processor detection later on. Gets called
585 * pretty much first thing from board init. For multi-omap, this gets
586 * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
587 * detect the exact revision later on in omap2_detect_revision() once map_io
590 void __init
omap2_set_globals_tap(u32
class, void __iomem
*tap
)
592 omap_revision
= class;
595 /* XXX What is this intended to do? */
596 if (cpu_is_omap34xx())
597 tap_prod_id
= 0x0210;
599 tap_prod_id
= 0x0208;
602 #ifdef CONFIG_SOC_BUS
604 static const char const *omap_types
[] = {
605 [OMAP2_DEVICE_TYPE_TEST
] = "TST",
606 [OMAP2_DEVICE_TYPE_EMU
] = "EMU",
607 [OMAP2_DEVICE_TYPE_SEC
] = "HS",
608 [OMAP2_DEVICE_TYPE_GP
] = "GP",
609 [OMAP2_DEVICE_TYPE_BAD
] = "BAD",
612 static const char * __init
omap_get_family(void)
614 if (cpu_is_omap24xx())
615 return kasprintf(GFP_KERNEL
, "OMAP2");
616 else if (cpu_is_omap34xx())
617 return kasprintf(GFP_KERNEL
, "OMAP3");
618 else if (cpu_is_omap44xx())
619 return kasprintf(GFP_KERNEL
, "OMAP4");
620 else if (soc_is_omap54xx())
621 return kasprintf(GFP_KERNEL
, "OMAP5");
623 return kasprintf(GFP_KERNEL
, "Unknown");
626 static ssize_t
omap_get_type(struct device
*dev
,
627 struct device_attribute
*attr
,
630 return sprintf(buf
, "%s\n", omap_types
[omap_type()]);
633 static struct device_attribute omap_soc_attr
=
634 __ATTR(type
, S_IRUGO
, omap_get_type
, NULL
);
636 void __init
omap_soc_device_init(void)
638 struct device
*parent
;
639 struct soc_device
*soc_dev
;
640 struct soc_device_attribute
*soc_dev_attr
;
642 soc_dev_attr
= kzalloc(sizeof(*soc_dev_attr
), GFP_KERNEL
);
646 soc_dev_attr
->machine
= soc_name
;
647 soc_dev_attr
->family
= omap_get_family();
648 soc_dev_attr
->revision
= soc_rev
;
650 soc_dev
= soc_device_register(soc_dev_attr
);
651 if (IS_ERR(soc_dev
)) {
656 parent
= soc_device_to_device(soc_dev
);
657 device_create_file(parent
, &omap_soc_attr
);
659 #endif /* CONFIG_SOC_BUS */