arch/arm/mach-omap2/mcbsp.c

   1 /*
   2  * linux/arch/arm/mach-omap2/mcbsp.c
   3  *
   4  * Copyright (C) 2008 Instituto Nokia de Tecnologia
   5  * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Multichannel mode not supported.
  12  */
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/clk.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/slab.h>
  20
  21 #include <plat/dma.h>
  22 #include <plat/cpu.h>
  23 #include <plat/mcbsp.h>
  24 #include <plat/omap_device.h>
  25 #include <linux/pm_runtime.h>
  26
  27 #include "control.h"
  28
  29 /*
  30  * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
  31  * Sidetone needs non-gated ICLK and sidetone autoidle is broken.
  32  */
  33 #include "cm2xxx_3xxx.h"
  34 #include "cm-regbits-34xx.h"
  35
  36 /* McBSP1 internal signal muxing function for OMAP2/3 */
  37 static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal,
  38                                    const char *src)
  39 {
  40         u32 v;
  41
  42         v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  43
  44         if (!strcmp(signal, "clkr")) {
  45                 if (!strcmp(src, "clkr"))
  46                         v &= ~OMAP2_MCBSP1_CLKR_MASK;
  47                 else if (!strcmp(src, "clkx"))
  48                         v |= OMAP2_MCBSP1_CLKR_MASK;
  49                 else
  50                         return -EINVAL;
  51         } else if (!strcmp(signal, "fsr")) {
  52                 if (!strcmp(src, "fsr"))
  53                         v &= ~OMAP2_MCBSP1_FSR_MASK;
  54                 else if (!strcmp(src, "fsx"))
  55                         v |= OMAP2_MCBSP1_FSR_MASK;
  56                 else
  57                         return -EINVAL;
  58         } else {
  59                 return -EINVAL;
  60         }
  61
  62         omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
  63
  64         return 0;
  65 }
  66
  67 /* McBSP4 internal signal muxing function for OMAP4 */
  68 #define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX     (1 << 31)
  69 #define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX    (1 << 30)
  70 static int omap4_mcbsp4_mux_rx_clk(struct device *dev, const char *signal,
  71                                    const char *src)
  72 {
  73         u32 v;
  74
  75         /*
  76          * In CONTROL_MCBSPLP register only bit 30 (CLKR mux), and bit 31 (FSR
  77          * mux) is used */
  78         v = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP);
  79
  80         if (!strcmp(signal, "clkr")) {
  81                 if (!strcmp(src, "clkr"))
  82                         v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX;
  83                 else if (!strcmp(src, "clkx"))
  84                         v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX;
  85                 else
  86                         return -EINVAL;
  87         } else if (!strcmp(signal, "fsr")) {
  88                 if (!strcmp(src, "fsr"))
  89                         v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX;
  90                 else if (!strcmp(src, "fsx"))
  91                         v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX;
  92                 else
  93                         return -EINVAL;
  94         } else {
  95                 return -EINVAL;
  96         }
  97
  98         omap4_ctrl_pad_writel(v, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP);
  99
 100         return 0;
 101 }
 102
 103 /* McBSP CLKS source switching function */
 104 static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk,
 105                                    const char *src)
 106 {
 107         struct clk *fck_src;
 108         char *fck_src_name;
 109         int r;
 110
 111         if (!strcmp(src, "clks_ext"))
 112                 fck_src_name = "pad_fck";
 113         else if (!strcmp(src, "clks_fclk"))
 114                 fck_src_name = "prcm_fck";
 115         else
 116                 return -EINVAL;
 117
 118         fck_src = clk_get(dev, fck_src_name);
 119         if (IS_ERR_OR_NULL(fck_src)) {
 120                 pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks",
 121                        fck_src_name);
 122                 return -EINVAL;
 123         }
 124
 125         pm_runtime_put_sync(dev);
 126
 127         r = clk_set_parent(clk, fck_src);
 128         if (IS_ERR_VALUE(r)) {
 129                 pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n",
 130                        "clks", fck_src_name);
 131                 clk_put(fck_src);
 132                 return -EINVAL;
 133         }
 134
 135         pm_runtime_get_sync(dev);
 136
 137         clk_put(fck_src);
 138
 139         return 0;
 140 }
 141
 142 static int omap3_enable_st_clock(unsigned int id, bool enable)
 143 {
 144         unsigned int w;
 145
 146         /*
 147          * Sidetone uses McBSP ICLK - which must not idle when sidetones
 148          * are enabled or sidetones start sounding ugly.
 149          */
 150         w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
 151         if (enable)
 152                 w &= ~(1 << (id - 2));
 153         else
 154                 w |= 1 << (id - 2);
 155         omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
 156
 157         return 0;
 158 }
 159
 160 static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
 161 {
 162         int id, count = 1;
 163         char *name = "omap-mcbsp";
 164         struct omap_hwmod *oh_device[2];
 165         struct omap_mcbsp_platform_data *pdata = NULL;
 166         struct platform_device *pdev;
 167
 168         sscanf(oh->name, "mcbsp%d", &id);
 169
 170         pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL);
 171         if (!pdata) {
 172                 pr_err("%s: No memory for mcbsp\n", __func__);
 173                 return -ENOMEM;
 174         }
 175
 176         pdata->reg_step = 4;
 177         if (oh->class->rev < MCBSP_CONFIG_TYPE2) {
 178                 pdata->reg_size = 2;
 179         } else {
 180                 pdata->reg_size = 4;
 181                 pdata->has_ccr = true;
 182         }
 183         pdata->set_clk_src = omap2_mcbsp_set_clk_src;
 184
 185         /* On OMAP2/3 the McBSP1 port has 6 pin configuration */
 186         if (id == 1 && oh->class->rev < MCBSP_CONFIG_TYPE4)
 187                 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
 188
 189         /* On OMAP4 the McBSP4 port has 6 pin configuration */
 190         if (id == 4 && oh->class->rev == MCBSP_CONFIG_TYPE4)
 191                 pdata->mux_signal = omap4_mcbsp4_mux_rx_clk;
 192
 193         if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
 194                 if (id == 2)
 195                         /* The FIFO has 1024 + 256 locations */
 196                         pdata->buffer_size = 0x500;
 197                 else
 198                         /* The FIFO has 128 locations */
 199                         pdata->buffer_size = 0x80;
 200         } else if (oh->class->rev == MCBSP_CONFIG_TYPE4) {
 201                 /* The FIFO has 128 locations for all instances */
 202                 pdata->buffer_size = 0x80;
 203         }
 204
 205         if (oh->class->rev >= MCBSP_CONFIG_TYPE3)
 206                 pdata->has_wakeup = true;
 207
 208         oh_device[0] = oh;
 209
 210         if (oh->dev_attr) {
 211                 oh_device[1] = omap_hwmod_lookup((
 212                 (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
 213                 pdata->enable_st_clock = omap3_enable_st_clock;
 214                 count++;
 215         }
 216         pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
 217                                 sizeof(*pdata), NULL, 0, false);
 218         kfree(pdata);
 219         if (IS_ERR(pdev))  {
 220                 pr_err("%s: Can't build omap_device for %s:%s.\n", __func__,
 221                                         name, oh->name);
 222                 return PTR_ERR(pdev);
 223         }
 224         return 0;
 225 }
 226
 227 static int __init omap2_mcbsp_init(void)
 228 {
 229         omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
 230
 231         return 0;
 232 }
 233 arch_initcall(omap2_mcbsp_init);