Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-mmc
[deliverable/linux.git] / arch / arm / mach-omap2 / mux.c
1 /*
2 * linux/arch/arm/mach-omap2/mux.c
3 *
4 * OMAP1 pin multiplexing configurations
5 *
6 * Copyright (C) 2003 - 2005 Nokia Corporation
7 *
8 * Written by Tony Lindgren <tony.lindgren@nokia.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <asm/system.h>
28 #include <asm/io.h>
29 #include <linux/spinlock.h>
30
31 #include <asm/arch/mux.h>
32
33 #ifdef CONFIG_OMAP_MUX
34
35 /* NOTE: See mux.h for the enumeration */
36
37 struct pin_config __initdata_or_module omap24xx_pins[] = {
38 /*
39 * description mux mux pull pull debug
40 * offset mode ena type
41 */
42
43 /* 24xx I2C */
44 MUX_CFG_24XX("M19_24XX_I2C1_SCL", 0x111, 0, 0, 0, 1)
45 MUX_CFG_24XX("L15_24XX_I2C1_SDA", 0x112, 0, 0, 0, 1)
46 MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 0, 1)
47 MUX_CFG_24XX("H19_24XX_I2C2_SDA", 0x114, 0, 0, 0, 1)
48
49 /* Menelaus interrupt */
50 MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1)
51
52 /* 24xx clocks */
53 MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1)
54
55 /* 24xx GPMC wait pin monitoring */
56 MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1)
57 MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1)
58 MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1)
59 MUX_CFG_24XX("P1_GPMC_WAIT3", 0x09d, 0, 1, 1, 1)
60
61 /* 24xx McBSP */
62 MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1)
63 MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1)
64 MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1)
65 MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1)
66
67 /* 24xx GPIO */
68 MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1)
69 MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1)
70 MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)
71 MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1)
72 MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1)
73 MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1)
74 MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1)
75 MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1)
76 MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
77 MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1)
78 MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
79
80 /* 242x DBG GPIO */
81 MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1)
82 MUX_CFG_24XX("W2_242X_GPIO50", 0xd4, 3, 0, 0, 1)
83 MUX_CFG_24XX("U4_242X_GPIO51", 0xd5, 3, 0, 0, 1)
84 MUX_CFG_24XX("V3_242X_GPIO52", 0xd6, 3, 0, 0, 1)
85 MUX_CFG_24XX("V2_242X_GPIO53", 0xd7, 3, 0, 0, 1)
86 MUX_CFG_24XX("V6_242X_GPIO53", 0xcf, 3, 0, 0, 1)
87 MUX_CFG_24XX("T4_242X_GPIO54", 0xd8, 3, 0, 0, 1)
88 MUX_CFG_24XX("Y4_242X_GPIO54", 0xd0, 3, 0, 0, 1)
89 MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1)
90 MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1)
91
92 /* 24xx external DMA requests */
93 MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1)
94 MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1)
95 MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1)
96 MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1)
97 MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1)
98 MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1)
99
100 /* TSC IRQ */
101 MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1)
102
103 /* UART3 */
104 MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1)
105 MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1)
106
107 /* Keypad GPIO*/
108 MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1)
109 MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1)
110 MUX_CFG_24XX("V18_24XX_KBR2", 0x139, 3, 1, 1, 1)
111 MUX_CFG_24XX("M21_24XX_KBR3", 0xc9, 3, 1, 1, 1)
112 MUX_CFG_24XX("E5__24XX_KBR4", 0x138, 3, 1, 1, 1)
113 MUX_CFG_24XX("M18_24XX_KBR5", 0x10e, 3, 1, 1, 1)
114 MUX_CFG_24XX("R20_24XX_KBC0", 0x108, 3, 0, 0, 1)
115 MUX_CFG_24XX("M14_24XX_KBC1", 0x109, 3, 0, 0, 1)
116 MUX_CFG_24XX("H19_24XX_KBC2", 0x114, 3, 0, 0, 1)
117 MUX_CFG_24XX("V17_24XX_KBC3", 0x135, 3, 0, 0, 1)
118 MUX_CFG_24XX("P21_24XX_KBC4", 0xca, 3, 0, 0, 1)
119 MUX_CFG_24XX("L14_24XX_KBC5", 0x10f, 3, 0, 0, 1)
120 MUX_CFG_24XX("N19_24XX_KBC6", 0x110, 3, 0, 0, 1)
121
122 /* 24xx Menelaus Keypad GPIO */
123 MUX_CFG_24XX("B3__24XX_KBR5", 0x30, 3, 1, 1, 1)
124 MUX_CFG_24XX("AA4_24XX_KBC2", 0xe7, 3, 0, 0, 1)
125 MUX_CFG_24XX("B13_24XX_KBC6", 0x110, 3, 0, 0, 1)
126
127 };
128
129 int __init omap2_mux_init(void)
130 {
131 omap_mux_register(omap24xx_pins, ARRAY_SIZE(omap24xx_pins));
132 return 0;
133 }
134
135 #endif
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