2 * OMAP4 specific common source file.
4 * Copyright (C) 2010 Texas Instruments, Inc.
6 * Santosh Shilimkar <santosh.shilimkar@ti.com>
9 * This program is free software,you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/memblock.h>
19 #include <linux/of_irq.h>
20 #include <linux/of_platform.h>
21 #include <linux/export.h>
23 #include <asm/hardware/gic.h>
24 #include <asm/hardware/cache-l2x0.h>
25 #include <asm/mach/map.h>
26 #include <asm/memblock.h>
28 #include "omap-wakeupgen.h"
34 #include "prminst44xx.h"
35 #include "prcm_mpu44xx.h"
36 #include "omap4-sar-layout.h"
37 #include "omap-secure.h"
40 #ifdef CONFIG_CACHE_L2X0
41 static void __iomem
*l2cache_base
;
44 static void __iomem
*sar_ram_base
;
46 #ifdef CONFIG_OMAP4_ERRATA_I688
47 /* Used to implement memory barrier on DRAM path */
48 #define OMAP4_DRAM_BARRIER_VA 0xfe600000
50 void __iomem
*dram_sync
, *sram_sync
;
52 static phys_addr_t paddr
;
55 void omap_bus_sync(void)
57 if (dram_sync
&& sram_sync
) {
58 writel_relaxed(readl_relaxed(dram_sync
), dram_sync
);
59 writel_relaxed(readl_relaxed(sram_sync
), sram_sync
);
63 EXPORT_SYMBOL(omap_bus_sync
);
65 /* Steal one page physical memory for barrier implementation */
66 int __init
omap_barrier_reserve_memblock(void)
69 size
= ALIGN(PAGE_SIZE
, SZ_1M
);
70 paddr
= arm_memblock_steal(size
, SZ_1M
);
75 void __init
omap_barriers_init(void)
77 struct map_desc dram_io_desc
[1];
79 dram_io_desc
[0].virtual = OMAP4_DRAM_BARRIER_VA
;
80 dram_io_desc
[0].pfn
= __phys_to_pfn(paddr
);
81 dram_io_desc
[0].length
= size
;
82 dram_io_desc
[0].type
= MT_MEMORY_SO
;
83 iotable_init(dram_io_desc
, ARRAY_SIZE(dram_io_desc
));
84 dram_sync
= (void __iomem
*) dram_io_desc
[0].virtual;
85 sram_sync
= (void __iomem
*) OMAP4_SRAM_VA
;
87 pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
88 (long long) paddr
, dram_io_desc
[0].virtual);
92 void __init
omap_barriers_init(void)
96 void __init
gic_init_irq(void)
98 void __iomem
*omap_irq_base
;
99 void __iomem
*gic_dist_base_addr
;
101 /* Static mapping, never released */
102 gic_dist_base_addr
= ioremap(OMAP44XX_GIC_DIST_BASE
, SZ_4K
);
103 BUG_ON(!gic_dist_base_addr
);
105 /* Static mapping, never released */
106 omap_irq_base
= ioremap(OMAP44XX_GIC_CPU_BASE
, SZ_512
);
107 BUG_ON(!omap_irq_base
);
109 omap_wakeupgen_init();
111 gic_init(0, 29, gic_dist_base_addr
, omap_irq_base
);
114 #ifdef CONFIG_CACHE_L2X0
116 void __iomem
*omap4_get_l2cache_base(void)
121 static void omap4_l2x0_disable(void)
123 /* Disable PL310 L2 Cache controller */
124 omap_smc1(0x102, 0x0);
127 static void omap4_l2x0_set_debug(unsigned long val
)
129 /* Program PL310 L2 Cache controller debug register */
130 omap_smc1(0x100, val
);
133 static int __init
omap_l2_cache_init(void)
138 * To avoid code running on other OMAPs in
141 if (!cpu_is_omap44xx())
144 /* Static mapping, never released */
145 l2cache_base
= ioremap(OMAP44XX_L2CACHE_BASE
, SZ_4K
);
146 if (WARN_ON(!l2cache_base
))
150 * 16-way associativity, parity disabled
151 * Way size - 32KB (es1.0)
152 * Way size - 64KB (es2.0 +)
154 aux_ctrl
= ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT
) |
156 (0x1 << L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT
) |
157 (0x1 << L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT
));
159 if (omap_rev() == OMAP4430_REV_ES1_0
) {
160 aux_ctrl
|= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT
;
162 aux_ctrl
|= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT
) |
163 (1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT
) |
164 (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT
) |
165 (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT
) |
166 (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT
));
168 if (omap_rev() != OMAP4430_REV_ES1_0
)
169 omap_smc1(0x109, aux_ctrl
);
171 /* Enable PL310 L2 Cache controller */
172 omap_smc1(0x102, 0x1);
174 if (of_have_populated_dt())
175 l2x0_of_init(aux_ctrl
, L2X0_AUX_CTRL_MASK
);
177 l2x0_init(l2cache_base
, aux_ctrl
, L2X0_AUX_CTRL_MASK
);
180 * Override default outer_cache.disable with a OMAP4
183 outer_cache
.disable
= omap4_l2x0_disable
;
184 outer_cache
.set_debug
= omap4_l2x0_set_debug
;
188 early_initcall(omap_l2_cache_init
);
191 void __iomem
*omap4_get_sar_ram_base(void)
197 * SAR RAM used to save and restore the HW
198 * context in low power modes
200 static int __init
omap4_sar_ram_init(void)
203 * To avoid code running on other OMAPs in
206 if (!cpu_is_omap44xx())
209 /* Static mapping, never released */
210 sar_ram_base
= ioremap(OMAP44XX_SAR_RAM_BASE
, SZ_16K
);
211 if (WARN_ON(!sar_ram_base
))
216 early_initcall(omap4_sar_ram_init
);
218 static struct of_device_id irq_match
[] __initdata
= {
219 { .compatible
= "arm,cortex-a9-gic", .data
= gic_of_init
, },
220 { .compatible
= "arm,cortex-a15-gic", .data
= gic_of_init
, },
224 void __init
omap_gic_of_init(void)
226 omap_wakeupgen_init();
227 of_irq_init(irq_match
);
230 #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
231 static int omap4_twl6030_hsmmc_late_init(struct device
*dev
)
234 struct platform_device
*pdev
= container_of(dev
,
235 struct platform_device
, dev
);
236 struct omap_mmc_platform_data
*pdata
= dev
->platform_data
;
238 /* Setting MMC1 Card detect Irq */
240 irq
= twl6030_mmc_card_detect_config();
242 dev_err(dev
, "%s: Error card detect config(%d)\n",
246 pdata
->slots
[0].card_detect_irq
= irq
;
247 pdata
->slots
[0].card_detect
= twl6030_mmc_card_detect
;
252 static __init
void omap4_twl6030_hsmmc_set_late_init(struct device
*dev
)
254 struct omap_mmc_platform_data
*pdata
;
256 /* dev can be null if CONFIG_MMC_OMAP_HS is not set */
258 pr_err("Failed %s\n", __func__
);
261 pdata
= dev
->platform_data
;
262 pdata
->init
= omap4_twl6030_hsmmc_late_init
;
265 int __init
omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info
*controllers
)
267 struct omap2_hsmmc_info
*c
;
269 omap_hsmmc_init(controllers
);
270 for (c
= controllers
; c
->mmc
; c
++) {
271 /* pdev can be null if CONFIG_MMC_OMAP_HS is not set */
274 omap4_twl6030_hsmmc_set_late_init(&c
->pdev
->dev
);
280 int __init
omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info
*controllers
)
287 * omap44xx_restart - trigger a software restart of the SoC
288 * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
289 * @cmd: passed from the userspace program rebooting the system (if provided)
291 * Resets the SoC. For @cmd, see the 'reboot' syscall in
292 * kernel/sys.c. No return value.
294 void omap44xx_restart(char mode
, const char *cmd
)
296 /* XXX Should save 'cmd' into scratchpad for use after reboot */
297 omap4_prminst_global_warm_sw_reset(); /* never returns */