2 * OMAP4 specific common source file.
4 * Copyright (C) 2010 Texas Instruments, Inc.
6 * Santosh Shilimkar <santosh.shilimkar@ti.com>
9 * This program is free software,you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
17 #include <linux/irq.h>
18 #include <linux/irqchip.h>
19 #include <linux/platform_device.h>
20 #include <linux/memblock.h>
21 #include <linux/of_irq.h>
22 #include <linux/of_platform.h>
23 #include <linux/export.h>
24 #include <linux/irqchip/arm-gic.h>
26 #include <asm/hardware/cache-l2x0.h>
27 #include <asm/mach/map.h>
28 #include <asm/memblock.h>
29 #include <asm/smp_twd.h>
31 #include "omap-wakeupgen.h"
37 #include "prminst44xx.h"
38 #include "prcm_mpu44xx.h"
39 #include "omap4-sar-layout.h"
40 #include "omap-secure.h"
43 #ifdef CONFIG_CACHE_L2X0
44 static void __iomem
*l2cache_base
;
47 static void __iomem
*sar_ram_base
;
48 static void __iomem
*gic_dist_base_addr
;
49 static void __iomem
*twd_base
;
51 #define IRQ_LOCALTIMER 29
53 #ifdef CONFIG_OMAP4_ERRATA_I688
54 /* Used to implement memory barrier on DRAM path */
55 #define OMAP4_DRAM_BARRIER_VA 0xfe600000
57 void __iomem
*dram_sync
, *sram_sync
;
59 static phys_addr_t paddr
;
62 void omap_bus_sync(void)
64 if (dram_sync
&& sram_sync
) {
65 writel_relaxed(readl_relaxed(dram_sync
), dram_sync
);
66 writel_relaxed(readl_relaxed(sram_sync
), sram_sync
);
70 EXPORT_SYMBOL(omap_bus_sync
);
72 /* Steal one page physical memory for barrier implementation */
73 int __init
omap_barrier_reserve_memblock(void)
76 size
= ALIGN(PAGE_SIZE
, SZ_1M
);
77 paddr
= arm_memblock_steal(size
, SZ_1M
);
82 void __init
omap_barriers_init(void)
84 struct map_desc dram_io_desc
[1];
86 dram_io_desc
[0].virtual = OMAP4_DRAM_BARRIER_VA
;
87 dram_io_desc
[0].pfn
= __phys_to_pfn(paddr
);
88 dram_io_desc
[0].length
= size
;
89 dram_io_desc
[0].type
= MT_MEMORY_SO
;
90 iotable_init(dram_io_desc
, ARRAY_SIZE(dram_io_desc
));
91 dram_sync
= (void __iomem
*) dram_io_desc
[0].virtual;
92 sram_sync
= (void __iomem
*) OMAP4_SRAM_VA
;
94 pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
95 (long long) paddr
, dram_io_desc
[0].virtual);
99 void __init
omap_barriers_init(void)
103 void __init
gic_init_irq(void)
105 void __iomem
*omap_irq_base
;
107 /* Static mapping, never released */
108 gic_dist_base_addr
= ioremap(OMAP44XX_GIC_DIST_BASE
, SZ_4K
);
109 BUG_ON(!gic_dist_base_addr
);
111 twd_base
= ioremap(OMAP44XX_LOCAL_TWD_BASE
, SZ_4K
);
114 /* Static mapping, never released */
115 omap_irq_base
= ioremap(OMAP44XX_GIC_CPU_BASE
, SZ_512
);
116 BUG_ON(!omap_irq_base
);
118 omap_wakeupgen_init();
120 gic_init(0, 29, gic_dist_base_addr
, omap_irq_base
);
123 void gic_dist_disable(void)
125 if (gic_dist_base_addr
)
126 __raw_writel(0x0, gic_dist_base_addr
+ GIC_DIST_CTRL
);
129 bool gic_dist_disabled(void)
131 return !(__raw_readl(gic_dist_base_addr
+ GIC_DIST_CTRL
) & 0x1);
134 void gic_timer_retrigger(void)
136 u32 twd_int
= __raw_readl(twd_base
+ TWD_TIMER_INTSTAT
);
137 u32 gic_int
= __raw_readl(gic_dist_base_addr
+ GIC_DIST_PENDING_SET
);
138 u32 twd_ctrl
= __raw_readl(twd_base
+ TWD_TIMER_CONTROL
);
140 if (twd_int
&& !(gic_int
& BIT(IRQ_LOCALTIMER
))) {
142 * The local timer interrupt got lost while the distributor was
143 * disabled. Ack the pending interrupt, and retrigger it.
145 pr_warn("%s: lost localtimer interrupt\n", __func__
);
146 __raw_writel(1, twd_base
+ TWD_TIMER_INTSTAT
);
147 if (!(twd_ctrl
& TWD_TIMER_CONTROL_PERIODIC
)) {
148 __raw_writel(1, twd_base
+ TWD_TIMER_COUNTER
);
149 twd_ctrl
|= TWD_TIMER_CONTROL_ENABLE
;
150 __raw_writel(twd_ctrl
, twd_base
+ TWD_TIMER_CONTROL
);
155 #ifdef CONFIG_CACHE_L2X0
157 void __iomem
*omap4_get_l2cache_base(void)
162 static void omap4_l2x0_disable(void)
164 /* Disable PL310 L2 Cache controller */
165 omap_smc1(0x102, 0x0);
168 static void omap4_l2x0_set_debug(unsigned long val
)
170 /* Program PL310 L2 Cache controller debug register */
171 omap_smc1(0x100, val
);
174 static int __init
omap_l2_cache_init(void)
179 * To avoid code running on other OMAPs in
182 if (!cpu_is_omap44xx())
185 /* Static mapping, never released */
186 l2cache_base
= ioremap(OMAP44XX_L2CACHE_BASE
, SZ_4K
);
187 if (WARN_ON(!l2cache_base
))
191 * 16-way associativity, parity disabled
192 * Way size - 32KB (es1.0)
193 * Way size - 64KB (es2.0 +)
195 aux_ctrl
= ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT
) |
197 (0x1 << L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT
) |
198 (0x1 << L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT
));
200 if (omap_rev() == OMAP4430_REV_ES1_0
) {
201 aux_ctrl
|= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT
;
203 aux_ctrl
|= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT
) |
204 (1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT
) |
205 (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT
) |
206 (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT
) |
207 (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT
));
209 if (omap_rev() != OMAP4430_REV_ES1_0
)
210 omap_smc1(0x109, aux_ctrl
);
212 /* Enable PL310 L2 Cache controller */
213 omap_smc1(0x102, 0x1);
215 if (of_have_populated_dt())
216 l2x0_of_init(aux_ctrl
, L2X0_AUX_CTRL_MASK
);
218 l2x0_init(l2cache_base
, aux_ctrl
, L2X0_AUX_CTRL_MASK
);
221 * Override default outer_cache.disable with a OMAP4
224 outer_cache
.disable
= omap4_l2x0_disable
;
225 outer_cache
.set_debug
= omap4_l2x0_set_debug
;
229 omap_early_initcall(omap_l2_cache_init
);
232 void __iomem
*omap4_get_sar_ram_base(void)
238 * SAR RAM used to save and restore the HW
239 * context in low power modes
241 static int __init
omap4_sar_ram_init(void)
244 * To avoid code running on other OMAPs in
247 if (!cpu_is_omap44xx())
250 /* Static mapping, never released */
251 sar_ram_base
= ioremap(OMAP44XX_SAR_RAM_BASE
, SZ_16K
);
252 if (WARN_ON(!sar_ram_base
))
257 omap_early_initcall(omap4_sar_ram_init
);
259 void __init
omap_gic_of_init(void)
261 omap_wakeupgen_init();
265 #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
266 static int omap4_twl6030_hsmmc_late_init(struct device
*dev
)
269 struct platform_device
*pdev
= container_of(dev
,
270 struct platform_device
, dev
);
271 struct omap_mmc_platform_data
*pdata
= dev
->platform_data
;
273 /* Setting MMC1 Card detect Irq */
275 irq
= twl6030_mmc_card_detect_config();
277 dev_err(dev
, "%s: Error card detect config(%d)\n",
281 pdata
->slots
[0].card_detect_irq
= irq
;
282 pdata
->slots
[0].card_detect
= twl6030_mmc_card_detect
;
287 static __init
void omap4_twl6030_hsmmc_set_late_init(struct device
*dev
)
289 struct omap_mmc_platform_data
*pdata
;
291 /* dev can be null if CONFIG_MMC_OMAP_HS is not set */
293 pr_err("Failed %s\n", __func__
);
296 pdata
= dev
->platform_data
;
297 pdata
->init
= omap4_twl6030_hsmmc_late_init
;
300 int __init
omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info
*controllers
)
302 struct omap2_hsmmc_info
*c
;
304 omap_hsmmc_init(controllers
);
305 for (c
= controllers
; c
->mmc
; c
++) {
306 /* pdev can be null if CONFIG_MMC_OMAP_HS is not set */
309 omap4_twl6030_hsmmc_set_late_init(&c
->pdev
->dev
);
315 int __init
omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info
*controllers
)
322 * omap44xx_restart - trigger a software restart of the SoC
323 * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
324 * @cmd: passed from the userspace program rebooting the system (if provided)
326 * Resets the SoC. For @cmd, see the 'reboot' syscall in
327 * kernel/sys.c. No return value.
329 void omap44xx_restart(char mode
, const char *cmd
)
331 /* XXX Should save 'cmd' into scratchpad for use after reboot */
332 omap4_prminst_global_warm_sw_reset(); /* never returns */