OMAP2+: hwmod: ignore attempts to re-setup a hwmod
[deliverable/linux.git] / arch / arm / mach-omap2 / omap_hwmod.c
1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 *
6 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
7 *
8 * Created in collaboration with (alphabetical order): Thara Gopinath,
9 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
10 * Sawant, Santosh Shilimkar, Richard Woodruff
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * Introduction
17 * ------------
18 * One way to view an OMAP SoC is as a collection of largely unrelated
19 * IP blocks connected by interconnects. The IP blocks include
20 * devices such as ARM processors, audio serial interfaces, UARTs,
21 * etc. Some of these devices, like the DSP, are created by TI;
22 * others, like the SGX, largely originate from external vendors. In
23 * TI's documentation, on-chip devices are referred to as "OMAP
24 * modules." Some of these IP blocks are identical across several
25 * OMAP versions. Others are revised frequently.
26 *
27 * These OMAP modules are tied together by various interconnects.
28 * Most of the address and data flow between modules is via OCP-based
29 * interconnects such as the L3 and L4 buses; but there are other
30 * interconnects that distribute the hardware clock tree, handle idle
31 * and reset signaling, supply power, and connect the modules to
32 * various pads or balls on the OMAP package.
33 *
34 * OMAP hwmod provides a consistent way to describe the on-chip
35 * hardware blocks and their integration into the rest of the chip.
36 * This description can be automatically generated from the TI
37 * hardware database. OMAP hwmod provides a standard, consistent API
38 * to reset, enable, idle, and disable these hardware blocks. And
39 * hwmod provides a way for other core code, such as the Linux device
40 * code or the OMAP power management and address space mapping code,
41 * to query the hardware database.
42 *
43 * Using hwmod
44 * -----------
45 * Drivers won't call hwmod functions directly. That is done by the
46 * omap_device code, and in rare occasions, by custom integration code
47 * in arch/arm/ *omap*. The omap_device code includes functions to
48 * build a struct platform_device using omap_hwmod data, and that is
49 * currently how hwmod data is communicated to drivers and to the
50 * Linux driver model. Most drivers will call omap_hwmod functions only
51 * indirectly, via pm_runtime*() functions.
52 *
53 * From a layering perspective, here is where the OMAP hwmod code
54 * fits into the kernel software stack:
55 *
56 * +-------------------------------+
57 * | Device driver code |
58 * | (e.g., drivers/) |
59 * +-------------------------------+
60 * | Linux driver model |
61 * | (platform_device / |
62 * | platform_driver data/code) |
63 * +-------------------------------+
64 * | OMAP core-driver integration |
65 * |(arch/arm/mach-omap2/devices.c)|
66 * +-------------------------------+
67 * | omap_device code |
68 * | (../plat-omap/omap_device.c) |
69 * +-------------------------------+
70 * ----> | omap_hwmod code/data | <-----
71 * | (../mach-omap2/omap_hwmod*) |
72 * +-------------------------------+
73 * | OMAP clock/PRCM/register fns |
74 * | (__raw_{read,write}l, clk*) |
75 * +-------------------------------+
76 *
77 * Device drivers should not contain any OMAP-specific code or data in
78 * them. They should only contain code to operate the IP block that
79 * the driver is responsible for. This is because these IP blocks can
80 * also appear in other SoCs, either from TI (such as DaVinci) or from
81 * other manufacturers; and drivers should be reusable across other
82 * platforms.
83 *
84 * The OMAP hwmod code also will attempt to reset and idle all on-chip
85 * devices upon boot. The goal here is for the kernel to be
86 * completely self-reliant and independent from bootloaders. This is
87 * to ensure a repeatable configuration, both to ensure consistent
88 * runtime behavior, and to make it easier for others to reproduce
89 * bugs.
90 *
91 * OMAP module activity states
92 * ---------------------------
93 * The hwmod code considers modules to be in one of several activity
94 * states. IP blocks start out in an UNKNOWN state, then once they
95 * are registered via the hwmod code, proceed to the REGISTERED state.
96 * Once their clock names are resolved to clock pointers, the module
97 * enters the CLKS_INITED state; and finally, once the module has been
98 * reset and the integration registers programmed, the INITIALIZED state
99 * is entered. The hwmod code will then place the module into either
100 * the IDLE state to save power, or in the case of a critical system
101 * module, the ENABLED state.
102 *
103 * OMAP core integration code can then call omap_hwmod*() functions
104 * directly to move the module between the IDLE, ENABLED, and DISABLED
105 * states, as needed. This is done during both the PM idle loop, and
106 * in the OMAP core integration code's implementation of the PM runtime
107 * functions.
108 *
109 * References
110 * ----------
111 * This is a partial list.
112 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
113 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
114 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
115 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
116 * - Open Core Protocol Specification 2.2
117 *
118 * To do:
119 * - handle IO mapping
120 * - bus throughput & module latency measurement code
121 *
122 * XXX add tests at the beginning of each function to ensure the hwmod is
123 * in the appropriate state
124 * XXX error return values should be checked to ensure that they are
125 * appropriate
126 */
127 #undef DEBUG
128
129 #include <linux/kernel.h>
130 #include <linux/errno.h>
131 #include <linux/io.h>
132 #include <linux/clk.h>
133 #include <linux/delay.h>
134 #include <linux/err.h>
135 #include <linux/list.h>
136 #include <linux/mutex.h>
137 #include <linux/spinlock.h>
138
139 #include <plat/common.h>
140 #include <plat/cpu.h>
141 #include "clockdomain.h"
142 #include "powerdomain.h"
143 #include <plat/clock.h>
144 #include <plat/omap_hwmod.h>
145 #include <plat/prcm.h>
146
147 #include "cm2xxx_3xxx.h"
148 #include "cm44xx.h"
149 #include "prm2xxx_3xxx.h"
150 #include "prm44xx.h"
151 #include "mux.h"
152
153 /* Maximum microseconds to wait for OMAP module to softreset */
154 #define MAX_MODULE_SOFTRESET_WAIT 10000
155
156 /* Name of the OMAP hwmod for the MPU */
157 #define MPU_INITIATOR_NAME "mpu"
158
159 /* omap_hwmod_list contains all registered struct omap_hwmods */
160 static LIST_HEAD(omap_hwmod_list);
161
162 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
163 static struct omap_hwmod *mpu_oh;
164
165
166 /* Private functions */
167
168 /**
169 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
170 * @oh: struct omap_hwmod *
171 *
172 * Load the current value of the hwmod OCP_SYSCONFIG register into the
173 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
174 * OCP_SYSCONFIG register or 0 upon success.
175 */
176 static int _update_sysc_cache(struct omap_hwmod *oh)
177 {
178 if (!oh->class->sysc) {
179 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
180 return -EINVAL;
181 }
182
183 /* XXX ensure module interface clock is up */
184
185 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
186
187 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
188 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
189
190 return 0;
191 }
192
193 /**
194 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
195 * @v: OCP_SYSCONFIG value to write
196 * @oh: struct omap_hwmod *
197 *
198 * Write @v into the module class' OCP_SYSCONFIG register, if it has
199 * one. No return value.
200 */
201 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
202 {
203 if (!oh->class->sysc) {
204 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
205 return;
206 }
207
208 /* XXX ensure module interface clock is up */
209
210 /* Module might have lost context, always update cache and register */
211 oh->_sysc_cache = v;
212 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
213 }
214
215 /**
216 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
217 * @oh: struct omap_hwmod *
218 * @standbymode: MIDLEMODE field bits
219 * @v: pointer to register contents to modify
220 *
221 * Update the master standby mode bits in @v to be @standbymode for
222 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
223 * upon error or 0 upon success.
224 */
225 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
226 u32 *v)
227 {
228 u32 mstandby_mask;
229 u8 mstandby_shift;
230
231 if (!oh->class->sysc ||
232 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
233 return -EINVAL;
234
235 if (!oh->class->sysc->sysc_fields) {
236 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
237 return -EINVAL;
238 }
239
240 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
241 mstandby_mask = (0x3 << mstandby_shift);
242
243 *v &= ~mstandby_mask;
244 *v |= __ffs(standbymode) << mstandby_shift;
245
246 return 0;
247 }
248
249 /**
250 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
251 * @oh: struct omap_hwmod *
252 * @idlemode: SIDLEMODE field bits
253 * @v: pointer to register contents to modify
254 *
255 * Update the slave idle mode bits in @v to be @idlemode for the @oh
256 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
257 * or 0 upon success.
258 */
259 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
260 {
261 u32 sidle_mask;
262 u8 sidle_shift;
263
264 if (!oh->class->sysc ||
265 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
266 return -EINVAL;
267
268 if (!oh->class->sysc->sysc_fields) {
269 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
270 return -EINVAL;
271 }
272
273 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
274 sidle_mask = (0x3 << sidle_shift);
275
276 *v &= ~sidle_mask;
277 *v |= __ffs(idlemode) << sidle_shift;
278
279 return 0;
280 }
281
282 /**
283 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
284 * @oh: struct omap_hwmod *
285 * @clockact: CLOCKACTIVITY field bits
286 * @v: pointer to register contents to modify
287 *
288 * Update the clockactivity mode bits in @v to be @clockact for the
289 * @oh hwmod. Used for additional powersaving on some modules. Does
290 * not write to the hardware. Returns -EINVAL upon error or 0 upon
291 * success.
292 */
293 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
294 {
295 u32 clkact_mask;
296 u8 clkact_shift;
297
298 if (!oh->class->sysc ||
299 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
300 return -EINVAL;
301
302 if (!oh->class->sysc->sysc_fields) {
303 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
304 return -EINVAL;
305 }
306
307 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
308 clkact_mask = (0x3 << clkact_shift);
309
310 *v &= ~clkact_mask;
311 *v |= clockact << clkact_shift;
312
313 return 0;
314 }
315
316 /**
317 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
318 * @oh: struct omap_hwmod *
319 * @v: pointer to register contents to modify
320 *
321 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
322 * error or 0 upon success.
323 */
324 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
325 {
326 u32 softrst_mask;
327
328 if (!oh->class->sysc ||
329 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
330 return -EINVAL;
331
332 if (!oh->class->sysc->sysc_fields) {
333 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
334 return -EINVAL;
335 }
336
337 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
338
339 *v |= softrst_mask;
340
341 return 0;
342 }
343
344 /**
345 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
346 * @oh: struct omap_hwmod *
347 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
348 * @v: pointer to register contents to modify
349 *
350 * Update the module autoidle bit in @v to be @autoidle for the @oh
351 * hwmod. The autoidle bit controls whether the module can gate
352 * internal clocks automatically when it isn't doing anything; the
353 * exact function of this bit varies on a per-module basis. This
354 * function does not write to the hardware. Returns -EINVAL upon
355 * error or 0 upon success.
356 */
357 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
358 u32 *v)
359 {
360 u32 autoidle_mask;
361 u8 autoidle_shift;
362
363 if (!oh->class->sysc ||
364 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
365 return -EINVAL;
366
367 if (!oh->class->sysc->sysc_fields) {
368 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
369 return -EINVAL;
370 }
371
372 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
373 autoidle_mask = (0x3 << autoidle_shift);
374
375 *v &= ~autoidle_mask;
376 *v |= autoidle << autoidle_shift;
377
378 return 0;
379 }
380
381 /**
382 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
383 * @oh: struct omap_hwmod *
384 *
385 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
386 * upon error or 0 upon success.
387 */
388 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
389 {
390 u32 wakeup_mask;
391
392 if (!oh->class->sysc ||
393 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
394 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
395 return -EINVAL;
396
397 if (!oh->class->sysc->sysc_fields) {
398 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
399 return -EINVAL;
400 }
401
402 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
403
404 *v |= wakeup_mask;
405
406 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
407 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
408
409 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
410
411 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
412
413 return 0;
414 }
415
416 /**
417 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
418 * @oh: struct omap_hwmod *
419 *
420 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
421 * upon error or 0 upon success.
422 */
423 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
424 {
425 u32 wakeup_mask;
426
427 if (!oh->class->sysc ||
428 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
429 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
430 return -EINVAL;
431
432 if (!oh->class->sysc->sysc_fields) {
433 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
434 return -EINVAL;
435 }
436
437 wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
438
439 *v &= ~wakeup_mask;
440
441 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
442 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
443
444 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
445
446 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
447
448 return 0;
449 }
450
451 /**
452 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
453 * @oh: struct omap_hwmod *
454 *
455 * Prevent the hardware module @oh from entering idle while the
456 * hardare module initiator @init_oh is active. Useful when a module
457 * will be accessed by a particular initiator (e.g., if a module will
458 * be accessed by the IVA, there should be a sleepdep between the IVA
459 * initiator and the module). Only applies to modules in smart-idle
460 * mode. Returns -EINVAL upon error or passes along
461 * clkdm_add_sleepdep() value upon success.
462 */
463 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
464 {
465 if (!oh->_clk)
466 return -EINVAL;
467
468 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
469 }
470
471 /**
472 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
473 * @oh: struct omap_hwmod *
474 *
475 * Allow the hardware module @oh to enter idle while the hardare
476 * module initiator @init_oh is active. Useful when a module will not
477 * be accessed by a particular initiator (e.g., if a module will not
478 * be accessed by the IVA, there should be no sleepdep between the IVA
479 * initiator and the module). Only applies to modules in smart-idle
480 * mode. Returns -EINVAL upon error or passes along
481 * clkdm_del_sleepdep() value upon success.
482 */
483 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
484 {
485 if (!oh->_clk)
486 return -EINVAL;
487
488 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
489 }
490
491 /**
492 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
493 * @oh: struct omap_hwmod *
494 *
495 * Called from _init_clocks(). Populates the @oh _clk (main
496 * functional clock pointer) if a main_clk is present. Returns 0 on
497 * success or -EINVAL on error.
498 */
499 static int _init_main_clk(struct omap_hwmod *oh)
500 {
501 int ret = 0;
502
503 if (!oh->main_clk)
504 return 0;
505
506 oh->_clk = omap_clk_get_by_name(oh->main_clk);
507 if (!oh->_clk) {
508 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
509 oh->name, oh->main_clk);
510 return -EINVAL;
511 }
512
513 if (!oh->_clk->clkdm)
514 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
515 oh->main_clk, oh->_clk->name);
516
517 return ret;
518 }
519
520 /**
521 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
522 * @oh: struct omap_hwmod *
523 *
524 * Called from _init_clocks(). Populates the @oh OCP slave interface
525 * clock pointers. Returns 0 on success or -EINVAL on error.
526 */
527 static int _init_interface_clks(struct omap_hwmod *oh)
528 {
529 struct clk *c;
530 int i;
531 int ret = 0;
532
533 if (oh->slaves_cnt == 0)
534 return 0;
535
536 for (i = 0; i < oh->slaves_cnt; i++) {
537 struct omap_hwmod_ocp_if *os = oh->slaves[i];
538
539 if (!os->clk)
540 continue;
541
542 c = omap_clk_get_by_name(os->clk);
543 if (!c) {
544 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
545 oh->name, os->clk);
546 ret = -EINVAL;
547 }
548 os->_clk = c;
549 }
550
551 return ret;
552 }
553
554 /**
555 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
556 * @oh: struct omap_hwmod *
557 *
558 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
559 * clock pointers. Returns 0 on success or -EINVAL on error.
560 */
561 static int _init_opt_clks(struct omap_hwmod *oh)
562 {
563 struct omap_hwmod_opt_clk *oc;
564 struct clk *c;
565 int i;
566 int ret = 0;
567
568 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
569 c = omap_clk_get_by_name(oc->clk);
570 if (!c) {
571 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
572 oh->name, oc->clk);
573 ret = -EINVAL;
574 }
575 oc->_clk = c;
576 }
577
578 return ret;
579 }
580
581 /**
582 * _enable_clocks - enable hwmod main clock and interface clocks
583 * @oh: struct omap_hwmod *
584 *
585 * Enables all clocks necessary for register reads and writes to succeed
586 * on the hwmod @oh. Returns 0.
587 */
588 static int _enable_clocks(struct omap_hwmod *oh)
589 {
590 int i;
591
592 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
593
594 if (oh->_clk)
595 clk_enable(oh->_clk);
596
597 if (oh->slaves_cnt > 0) {
598 for (i = 0; i < oh->slaves_cnt; i++) {
599 struct omap_hwmod_ocp_if *os = oh->slaves[i];
600 struct clk *c = os->_clk;
601
602 if (c && (os->flags & OCPIF_SWSUP_IDLE))
603 clk_enable(c);
604 }
605 }
606
607 /* The opt clocks are controlled by the device driver. */
608
609 return 0;
610 }
611
612 /**
613 * _disable_clocks - disable hwmod main clock and interface clocks
614 * @oh: struct omap_hwmod *
615 *
616 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
617 */
618 static int _disable_clocks(struct omap_hwmod *oh)
619 {
620 int i;
621
622 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
623
624 if (oh->_clk)
625 clk_disable(oh->_clk);
626
627 if (oh->slaves_cnt > 0) {
628 for (i = 0; i < oh->slaves_cnt; i++) {
629 struct omap_hwmod_ocp_if *os = oh->slaves[i];
630 struct clk *c = os->_clk;
631
632 if (c && (os->flags & OCPIF_SWSUP_IDLE))
633 clk_disable(c);
634 }
635 }
636
637 /* The opt clocks are controlled by the device driver. */
638
639 return 0;
640 }
641
642 static void _enable_optional_clocks(struct omap_hwmod *oh)
643 {
644 struct omap_hwmod_opt_clk *oc;
645 int i;
646
647 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
648
649 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
650 if (oc->_clk) {
651 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
652 oc->_clk->name);
653 clk_enable(oc->_clk);
654 }
655 }
656
657 static void _disable_optional_clocks(struct omap_hwmod *oh)
658 {
659 struct omap_hwmod_opt_clk *oc;
660 int i;
661
662 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
663
664 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
665 if (oc->_clk) {
666 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
667 oc->_clk->name);
668 clk_disable(oc->_clk);
669 }
670 }
671
672 /**
673 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
674 * @oh: struct omap_hwmod *
675 *
676 * Returns the array index of the OCP slave port that the MPU
677 * addresses the device on, or -EINVAL upon error or not found.
678 */
679 static int __init _find_mpu_port_index(struct omap_hwmod *oh)
680 {
681 int i;
682 int found = 0;
683
684 if (!oh || oh->slaves_cnt == 0)
685 return -EINVAL;
686
687 for (i = 0; i < oh->slaves_cnt; i++) {
688 struct omap_hwmod_ocp_if *os = oh->slaves[i];
689
690 if (os->user & OCP_USER_MPU) {
691 found = 1;
692 break;
693 }
694 }
695
696 if (found)
697 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
698 oh->name, i);
699 else
700 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
701 oh->name);
702
703 return (found) ? i : -EINVAL;
704 }
705
706 /**
707 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
708 * @oh: struct omap_hwmod *
709 *
710 * Return the virtual address of the base of the register target of
711 * device @oh, or NULL on error.
712 */
713 static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
714 {
715 struct omap_hwmod_ocp_if *os;
716 struct omap_hwmod_addr_space *mem;
717 int i;
718 int found = 0;
719 void __iomem *va_start;
720
721 if (!oh || oh->slaves_cnt == 0)
722 return NULL;
723
724 os = oh->slaves[index];
725
726 for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
727 if (mem->flags & ADDR_TYPE_RT) {
728 found = 1;
729 break;
730 }
731 }
732
733 if (found) {
734 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
735 if (!va_start) {
736 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
737 return NULL;
738 }
739 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
740 oh->name, va_start);
741 } else {
742 pr_debug("omap_hwmod: %s: no MPU register target found\n",
743 oh->name);
744 }
745
746 return (found) ? va_start : NULL;
747 }
748
749 /**
750 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
751 * @oh: struct omap_hwmod *
752 *
753 * If module is marked as SWSUP_SIDLE, force the module out of slave
754 * idle; otherwise, configure it for smart-idle. If module is marked
755 * as SWSUP_MSUSPEND, force the module out of master standby;
756 * otherwise, configure it for smart-standby. No return value.
757 */
758 static void _enable_sysc(struct omap_hwmod *oh)
759 {
760 u8 idlemode, sf;
761 u32 v;
762
763 if (!oh->class->sysc)
764 return;
765
766 v = oh->_sysc_cache;
767 sf = oh->class->sysc->sysc_flags;
768
769 if (sf & SYSC_HAS_SIDLEMODE) {
770 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
771 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
772 _set_slave_idlemode(oh, idlemode, &v);
773 }
774
775 if (sf & SYSC_HAS_MIDLEMODE) {
776 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
777 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
778 _set_master_standbymode(oh, idlemode, &v);
779 }
780
781 /*
782 * XXX The clock framework should handle this, by
783 * calling into this code. But this must wait until the
784 * clock structures are tagged with omap_hwmod entries
785 */
786 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
787 (sf & SYSC_HAS_CLOCKACTIVITY))
788 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
789
790 /* If slave is in SMARTIDLE, also enable wakeup */
791 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
792 _enable_wakeup(oh, &v);
793
794 _write_sysconfig(v, oh);
795
796 /*
797 * Set the autoidle bit only after setting the smartidle bit
798 * Setting this will not have any impact on the other modules.
799 */
800 if (sf & SYSC_HAS_AUTOIDLE) {
801 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
802 0 : 1;
803 _set_module_autoidle(oh, idlemode, &v);
804 _write_sysconfig(v, oh);
805 }
806 }
807
808 /**
809 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
810 * @oh: struct omap_hwmod *
811 *
812 * If module is marked as SWSUP_SIDLE, force the module into slave
813 * idle; otherwise, configure it for smart-idle. If module is marked
814 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
815 * configure it for smart-standby. No return value.
816 */
817 static void _idle_sysc(struct omap_hwmod *oh)
818 {
819 u8 idlemode, sf;
820 u32 v;
821
822 if (!oh->class->sysc)
823 return;
824
825 v = oh->_sysc_cache;
826 sf = oh->class->sysc->sysc_flags;
827
828 if (sf & SYSC_HAS_SIDLEMODE) {
829 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
830 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
831 _set_slave_idlemode(oh, idlemode, &v);
832 }
833
834 if (sf & SYSC_HAS_MIDLEMODE) {
835 idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
836 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
837 _set_master_standbymode(oh, idlemode, &v);
838 }
839
840 /* If slave is in SMARTIDLE, also enable wakeup */
841 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
842 _enable_wakeup(oh, &v);
843
844 _write_sysconfig(v, oh);
845 }
846
847 /**
848 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
849 * @oh: struct omap_hwmod *
850 *
851 * Force the module into slave idle and master suspend. No return
852 * value.
853 */
854 static void _shutdown_sysc(struct omap_hwmod *oh)
855 {
856 u32 v;
857 u8 sf;
858
859 if (!oh->class->sysc)
860 return;
861
862 v = oh->_sysc_cache;
863 sf = oh->class->sysc->sysc_flags;
864
865 if (sf & SYSC_HAS_SIDLEMODE)
866 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
867
868 if (sf & SYSC_HAS_MIDLEMODE)
869 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
870
871 if (sf & SYSC_HAS_AUTOIDLE)
872 _set_module_autoidle(oh, 1, &v);
873
874 _write_sysconfig(v, oh);
875 }
876
877 /**
878 * _lookup - find an omap_hwmod by name
879 * @name: find an omap_hwmod by name
880 *
881 * Return a pointer to an omap_hwmod by name, or NULL if not found.
882 */
883 static struct omap_hwmod *_lookup(const char *name)
884 {
885 struct omap_hwmod *oh, *temp_oh;
886
887 oh = NULL;
888
889 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
890 if (!strcmp(name, temp_oh->name)) {
891 oh = temp_oh;
892 break;
893 }
894 }
895
896 return oh;
897 }
898
899 /**
900 * _init_clocks - clk_get() all clocks associated with this hwmod
901 * @oh: struct omap_hwmod *
902 * @data: not used; pass NULL
903 *
904 * Called by omap_hwmod_setup_all() (after omap2_clk_init()).
905 * Resolves all clock names embedded in the hwmod. Returns 0 on
906 * success, or a negative error code on failure.
907 */
908 static int _init_clocks(struct omap_hwmod *oh, void *data)
909 {
910 int ret = 0;
911
912 if (oh->_state != _HWMOD_STATE_REGISTERED)
913 return 0;
914
915 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
916
917 ret |= _init_main_clk(oh);
918 ret |= _init_interface_clks(oh);
919 ret |= _init_opt_clks(oh);
920
921 if (!ret)
922 oh->_state = _HWMOD_STATE_CLKS_INITED;
923
924 return 0;
925 }
926
927 /**
928 * _wait_target_ready - wait for a module to leave slave idle
929 * @oh: struct omap_hwmod *
930 *
931 * Wait for a module @oh to leave slave idle. Returns 0 if the module
932 * does not have an IDLEST bit or if the module successfully leaves
933 * slave idle; otherwise, pass along the return value of the
934 * appropriate *_cm_wait_module_ready() function.
935 */
936 static int _wait_target_ready(struct omap_hwmod *oh)
937 {
938 struct omap_hwmod_ocp_if *os;
939 int ret;
940
941 if (!oh)
942 return -EINVAL;
943
944 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
945 return 0;
946
947 os = oh->slaves[oh->_mpu_port_index];
948
949 if (oh->flags & HWMOD_NO_IDLEST)
950 return 0;
951
952 /* XXX check module SIDLEMODE */
953
954 /* XXX check clock enable states */
955
956 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
957 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
958 oh->prcm.omap2.idlest_reg_id,
959 oh->prcm.omap2.idlest_idle_bit);
960 } else if (cpu_is_omap44xx()) {
961 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
962 } else {
963 BUG();
964 };
965
966 return ret;
967 }
968
969 /**
970 * _lookup_hardreset - return the register bit shift for this hwmod/reset line
971 * @oh: struct omap_hwmod *
972 * @name: name of the reset line in the context of this hwmod
973 *
974 * Return the bit position of the reset line that match the
975 * input name. Return -ENOENT if not found.
976 */
977 static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
978 {
979 int i;
980
981 for (i = 0; i < oh->rst_lines_cnt; i++) {
982 const char *rst_line = oh->rst_lines[i].name;
983 if (!strcmp(rst_line, name)) {
984 u8 shift = oh->rst_lines[i].rst_shift;
985 pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
986 oh->name, rst_line, shift);
987
988 return shift;
989 }
990 }
991
992 return -ENOENT;
993 }
994
995 /**
996 * _assert_hardreset - assert the HW reset line of submodules
997 * contained in the hwmod module.
998 * @oh: struct omap_hwmod *
999 * @name: name of the reset line to lookup and assert
1000 *
1001 * Some IP like dsp, ipu or iva contain processor that require
1002 * an HW reset line to be assert / deassert in order to enable fully
1003 * the IP.
1004 */
1005 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1006 {
1007 u8 shift;
1008
1009 if (!oh)
1010 return -EINVAL;
1011
1012 shift = _lookup_hardreset(oh, name);
1013 if (IS_ERR_VALUE(shift))
1014 return shift;
1015
1016 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1017 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
1018 shift);
1019 else if (cpu_is_omap44xx())
1020 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
1021 shift);
1022 else
1023 return -EINVAL;
1024 }
1025
1026 /**
1027 * _deassert_hardreset - deassert the HW reset line of submodules contained
1028 * in the hwmod module.
1029 * @oh: struct omap_hwmod *
1030 * @name: name of the reset line to look up and deassert
1031 *
1032 * Some IP like dsp, ipu or iva contain processor that require
1033 * an HW reset line to be assert / deassert in order to enable fully
1034 * the IP.
1035 */
1036 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1037 {
1038 u8 shift;
1039 int r;
1040
1041 if (!oh)
1042 return -EINVAL;
1043
1044 shift = _lookup_hardreset(oh, name);
1045 if (IS_ERR_VALUE(shift))
1046 return shift;
1047
1048 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1049 r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1050 shift);
1051 else if (cpu_is_omap44xx())
1052 r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
1053 shift);
1054 else
1055 return -EINVAL;
1056
1057 if (r == -EBUSY)
1058 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1059
1060 return r;
1061 }
1062
1063 /**
1064 * _read_hardreset - read the HW reset line state of submodules
1065 * contained in the hwmod module
1066 * @oh: struct omap_hwmod *
1067 * @name: name of the reset line to look up and read
1068 *
1069 * Return the state of the reset line.
1070 */
1071 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1072 {
1073 u8 shift;
1074
1075 if (!oh)
1076 return -EINVAL;
1077
1078 shift = _lookup_hardreset(oh, name);
1079 if (IS_ERR_VALUE(shift))
1080 return shift;
1081
1082 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1083 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1084 shift);
1085 } else if (cpu_is_omap44xx()) {
1086 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
1087 shift);
1088 } else {
1089 return -EINVAL;
1090 }
1091 }
1092
1093 /**
1094 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1095 * @oh: struct omap_hwmod *
1096 *
1097 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1098 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1099 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1100 * the module did not reset in time, or 0 upon success.
1101 *
1102 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1103 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1104 * use the SYSCONFIG softreset bit to provide the status.
1105 *
1106 * Note that some IP like McBSP do have reset control but don't have
1107 * reset status.
1108 */
1109 static int _ocp_softreset(struct omap_hwmod *oh)
1110 {
1111 u32 v;
1112 int c = 0;
1113 int ret = 0;
1114
1115 if (!oh->class->sysc ||
1116 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1117 return -EINVAL;
1118
1119 /* clocks must be on for this operation */
1120 if (oh->_state != _HWMOD_STATE_ENABLED) {
1121 pr_warning("omap_hwmod: %s: reset can only be entered from "
1122 "enabled state\n", oh->name);
1123 return -EINVAL;
1124 }
1125
1126 /* For some modules, all optionnal clocks need to be enabled as well */
1127 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1128 _enable_optional_clocks(oh);
1129
1130 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1131
1132 v = oh->_sysc_cache;
1133 ret = _set_softreset(oh, &v);
1134 if (ret)
1135 goto dis_opt_clks;
1136 _write_sysconfig(v, oh);
1137
1138 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1139 omap_test_timeout((omap_hwmod_read(oh,
1140 oh->class->sysc->syss_offs)
1141 & SYSS_RESETDONE_MASK),
1142 MAX_MODULE_SOFTRESET_WAIT, c);
1143 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
1144 omap_test_timeout(!(omap_hwmod_read(oh,
1145 oh->class->sysc->sysc_offs)
1146 & SYSC_TYPE2_SOFTRESET_MASK),
1147 MAX_MODULE_SOFTRESET_WAIT, c);
1148
1149 if (c == MAX_MODULE_SOFTRESET_WAIT)
1150 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1151 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1152 else
1153 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1154
1155 /*
1156 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1157 * _wait_target_ready() or _reset()
1158 */
1159
1160 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1161
1162 dis_opt_clks:
1163 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1164 _disable_optional_clocks(oh);
1165
1166 return ret;
1167 }
1168
1169 /**
1170 * _reset - reset an omap_hwmod
1171 * @oh: struct omap_hwmod *
1172 *
1173 * Resets an omap_hwmod @oh. The default software reset mechanism for
1174 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1175 * bit. However, some hwmods cannot be reset via this method: some
1176 * are not targets and therefore have no OCP header registers to
1177 * access; others (like the IVA) have idiosyncratic reset sequences.
1178 * So for these relatively rare cases, custom reset code can be
1179 * supplied in the struct omap_hwmod_class .reset function pointer.
1180 * Passes along the return value from either _reset() or the custom
1181 * reset function - these must return -EINVAL if the hwmod cannot be
1182 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1183 * the module did not reset in time, or 0 upon success.
1184 */
1185 static int _reset(struct omap_hwmod *oh)
1186 {
1187 int ret;
1188
1189 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1190
1191 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1192
1193 return ret;
1194 }
1195
1196 /**
1197 * _enable - enable an omap_hwmod
1198 * @oh: struct omap_hwmod *
1199 *
1200 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1201 * register target. Returns -EINVAL if the hwmod is in the wrong
1202 * state or passes along the return value of _wait_target_ready().
1203 */
1204 static int _enable(struct omap_hwmod *oh)
1205 {
1206 int r;
1207
1208 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1209 oh->_state != _HWMOD_STATE_IDLE &&
1210 oh->_state != _HWMOD_STATE_DISABLED) {
1211 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1212 "from initialized, idle, or disabled state\n", oh->name);
1213 return -EINVAL;
1214 }
1215
1216 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1217
1218 /*
1219 * If an IP contains only one HW reset line, then de-assert it in order
1220 * to allow to enable the clocks. Otherwise the PRCM will return
1221 * Intransition status, and the init will failed.
1222 */
1223 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1224 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1225 _deassert_hardreset(oh, oh->rst_lines[0].name);
1226
1227 /* Mux pins for device runtime if populated */
1228 if (oh->mux)
1229 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1230
1231 _add_initiator_dep(oh, mpu_oh);
1232 _enable_clocks(oh);
1233
1234 r = _wait_target_ready(oh);
1235 if (!r) {
1236 oh->_state = _HWMOD_STATE_ENABLED;
1237
1238 /* Access the sysconfig only if the target is ready */
1239 if (oh->class->sysc) {
1240 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1241 _update_sysc_cache(oh);
1242 _enable_sysc(oh);
1243 }
1244 } else {
1245 _disable_clocks(oh);
1246 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1247 oh->name, r);
1248 }
1249
1250 return r;
1251 }
1252
1253 /**
1254 * _idle - idle an omap_hwmod
1255 * @oh: struct omap_hwmod *
1256 *
1257 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1258 * no further work. Returns -EINVAL if the hwmod is in the wrong
1259 * state or returns 0.
1260 */
1261 static int _idle(struct omap_hwmod *oh)
1262 {
1263 if (oh->_state != _HWMOD_STATE_ENABLED) {
1264 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1265 "enabled state\n", oh->name);
1266 return -EINVAL;
1267 }
1268
1269 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1270
1271 if (oh->class->sysc)
1272 _idle_sysc(oh);
1273 _del_initiator_dep(oh, mpu_oh);
1274 _disable_clocks(oh);
1275
1276 /* Mux pins for device idle if populated */
1277 if (oh->mux)
1278 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1279
1280 oh->_state = _HWMOD_STATE_IDLE;
1281
1282 return 0;
1283 }
1284
1285 /**
1286 * _shutdown - shutdown an omap_hwmod
1287 * @oh: struct omap_hwmod *
1288 *
1289 * Shut down an omap_hwmod @oh. This should be called when the driver
1290 * used for the hwmod is removed or unloaded or if the driver is not
1291 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1292 * state or returns 0.
1293 */
1294 static int _shutdown(struct omap_hwmod *oh)
1295 {
1296 int ret;
1297 u8 prev_state;
1298
1299 if (oh->_state != _HWMOD_STATE_IDLE &&
1300 oh->_state != _HWMOD_STATE_ENABLED) {
1301 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1302 "from idle, or enabled state\n", oh->name);
1303 return -EINVAL;
1304 }
1305
1306 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1307
1308 if (oh->class->pre_shutdown) {
1309 prev_state = oh->_state;
1310 if (oh->_state == _HWMOD_STATE_IDLE)
1311 _enable(oh);
1312 ret = oh->class->pre_shutdown(oh);
1313 if (ret) {
1314 if (prev_state == _HWMOD_STATE_IDLE)
1315 _idle(oh);
1316 return ret;
1317 }
1318 }
1319
1320 if (oh->class->sysc)
1321 _shutdown_sysc(oh);
1322
1323 /*
1324 * If an IP contains only one HW reset line, then assert it
1325 * before disabling the clocks and shutting down the IP.
1326 */
1327 if (oh->rst_lines_cnt == 1)
1328 _assert_hardreset(oh, oh->rst_lines[0].name);
1329
1330 /* clocks and deps are already disabled in idle */
1331 if (oh->_state == _HWMOD_STATE_ENABLED) {
1332 _del_initiator_dep(oh, mpu_oh);
1333 /* XXX what about the other system initiators here? dma, dsp */
1334 _disable_clocks(oh);
1335 }
1336 /* XXX Should this code also force-disable the optional clocks? */
1337
1338 /* Mux pins to safe mode or use populated off mode values */
1339 if (oh->mux)
1340 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
1341
1342 oh->_state = _HWMOD_STATE_DISABLED;
1343
1344 return 0;
1345 }
1346
1347 /**
1348 * _setup - do initial configuration of omap_hwmod
1349 * @oh: struct omap_hwmod *
1350 *
1351 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
1352 * OCP_SYSCONFIG register. Returns 0.
1353 */
1354 static int _setup(struct omap_hwmod *oh, void *data)
1355 {
1356 int i, r;
1357 u8 postsetup_state;
1358
1359 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1360 return 0;
1361
1362 /* Set iclk autoidle mode */
1363 if (oh->slaves_cnt > 0) {
1364 for (i = 0; i < oh->slaves_cnt; i++) {
1365 struct omap_hwmod_ocp_if *os = oh->slaves[i];
1366 struct clk *c = os->_clk;
1367
1368 if (!c)
1369 continue;
1370
1371 if (os->flags & OCPIF_SWSUP_IDLE) {
1372 /* XXX omap_iclk_deny_idle(c); */
1373 } else {
1374 /* XXX omap_iclk_allow_idle(c); */
1375 clk_enable(c);
1376 }
1377 }
1378 }
1379
1380 oh->_state = _HWMOD_STATE_INITIALIZED;
1381
1382 /*
1383 * In the case of hwmod with hardreset that should not be
1384 * de-assert at boot time, we have to keep the module
1385 * initialized, because we cannot enable it properly with the
1386 * reset asserted. Exit without warning because that behavior is
1387 * expected.
1388 */
1389 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1390 return 0;
1391
1392 r = _enable(oh);
1393 if (r) {
1394 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1395 oh->name, oh->_state);
1396 return 0;
1397 }
1398
1399 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
1400 _reset(oh);
1401
1402 /*
1403 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
1404 * The _enable() function should be split to
1405 * avoid the rewrite of the OCP_SYSCONFIG register.
1406 */
1407 if (oh->class->sysc) {
1408 _update_sysc_cache(oh);
1409 _enable_sysc(oh);
1410 }
1411 }
1412
1413 postsetup_state = oh->_postsetup_state;
1414 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1415 postsetup_state = _HWMOD_STATE_ENABLED;
1416
1417 /*
1418 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1419 * it should be set by the core code as a runtime flag during startup
1420 */
1421 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1422 (postsetup_state == _HWMOD_STATE_IDLE))
1423 postsetup_state = _HWMOD_STATE_ENABLED;
1424
1425 if (postsetup_state == _HWMOD_STATE_IDLE)
1426 _idle(oh);
1427 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1428 _shutdown(oh);
1429 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1430 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1431 oh->name, postsetup_state);
1432
1433 return 0;
1434 }
1435
1436 /**
1437 * _register - register a struct omap_hwmod
1438 * @oh: struct omap_hwmod *
1439 *
1440 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1441 * already has been registered by the same name; -EINVAL if the
1442 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1443 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1444 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1445 * success.
1446 *
1447 * XXX The data should be copied into bootmem, so the original data
1448 * should be marked __initdata and freed after init. This would allow
1449 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1450 * that the copy process would be relatively complex due to the large number
1451 * of substructures.
1452 */
1453 static int __init _register(struct omap_hwmod *oh)
1454 {
1455 int ms_id;
1456
1457 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1458 (oh->_state != _HWMOD_STATE_UNKNOWN))
1459 return -EINVAL;
1460
1461 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1462
1463 if (_lookup(oh->name))
1464 return -EEXIST;
1465
1466 ms_id = _find_mpu_port_index(oh);
1467 if (!IS_ERR_VALUE(ms_id))
1468 oh->_mpu_port_index = ms_id;
1469 else
1470 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1471
1472 list_add_tail(&oh->node, &omap_hwmod_list);
1473
1474 spin_lock_init(&oh->_lock);
1475
1476 oh->_state = _HWMOD_STATE_REGISTERED;
1477
1478 /*
1479 * XXX Rather than doing a strcmp(), this should test a flag
1480 * set in the hwmod data, inserted by the autogenerator code.
1481 */
1482 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1483 mpu_oh = oh;
1484
1485 return 0;
1486 }
1487
1488
1489 /* Public functions */
1490
1491 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1492 {
1493 if (oh->flags & HWMOD_16BIT_REG)
1494 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1495 else
1496 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1497 }
1498
1499 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1500 {
1501 if (oh->flags & HWMOD_16BIT_REG)
1502 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1503 else
1504 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1505 }
1506
1507 /**
1508 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1509 * @oh: struct omap_hwmod *
1510 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1511 *
1512 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1513 * local copy. Intended to be used by drivers that have some erratum
1514 * that requires direct manipulation of the SIDLEMODE bits. Returns
1515 * -EINVAL if @oh is null, or passes along the return value from
1516 * _set_slave_idlemode().
1517 *
1518 * XXX Does this function have any current users? If not, we should
1519 * remove it; it is better to let the rest of the hwmod code handle this.
1520 * Any users of this function should be scrutinized carefully.
1521 */
1522 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1523 {
1524 u32 v;
1525 int retval = 0;
1526
1527 if (!oh)
1528 return -EINVAL;
1529
1530 v = oh->_sysc_cache;
1531
1532 retval = _set_slave_idlemode(oh, idlemode, &v);
1533 if (!retval)
1534 _write_sysconfig(v, oh);
1535
1536 return retval;
1537 }
1538
1539 /**
1540 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1541 * @name: name of the omap_hwmod to look up
1542 *
1543 * Given a @name of an omap_hwmod, return a pointer to the registered
1544 * struct omap_hwmod *, or NULL upon error.
1545 */
1546 struct omap_hwmod *omap_hwmod_lookup(const char *name)
1547 {
1548 struct omap_hwmod *oh;
1549
1550 if (!name)
1551 return NULL;
1552
1553 oh = _lookup(name);
1554
1555 return oh;
1556 }
1557
1558 /**
1559 * omap_hwmod_for_each - call function for each registered omap_hwmod
1560 * @fn: pointer to a callback function
1561 * @data: void * data to pass to callback function
1562 *
1563 * Call @fn for each registered omap_hwmod, passing @data to each
1564 * function. @fn must return 0 for success or any other value for
1565 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1566 * will stop and the non-zero return value will be passed to the
1567 * caller of omap_hwmod_for_each(). @fn is called with
1568 * omap_hwmod_for_each() held.
1569 */
1570 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1571 void *data)
1572 {
1573 struct omap_hwmod *temp_oh;
1574 int ret;
1575
1576 if (!fn)
1577 return -EINVAL;
1578
1579 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1580 ret = (*fn)(temp_oh, data);
1581 if (ret)
1582 break;
1583 }
1584
1585 return ret;
1586 }
1587
1588 /**
1589 * omap_hwmod_register - register an array of hwmods
1590 * @ohs: pointer to an array of omap_hwmods to register
1591 *
1592 * Intended to be called early in boot before the clock framework is
1593 * initialized. If @ohs is not null, will register all omap_hwmods
1594 * listed in @ohs that are valid for this chip. Returns 0.
1595 */
1596 int __init omap_hwmod_register(struct omap_hwmod **ohs)
1597 {
1598 int r, i;
1599
1600 if (!ohs)
1601 return 0;
1602
1603 i = 0;
1604 do {
1605 if (!omap_chip_is(ohs[i]->omap_chip))
1606 continue;
1607
1608 r = _register(ohs[i]);
1609 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
1610 r);
1611 } while (ohs[++i]);
1612
1613 return 0;
1614 }
1615
1616 /*
1617 * _populate_mpu_rt_base - populate the virtual address for a hwmod
1618 *
1619 * Must be called only from omap_hwmod_setup_all() so ioremap works properly.
1620 * Assumes the caller takes care of locking if needed.
1621 */
1622 static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
1623 {
1624 if (oh->_state != _HWMOD_STATE_REGISTERED)
1625 return 0;
1626
1627 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1628 return 0;
1629
1630 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
1631 if (!oh->_mpu_rt_va)
1632 pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
1633 __func__, oh->name);
1634
1635 return 0;
1636 }
1637
1638 /**
1639 * omap_hwmod_setup - do some post-clock framework initialization
1640 *
1641 * Must be called after omap2_clk_init(). Resolves the struct clk names
1642 * to struct clk pointers for each registered omap_hwmod. Also calls
1643 * _setup() on each hwmod. Returns 0 upon success or -EINVAL upon error.
1644 */
1645 static int __init omap_hwmod_setup_all(void)
1646 {
1647 int r;
1648
1649 if (!mpu_oh) {
1650 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
1651 __func__, MPU_INITIATOR_NAME);
1652 return -EINVAL;
1653 }
1654
1655 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
1656
1657 /* XXX check return value */
1658 r = omap_hwmod_for_each(_init_clocks, NULL);
1659 WARN(r, "omap_hwmod: %s: _init_clocks failed\n", __func__);
1660
1661 omap_hwmod_for_each(_setup, NULL);
1662
1663 return 0;
1664 }
1665 core_initcall(omap_hwmod_setup_all);
1666
1667 /**
1668 * omap_hwmod_enable - enable an omap_hwmod
1669 * @oh: struct omap_hwmod *
1670 *
1671 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
1672 * Returns -EINVAL on error or passes along the return value from _enable().
1673 */
1674 int omap_hwmod_enable(struct omap_hwmod *oh)
1675 {
1676 int r;
1677 unsigned long flags;
1678
1679 if (!oh)
1680 return -EINVAL;
1681
1682 spin_lock_irqsave(&oh->_lock, flags);
1683 r = _enable(oh);
1684 spin_unlock_irqrestore(&oh->_lock, flags);
1685
1686 return r;
1687 }
1688
1689 /**
1690 * omap_hwmod_idle - idle an omap_hwmod
1691 * @oh: struct omap_hwmod *
1692 *
1693 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
1694 * Returns -EINVAL on error or passes along the return value from _idle().
1695 */
1696 int omap_hwmod_idle(struct omap_hwmod *oh)
1697 {
1698 unsigned long flags;
1699
1700 if (!oh)
1701 return -EINVAL;
1702
1703 spin_lock_irqsave(&oh->_lock, flags);
1704 _idle(oh);
1705 spin_unlock_irqrestore(&oh->_lock, flags);
1706
1707 return 0;
1708 }
1709
1710 /**
1711 * omap_hwmod_shutdown - shutdown an omap_hwmod
1712 * @oh: struct omap_hwmod *
1713 *
1714 * Shutdown an omap_hwmod @oh. Intended to be called by
1715 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1716 * the return value from _shutdown().
1717 */
1718 int omap_hwmod_shutdown(struct omap_hwmod *oh)
1719 {
1720 unsigned long flags;
1721
1722 if (!oh)
1723 return -EINVAL;
1724
1725 spin_lock_irqsave(&oh->_lock, flags);
1726 _shutdown(oh);
1727 spin_unlock_irqrestore(&oh->_lock, flags);
1728
1729 return 0;
1730 }
1731
1732 /**
1733 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1734 * @oh: struct omap_hwmod *oh
1735 *
1736 * Intended to be called by the omap_device code.
1737 */
1738 int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1739 {
1740 unsigned long flags;
1741
1742 spin_lock_irqsave(&oh->_lock, flags);
1743 _enable_clocks(oh);
1744 spin_unlock_irqrestore(&oh->_lock, flags);
1745
1746 return 0;
1747 }
1748
1749 /**
1750 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1751 * @oh: struct omap_hwmod *oh
1752 *
1753 * Intended to be called by the omap_device code.
1754 */
1755 int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1756 {
1757 unsigned long flags;
1758
1759 spin_lock_irqsave(&oh->_lock, flags);
1760 _disable_clocks(oh);
1761 spin_unlock_irqrestore(&oh->_lock, flags);
1762
1763 return 0;
1764 }
1765
1766 /**
1767 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1768 * @oh: struct omap_hwmod *oh
1769 *
1770 * Intended to be called by drivers and core code when all posted
1771 * writes to a device must complete before continuing further
1772 * execution (for example, after clearing some device IRQSTATUS
1773 * register bits)
1774 *
1775 * XXX what about targets with multiple OCP threads?
1776 */
1777 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1778 {
1779 BUG_ON(!oh);
1780
1781 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
1782 WARN(1, "omap_device: %s: OCP barrier impossible due to "
1783 "device configuration\n", oh->name);
1784 return;
1785 }
1786
1787 /*
1788 * Forces posted writes to complete on the OCP thread handling
1789 * register writes
1790 */
1791 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
1792 }
1793
1794 /**
1795 * omap_hwmod_reset - reset the hwmod
1796 * @oh: struct omap_hwmod *
1797 *
1798 * Under some conditions, a driver may wish to reset the entire device.
1799 * Called from omap_device code. Returns -EINVAL on error or passes along
1800 * the return value from _reset().
1801 */
1802 int omap_hwmod_reset(struct omap_hwmod *oh)
1803 {
1804 int r;
1805 unsigned long flags;
1806
1807 if (!oh)
1808 return -EINVAL;
1809
1810 spin_lock_irqsave(&oh->_lock, flags);
1811 r = _reset(oh);
1812 spin_unlock_irqrestore(&oh->_lock, flags);
1813
1814 return r;
1815 }
1816
1817 /**
1818 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1819 * @oh: struct omap_hwmod *
1820 * @res: pointer to the first element of an array of struct resource to fill
1821 *
1822 * Count the number of struct resource array elements necessary to
1823 * contain omap_hwmod @oh resources. Intended to be called by code
1824 * that registers omap_devices. Intended to be used to determine the
1825 * size of a dynamically-allocated struct resource array, before
1826 * calling omap_hwmod_fill_resources(). Returns the number of struct
1827 * resource array elements needed.
1828 *
1829 * XXX This code is not optimized. It could attempt to merge adjacent
1830 * resource IDs.
1831 *
1832 */
1833 int omap_hwmod_count_resources(struct omap_hwmod *oh)
1834 {
1835 int ret, i;
1836
1837 ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
1838
1839 for (i = 0; i < oh->slaves_cnt; i++)
1840 ret += oh->slaves[i]->addr_cnt;
1841
1842 return ret;
1843 }
1844
1845 /**
1846 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1847 * @oh: struct omap_hwmod *
1848 * @res: pointer to the first element of an array of struct resource to fill
1849 *
1850 * Fill the struct resource array @res with resource data from the
1851 * omap_hwmod @oh. Intended to be called by code that registers
1852 * omap_devices. See also omap_hwmod_count_resources(). Returns the
1853 * number of array elements filled.
1854 */
1855 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1856 {
1857 int i, j;
1858 int r = 0;
1859
1860 /* For each IRQ, DMA, memory area, fill in array.*/
1861
1862 for (i = 0; i < oh->mpu_irqs_cnt; i++) {
1863 (res + r)->name = (oh->mpu_irqs + i)->name;
1864 (res + r)->start = (oh->mpu_irqs + i)->irq;
1865 (res + r)->end = (oh->mpu_irqs + i)->irq;
1866 (res + r)->flags = IORESOURCE_IRQ;
1867 r++;
1868 }
1869
1870 for (i = 0; i < oh->sdma_reqs_cnt; i++) {
1871 (res + r)->name = (oh->sdma_reqs + i)->name;
1872 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
1873 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
1874 (res + r)->flags = IORESOURCE_DMA;
1875 r++;
1876 }
1877
1878 for (i = 0; i < oh->slaves_cnt; i++) {
1879 struct omap_hwmod_ocp_if *os;
1880
1881 os = oh->slaves[i];
1882
1883 for (j = 0; j < os->addr_cnt; j++) {
1884 (res + r)->start = (os->addr + j)->pa_start;
1885 (res + r)->end = (os->addr + j)->pa_end;
1886 (res + r)->flags = IORESOURCE_MEM;
1887 r++;
1888 }
1889 }
1890
1891 return r;
1892 }
1893
1894 /**
1895 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
1896 * @oh: struct omap_hwmod *
1897 *
1898 * Return the powerdomain pointer associated with the OMAP module
1899 * @oh's main clock. If @oh does not have a main clk, return the
1900 * powerdomain associated with the interface clock associated with the
1901 * module's MPU port. (XXX Perhaps this should use the SDMA port
1902 * instead?) Returns NULL on error, or a struct powerdomain * on
1903 * success.
1904 */
1905 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
1906 {
1907 struct clk *c;
1908
1909 if (!oh)
1910 return NULL;
1911
1912 if (oh->_clk) {
1913 c = oh->_clk;
1914 } else {
1915 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1916 return NULL;
1917 c = oh->slaves[oh->_mpu_port_index]->_clk;
1918 }
1919
1920 if (!c->clkdm)
1921 return NULL;
1922
1923 return c->clkdm->pwrdm.ptr;
1924
1925 }
1926
1927 /**
1928 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
1929 * @oh: struct omap_hwmod *
1930 *
1931 * Returns the virtual address corresponding to the beginning of the
1932 * module's register target, in the address range that is intended to
1933 * be used by the MPU. Returns the virtual address upon success or NULL
1934 * upon error.
1935 */
1936 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
1937 {
1938 if (!oh)
1939 return NULL;
1940
1941 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1942 return NULL;
1943
1944 if (oh->_state == _HWMOD_STATE_UNKNOWN)
1945 return NULL;
1946
1947 return oh->_mpu_rt_va;
1948 }
1949
1950 /**
1951 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
1952 * @oh: struct omap_hwmod *
1953 * @init_oh: struct omap_hwmod * (initiator)
1954 *
1955 * Add a sleep dependency between the initiator @init_oh and @oh.
1956 * Intended to be called by DSP/Bridge code via platform_data for the
1957 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1958 * code needs to add/del initiator dependencies dynamically
1959 * before/after accessing a device. Returns the return value from
1960 * _add_initiator_dep().
1961 *
1962 * XXX Keep a usecount in the clockdomain code
1963 */
1964 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
1965 struct omap_hwmod *init_oh)
1966 {
1967 return _add_initiator_dep(oh, init_oh);
1968 }
1969
1970 /*
1971 * XXX what about functions for drivers to save/restore ocp_sysconfig
1972 * for context save/restore operations?
1973 */
1974
1975 /**
1976 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
1977 * @oh: struct omap_hwmod *
1978 * @init_oh: struct omap_hwmod * (initiator)
1979 *
1980 * Remove a sleep dependency between the initiator @init_oh and @oh.
1981 * Intended to be called by DSP/Bridge code via platform_data for the
1982 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
1983 * code needs to add/del initiator dependencies dynamically
1984 * before/after accessing a device. Returns the return value from
1985 * _del_initiator_dep().
1986 *
1987 * XXX Keep a usecount in the clockdomain code
1988 */
1989 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
1990 struct omap_hwmod *init_oh)
1991 {
1992 return _del_initiator_dep(oh, init_oh);
1993 }
1994
1995 /**
1996 * omap_hwmod_enable_wakeup - allow device to wake up the system
1997 * @oh: struct omap_hwmod *
1998 *
1999 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2000 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
2001 * registers to cause the PRCM to receive wakeup events from the
2002 * module. Does not set any wakeup routing registers beyond this
2003 * point - if the module is to wake up any other module or subsystem,
2004 * that must be set separately. Called by omap_device code. Returns
2005 * -EINVAL on error or 0 upon success.
2006 */
2007 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2008 {
2009 unsigned long flags;
2010 u32 v;
2011
2012 if (!oh->class->sysc ||
2013 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2014 return -EINVAL;
2015
2016 spin_lock_irqsave(&oh->_lock, flags);
2017 v = oh->_sysc_cache;
2018 _enable_wakeup(oh, &v);
2019 _write_sysconfig(v, oh);
2020 spin_unlock_irqrestore(&oh->_lock, flags);
2021
2022 return 0;
2023 }
2024
2025 /**
2026 * omap_hwmod_disable_wakeup - prevent device from waking the system
2027 * @oh: struct omap_hwmod *
2028 *
2029 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2030 * from sending wakeups to the PRCM. Eventually this should clear
2031 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2032 * from the module. Does not set any wakeup routing registers beyond
2033 * this point - if the module is to wake up any other module or
2034 * subsystem, that must be set separately. Called by omap_device
2035 * code. Returns -EINVAL on error or 0 upon success.
2036 */
2037 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2038 {
2039 unsigned long flags;
2040 u32 v;
2041
2042 if (!oh->class->sysc ||
2043 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2044 return -EINVAL;
2045
2046 spin_lock_irqsave(&oh->_lock, flags);
2047 v = oh->_sysc_cache;
2048 _disable_wakeup(oh, &v);
2049 _write_sysconfig(v, oh);
2050 spin_unlock_irqrestore(&oh->_lock, flags);
2051
2052 return 0;
2053 }
2054
2055 /**
2056 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2057 * contained in the hwmod module.
2058 * @oh: struct omap_hwmod *
2059 * @name: name of the reset line to lookup and assert
2060 *
2061 * Some IP like dsp, ipu or iva contain processor that require
2062 * an HW reset line to be assert / deassert in order to enable fully
2063 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2064 * yet supported on this OMAP; otherwise, passes along the return value
2065 * from _assert_hardreset().
2066 */
2067 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2068 {
2069 int ret;
2070 unsigned long flags;
2071
2072 if (!oh)
2073 return -EINVAL;
2074
2075 spin_lock_irqsave(&oh->_lock, flags);
2076 ret = _assert_hardreset(oh, name);
2077 spin_unlock_irqrestore(&oh->_lock, flags);
2078
2079 return ret;
2080 }
2081
2082 /**
2083 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2084 * contained in the hwmod module.
2085 * @oh: struct omap_hwmod *
2086 * @name: name of the reset line to look up and deassert
2087 *
2088 * Some IP like dsp, ipu or iva contain processor that require
2089 * an HW reset line to be assert / deassert in order to enable fully
2090 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2091 * yet supported on this OMAP; otherwise, passes along the return value
2092 * from _deassert_hardreset().
2093 */
2094 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2095 {
2096 int ret;
2097 unsigned long flags;
2098
2099 if (!oh)
2100 return -EINVAL;
2101
2102 spin_lock_irqsave(&oh->_lock, flags);
2103 ret = _deassert_hardreset(oh, name);
2104 spin_unlock_irqrestore(&oh->_lock, flags);
2105
2106 return ret;
2107 }
2108
2109 /**
2110 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2111 * contained in the hwmod module
2112 * @oh: struct omap_hwmod *
2113 * @name: name of the reset line to look up and read
2114 *
2115 * Return the current state of the hwmod @oh's reset line named @name:
2116 * returns -EINVAL upon parameter error or if this operation
2117 * is unsupported on the current OMAP; otherwise, passes along the return
2118 * value from _read_hardreset().
2119 */
2120 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2121 {
2122 int ret;
2123 unsigned long flags;
2124
2125 if (!oh)
2126 return -EINVAL;
2127
2128 spin_lock_irqsave(&oh->_lock, flags);
2129 ret = _read_hardreset(oh, name);
2130 spin_unlock_irqrestore(&oh->_lock, flags);
2131
2132 return ret;
2133 }
2134
2135
2136 /**
2137 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2138 * @classname: struct omap_hwmod_class name to search for
2139 * @fn: callback function pointer to call for each hwmod in class @classname
2140 * @user: arbitrary context data to pass to the callback function
2141 *
2142 * For each omap_hwmod of class @classname, call @fn.
2143 * If the callback function returns something other than
2144 * zero, the iterator is terminated, and the callback function's return
2145 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2146 * if @classname or @fn are NULL, or passes back the error code from @fn.
2147 */
2148 int omap_hwmod_for_each_by_class(const char *classname,
2149 int (*fn)(struct omap_hwmod *oh,
2150 void *user),
2151 void *user)
2152 {
2153 struct omap_hwmod *temp_oh;
2154 int ret = 0;
2155
2156 if (!classname || !fn)
2157 return -EINVAL;
2158
2159 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2160 __func__, classname);
2161
2162 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2163 if (!strcmp(temp_oh->class->name, classname)) {
2164 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2165 __func__, temp_oh->name);
2166 ret = (*fn)(temp_oh, user);
2167 if (ret)
2168 break;
2169 }
2170 }
2171
2172 if (ret)
2173 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2174 __func__, ret);
2175
2176 return ret;
2177 }
2178
2179 /**
2180 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2181 * @oh: struct omap_hwmod *
2182 * @state: state that _setup() should leave the hwmod in
2183 *
2184 * Sets the hwmod state that @oh will enter at the end of _setup()
2185 * (called by omap_hwmod_setup_all()). Only valid to call between
2186 * calling omap_hwmod_register() and omap_hwmod_setup_all(). Returns
2187 * 0 upon success or -EINVAL if there is a problem with the arguments
2188 * or if the hwmod is in the wrong state.
2189 */
2190 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2191 {
2192 int ret;
2193 unsigned long flags;
2194
2195 if (!oh)
2196 return -EINVAL;
2197
2198 if (state != _HWMOD_STATE_DISABLED &&
2199 state != _HWMOD_STATE_ENABLED &&
2200 state != _HWMOD_STATE_IDLE)
2201 return -EINVAL;
2202
2203 spin_lock_irqsave(&oh->_lock, flags);
2204
2205 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2206 ret = -EINVAL;
2207 goto ohsps_unlock;
2208 }
2209
2210 oh->_postsetup_state = state;
2211 ret = 0;
2212
2213 ohsps_unlock:
2214 spin_unlock_irqrestore(&oh->_lock, flags);
2215
2216 return ret;
2217 }
2218
2219 /**
2220 * omap_hwmod_get_context_loss_count - get lost context count
2221 * @oh: struct omap_hwmod *
2222 *
2223 * Query the powerdomain of of @oh to get the context loss
2224 * count for this device.
2225 *
2226 * Returns the context loss count of the powerdomain assocated with @oh
2227 * upon success, or zero if no powerdomain exists for @oh.
2228 */
2229 u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2230 {
2231 struct powerdomain *pwrdm;
2232 int ret = 0;
2233
2234 pwrdm = omap_hwmod_get_pwrdm(oh);
2235 if (pwrdm)
2236 ret = pwrdm_get_context_loss_count(pwrdm);
2237
2238 return ret;
2239 }
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