Merge branch 'samsung/pinctrl' into next/drivers
[deliverable/linux.git] / arch / arm / mach-omap2 / omap_hwmod.c
1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128 #undef DEBUG
129
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk.h>
134 #include <linux/delay.h>
135 #include <linux/err.h>
136 #include <linux/list.h>
137 #include <linux/mutex.h>
138 #include <linux/spinlock.h>
139 #include <linux/slab.h>
140 #include <linux/bootmem.h>
141
142 #include "common.h"
143 #include <plat/cpu.h>
144 #include "clockdomain.h"
145 #include "powerdomain.h"
146 #include <plat/clock.h>
147 #include <plat/omap_hwmod.h>
148 #include <plat/prcm.h>
149
150 #include "cm2xxx_3xxx.h"
151 #include "cminst44xx.h"
152 #include "prm2xxx_3xxx.h"
153 #include "prm44xx.h"
154 #include "prminst44xx.h"
155 #include "mux.h"
156 #include "pm.h"
157
158 /* Maximum microseconds to wait for OMAP module to softreset */
159 #define MAX_MODULE_SOFTRESET_WAIT 10000
160
161 /* Name of the OMAP hwmod for the MPU */
162 #define MPU_INITIATOR_NAME "mpu"
163
164 /*
165 * Number of struct omap_hwmod_link records per struct
166 * omap_hwmod_ocp_if record (master->slave and slave->master)
167 */
168 #define LINKS_PER_OCP_IF 2
169
170 /**
171 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
172 * @enable_module: function to enable a module (via MODULEMODE)
173 * @disable_module: function to disable a module (via MODULEMODE)
174 *
175 * XXX Eventually this functionality will be hidden inside the PRM/CM
176 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
177 * conditionals in this code.
178 */
179 struct omap_hwmod_soc_ops {
180 void (*enable_module)(struct omap_hwmod *oh);
181 int (*disable_module)(struct omap_hwmod *oh);
182 int (*wait_target_ready)(struct omap_hwmod *oh);
183 int (*assert_hardreset)(struct omap_hwmod *oh,
184 struct omap_hwmod_rst_info *ohri);
185 int (*deassert_hardreset)(struct omap_hwmod *oh,
186 struct omap_hwmod_rst_info *ohri);
187 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
188 struct omap_hwmod_rst_info *ohri);
189 int (*init_clkdm)(struct omap_hwmod *oh);
190 };
191
192 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
193 static struct omap_hwmod_soc_ops soc_ops;
194
195 /* omap_hwmod_list contains all registered struct omap_hwmods */
196 static LIST_HEAD(omap_hwmod_list);
197
198 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
199 static struct omap_hwmod *mpu_oh;
200
201 /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
202 static DEFINE_SPINLOCK(io_chain_lock);
203
204 /*
205 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
206 * allocated from - used to reduce the number of small memory
207 * allocations, which has a significant impact on performance
208 */
209 static struct omap_hwmod_link *linkspace;
210
211 /*
212 * free_ls, max_ls: array indexes into linkspace; representing the
213 * next free struct omap_hwmod_link index, and the maximum number of
214 * struct omap_hwmod_link records allocated (respectively)
215 */
216 static unsigned short free_ls, max_ls, ls_supp;
217
218 /* inited: set to true once the hwmod code is initialized */
219 static bool inited;
220
221 /* Private functions */
222
223 /**
224 * _fetch_next_ocp_if - return the next OCP interface in a list
225 * @p: ptr to a ptr to the list_head inside the ocp_if to return
226 * @i: pointer to the index of the element pointed to by @p in the list
227 *
228 * Return a pointer to the struct omap_hwmod_ocp_if record
229 * containing the struct list_head pointed to by @p, and increment
230 * @p such that a future call to this routine will return the next
231 * record.
232 */
233 static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
234 int *i)
235 {
236 struct omap_hwmod_ocp_if *oi;
237
238 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
239 *p = (*p)->next;
240
241 *i = *i + 1;
242
243 return oi;
244 }
245
246 /**
247 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
248 * @oh: struct omap_hwmod *
249 *
250 * Load the current value of the hwmod OCP_SYSCONFIG register into the
251 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
252 * OCP_SYSCONFIG register or 0 upon success.
253 */
254 static int _update_sysc_cache(struct omap_hwmod *oh)
255 {
256 if (!oh->class->sysc) {
257 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
258 return -EINVAL;
259 }
260
261 /* XXX ensure module interface clock is up */
262
263 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
264
265 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
266 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
267
268 return 0;
269 }
270
271 /**
272 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
273 * @v: OCP_SYSCONFIG value to write
274 * @oh: struct omap_hwmod *
275 *
276 * Write @v into the module class' OCP_SYSCONFIG register, if it has
277 * one. No return value.
278 */
279 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
280 {
281 if (!oh->class->sysc) {
282 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
283 return;
284 }
285
286 /* XXX ensure module interface clock is up */
287
288 /* Module might have lost context, always update cache and register */
289 oh->_sysc_cache = v;
290 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
291 }
292
293 /**
294 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
295 * @oh: struct omap_hwmod *
296 * @standbymode: MIDLEMODE field bits
297 * @v: pointer to register contents to modify
298 *
299 * Update the master standby mode bits in @v to be @standbymode for
300 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
301 * upon error or 0 upon success.
302 */
303 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
304 u32 *v)
305 {
306 u32 mstandby_mask;
307 u8 mstandby_shift;
308
309 if (!oh->class->sysc ||
310 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
311 return -EINVAL;
312
313 if (!oh->class->sysc->sysc_fields) {
314 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
315 return -EINVAL;
316 }
317
318 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
319 mstandby_mask = (0x3 << mstandby_shift);
320
321 *v &= ~mstandby_mask;
322 *v |= __ffs(standbymode) << mstandby_shift;
323
324 return 0;
325 }
326
327 /**
328 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
329 * @oh: struct omap_hwmod *
330 * @idlemode: SIDLEMODE field bits
331 * @v: pointer to register contents to modify
332 *
333 * Update the slave idle mode bits in @v to be @idlemode for the @oh
334 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
335 * or 0 upon success.
336 */
337 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
338 {
339 u32 sidle_mask;
340 u8 sidle_shift;
341
342 if (!oh->class->sysc ||
343 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
344 return -EINVAL;
345
346 if (!oh->class->sysc->sysc_fields) {
347 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
348 return -EINVAL;
349 }
350
351 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
352 sidle_mask = (0x3 << sidle_shift);
353
354 *v &= ~sidle_mask;
355 *v |= __ffs(idlemode) << sidle_shift;
356
357 return 0;
358 }
359
360 /**
361 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
362 * @oh: struct omap_hwmod *
363 * @clockact: CLOCKACTIVITY field bits
364 * @v: pointer to register contents to modify
365 *
366 * Update the clockactivity mode bits in @v to be @clockact for the
367 * @oh hwmod. Used for additional powersaving on some modules. Does
368 * not write to the hardware. Returns -EINVAL upon error or 0 upon
369 * success.
370 */
371 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
372 {
373 u32 clkact_mask;
374 u8 clkact_shift;
375
376 if (!oh->class->sysc ||
377 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
378 return -EINVAL;
379
380 if (!oh->class->sysc->sysc_fields) {
381 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
382 return -EINVAL;
383 }
384
385 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
386 clkact_mask = (0x3 << clkact_shift);
387
388 *v &= ~clkact_mask;
389 *v |= clockact << clkact_shift;
390
391 return 0;
392 }
393
394 /**
395 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
396 * @oh: struct omap_hwmod *
397 * @v: pointer to register contents to modify
398 *
399 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
400 * error or 0 upon success.
401 */
402 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
403 {
404 u32 softrst_mask;
405
406 if (!oh->class->sysc ||
407 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
408 return -EINVAL;
409
410 if (!oh->class->sysc->sysc_fields) {
411 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
412 return -EINVAL;
413 }
414
415 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
416
417 *v |= softrst_mask;
418
419 return 0;
420 }
421
422 /**
423 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
424 * @oh: struct omap_hwmod *
425 *
426 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
427 * of some modules. When the DMA must perform read/write accesses, the
428 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
429 * for power management, software must set the DMADISABLE bit back to 1.
430 *
431 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
432 * error or 0 upon success.
433 */
434 static int _set_dmadisable(struct omap_hwmod *oh)
435 {
436 u32 v;
437 u32 dmadisable_mask;
438
439 if (!oh->class->sysc ||
440 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
441 return -EINVAL;
442
443 if (!oh->class->sysc->sysc_fields) {
444 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
445 return -EINVAL;
446 }
447
448 /* clocks must be on for this operation */
449 if (oh->_state != _HWMOD_STATE_ENABLED) {
450 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
451 return -EINVAL;
452 }
453
454 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
455
456 v = oh->_sysc_cache;
457 dmadisable_mask =
458 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
459 v |= dmadisable_mask;
460 _write_sysconfig(v, oh);
461
462 return 0;
463 }
464
465 /**
466 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
467 * @oh: struct omap_hwmod *
468 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
469 * @v: pointer to register contents to modify
470 *
471 * Update the module autoidle bit in @v to be @autoidle for the @oh
472 * hwmod. The autoidle bit controls whether the module can gate
473 * internal clocks automatically when it isn't doing anything; the
474 * exact function of this bit varies on a per-module basis. This
475 * function does not write to the hardware. Returns -EINVAL upon
476 * error or 0 upon success.
477 */
478 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
479 u32 *v)
480 {
481 u32 autoidle_mask;
482 u8 autoidle_shift;
483
484 if (!oh->class->sysc ||
485 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
486 return -EINVAL;
487
488 if (!oh->class->sysc->sysc_fields) {
489 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
490 return -EINVAL;
491 }
492
493 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
494 autoidle_mask = (0x1 << autoidle_shift);
495
496 *v &= ~autoidle_mask;
497 *v |= autoidle << autoidle_shift;
498
499 return 0;
500 }
501
502 /**
503 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
504 * @oh: struct omap_hwmod *
505 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
506 *
507 * Set or clear the I/O pad wakeup flag in the mux entries for the
508 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
509 * in memory. If the hwmod is currently idled, and the new idle
510 * values don't match the previous ones, this function will also
511 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
512 * currently idled, this function won't touch the hardware: the new
513 * mux settings are written to the SCM PADCTRL registers when the
514 * hwmod is idled. No return value.
515 */
516 static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
517 {
518 struct omap_device_pad *pad;
519 bool change = false;
520 u16 prev_idle;
521 int j;
522
523 if (!oh->mux || !oh->mux->enabled)
524 return;
525
526 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
527 pad = oh->mux->pads_dynamic[j];
528
529 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
530 continue;
531
532 prev_idle = pad->idle;
533
534 if (set_wake)
535 pad->idle |= OMAP_WAKEUP_EN;
536 else
537 pad->idle &= ~OMAP_WAKEUP_EN;
538
539 if (prev_idle != pad->idle)
540 change = true;
541 }
542
543 if (change && oh->_state == _HWMOD_STATE_IDLE)
544 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
545 }
546
547 /**
548 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
549 * @oh: struct omap_hwmod *
550 *
551 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
552 * upon error or 0 upon success.
553 */
554 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
555 {
556 if (!oh->class->sysc ||
557 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
558 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
559 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
560 return -EINVAL;
561
562 if (!oh->class->sysc->sysc_fields) {
563 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
564 return -EINVAL;
565 }
566
567 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
568 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
569
570 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
571 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
572 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
573 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
574
575 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
576
577 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
578
579 return 0;
580 }
581
582 /**
583 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
584 * @oh: struct omap_hwmod *
585 *
586 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
587 * upon error or 0 upon success.
588 */
589 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
590 {
591 if (!oh->class->sysc ||
592 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
593 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
594 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
595 return -EINVAL;
596
597 if (!oh->class->sysc->sysc_fields) {
598 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
599 return -EINVAL;
600 }
601
602 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
603 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
604
605 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
606 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
607 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
608 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
609
610 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
611
612 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
613
614 return 0;
615 }
616
617 /**
618 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
619 * @oh: struct omap_hwmod *
620 *
621 * Prevent the hardware module @oh from entering idle while the
622 * hardare module initiator @init_oh is active. Useful when a module
623 * will be accessed by a particular initiator (e.g., if a module will
624 * be accessed by the IVA, there should be a sleepdep between the IVA
625 * initiator and the module). Only applies to modules in smart-idle
626 * mode. If the clockdomain is marked as not needing autodeps, return
627 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
628 * passes along clkdm_add_sleepdep() value upon success.
629 */
630 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
631 {
632 if (!oh->_clk)
633 return -EINVAL;
634
635 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
636 return 0;
637
638 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
639 }
640
641 /**
642 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
643 * @oh: struct omap_hwmod *
644 *
645 * Allow the hardware module @oh to enter idle while the hardare
646 * module initiator @init_oh is active. Useful when a module will not
647 * be accessed by a particular initiator (e.g., if a module will not
648 * be accessed by the IVA, there should be no sleepdep between the IVA
649 * initiator and the module). Only applies to modules in smart-idle
650 * mode. If the clockdomain is marked as not needing autodeps, return
651 * 0 without doing anything. Returns -EINVAL upon error or passes
652 * along clkdm_del_sleepdep() value upon success.
653 */
654 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
655 {
656 if (!oh->_clk)
657 return -EINVAL;
658
659 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
660 return 0;
661
662 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
663 }
664
665 /**
666 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
667 * @oh: struct omap_hwmod *
668 *
669 * Called from _init_clocks(). Populates the @oh _clk (main
670 * functional clock pointer) if a main_clk is present. Returns 0 on
671 * success or -EINVAL on error.
672 */
673 static int _init_main_clk(struct omap_hwmod *oh)
674 {
675 int ret = 0;
676
677 if (!oh->main_clk)
678 return 0;
679
680 oh->_clk = omap_clk_get_by_name(oh->main_clk);
681 if (!oh->_clk) {
682 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
683 oh->name, oh->main_clk);
684 return -EINVAL;
685 }
686
687 if (!oh->_clk->clkdm)
688 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
689 oh->main_clk, oh->_clk->name);
690
691 return ret;
692 }
693
694 /**
695 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
696 * @oh: struct omap_hwmod *
697 *
698 * Called from _init_clocks(). Populates the @oh OCP slave interface
699 * clock pointers. Returns 0 on success or -EINVAL on error.
700 */
701 static int _init_interface_clks(struct omap_hwmod *oh)
702 {
703 struct omap_hwmod_ocp_if *os;
704 struct list_head *p;
705 struct clk *c;
706 int i = 0;
707 int ret = 0;
708
709 p = oh->slave_ports.next;
710
711 while (i < oh->slaves_cnt) {
712 os = _fetch_next_ocp_if(&p, &i);
713 if (!os->clk)
714 continue;
715
716 c = omap_clk_get_by_name(os->clk);
717 if (!c) {
718 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
719 oh->name, os->clk);
720 ret = -EINVAL;
721 }
722 os->_clk = c;
723 }
724
725 return ret;
726 }
727
728 /**
729 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
730 * @oh: struct omap_hwmod *
731 *
732 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
733 * clock pointers. Returns 0 on success or -EINVAL on error.
734 */
735 static int _init_opt_clks(struct omap_hwmod *oh)
736 {
737 struct omap_hwmod_opt_clk *oc;
738 struct clk *c;
739 int i;
740 int ret = 0;
741
742 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
743 c = omap_clk_get_by_name(oc->clk);
744 if (!c) {
745 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
746 oh->name, oc->clk);
747 ret = -EINVAL;
748 }
749 oc->_clk = c;
750 }
751
752 return ret;
753 }
754
755 /**
756 * _enable_clocks - enable hwmod main clock and interface clocks
757 * @oh: struct omap_hwmod *
758 *
759 * Enables all clocks necessary for register reads and writes to succeed
760 * on the hwmod @oh. Returns 0.
761 */
762 static int _enable_clocks(struct omap_hwmod *oh)
763 {
764 struct omap_hwmod_ocp_if *os;
765 struct list_head *p;
766 int i = 0;
767
768 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
769
770 if (oh->_clk)
771 clk_enable(oh->_clk);
772
773 p = oh->slave_ports.next;
774
775 while (i < oh->slaves_cnt) {
776 os = _fetch_next_ocp_if(&p, &i);
777
778 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
779 clk_enable(os->_clk);
780 }
781
782 /* The opt clocks are controlled by the device driver. */
783
784 return 0;
785 }
786
787 /**
788 * _disable_clocks - disable hwmod main clock and interface clocks
789 * @oh: struct omap_hwmod *
790 *
791 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
792 */
793 static int _disable_clocks(struct omap_hwmod *oh)
794 {
795 struct omap_hwmod_ocp_if *os;
796 struct list_head *p;
797 int i = 0;
798
799 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
800
801 if (oh->_clk)
802 clk_disable(oh->_clk);
803
804 p = oh->slave_ports.next;
805
806 while (i < oh->slaves_cnt) {
807 os = _fetch_next_ocp_if(&p, &i);
808
809 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
810 clk_disable(os->_clk);
811 }
812
813 /* The opt clocks are controlled by the device driver. */
814
815 return 0;
816 }
817
818 static void _enable_optional_clocks(struct omap_hwmod *oh)
819 {
820 struct omap_hwmod_opt_clk *oc;
821 int i;
822
823 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
824
825 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
826 if (oc->_clk) {
827 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
828 oc->_clk->name);
829 clk_enable(oc->_clk);
830 }
831 }
832
833 static void _disable_optional_clocks(struct omap_hwmod *oh)
834 {
835 struct omap_hwmod_opt_clk *oc;
836 int i;
837
838 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
839
840 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
841 if (oc->_clk) {
842 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
843 oc->_clk->name);
844 clk_disable(oc->_clk);
845 }
846 }
847
848 /**
849 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
850 * @oh: struct omap_hwmod *
851 *
852 * Enables the PRCM module mode related to the hwmod @oh.
853 * No return value.
854 */
855 static void _omap4_enable_module(struct omap_hwmod *oh)
856 {
857 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
858 return;
859
860 pr_debug("omap_hwmod: %s: %s: %d\n",
861 oh->name, __func__, oh->prcm.omap4.modulemode);
862
863 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
864 oh->clkdm->prcm_partition,
865 oh->clkdm->cm_inst,
866 oh->clkdm->clkdm_offs,
867 oh->prcm.omap4.clkctrl_offs);
868 }
869
870 /**
871 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
872 * @oh: struct omap_hwmod *
873 *
874 * Wait for a module @oh to enter slave idle. Returns 0 if the module
875 * does not have an IDLEST bit or if the module successfully enters
876 * slave idle; otherwise, pass along the return value of the
877 * appropriate *_cm*_wait_module_idle() function.
878 */
879 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
880 {
881 if (!oh || !oh->clkdm)
882 return -EINVAL;
883
884 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
885 return 0;
886
887 if (oh->flags & HWMOD_NO_IDLEST)
888 return 0;
889
890 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
891 oh->clkdm->cm_inst,
892 oh->clkdm->clkdm_offs,
893 oh->prcm.omap4.clkctrl_offs);
894 }
895
896 /**
897 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
898 * @oh: struct omap_hwmod *oh
899 *
900 * Count and return the number of MPU IRQs associated with the hwmod
901 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
902 * NULL.
903 */
904 static int _count_mpu_irqs(struct omap_hwmod *oh)
905 {
906 struct omap_hwmod_irq_info *ohii;
907 int i = 0;
908
909 if (!oh || !oh->mpu_irqs)
910 return 0;
911
912 do {
913 ohii = &oh->mpu_irqs[i++];
914 } while (ohii->irq != -1);
915
916 return i-1;
917 }
918
919 /**
920 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
921 * @oh: struct omap_hwmod *oh
922 *
923 * Count and return the number of SDMA request lines associated with
924 * the hwmod @oh. Used to allocate struct resource data. Returns 0
925 * if @oh is NULL.
926 */
927 static int _count_sdma_reqs(struct omap_hwmod *oh)
928 {
929 struct omap_hwmod_dma_info *ohdi;
930 int i = 0;
931
932 if (!oh || !oh->sdma_reqs)
933 return 0;
934
935 do {
936 ohdi = &oh->sdma_reqs[i++];
937 } while (ohdi->dma_req != -1);
938
939 return i-1;
940 }
941
942 /**
943 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
944 * @oh: struct omap_hwmod *oh
945 *
946 * Count and return the number of address space ranges associated with
947 * the hwmod @oh. Used to allocate struct resource data. Returns 0
948 * if @oh is NULL.
949 */
950 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
951 {
952 struct omap_hwmod_addr_space *mem;
953 int i = 0;
954
955 if (!os || !os->addr)
956 return 0;
957
958 do {
959 mem = &os->addr[i++];
960 } while (mem->pa_start != mem->pa_end);
961
962 return i-1;
963 }
964
965 /**
966 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
967 * @oh: struct omap_hwmod * to operate on
968 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
969 * @irq: pointer to an unsigned int to store the MPU IRQ number to
970 *
971 * Retrieve a MPU hardware IRQ line number named by @name associated
972 * with the IP block pointed to by @oh. The IRQ number will be filled
973 * into the address pointed to by @dma. When @name is non-null, the
974 * IRQ line number associated with the named entry will be returned.
975 * If @name is null, the first matching entry will be returned. Data
976 * order is not meaningful in hwmod data, so callers are strongly
977 * encouraged to use a non-null @name whenever possible to avoid
978 * unpredictable effects if hwmod data is later added that causes data
979 * ordering to change. Returns 0 upon success or a negative error
980 * code upon error.
981 */
982 static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
983 unsigned int *irq)
984 {
985 int i;
986 bool found = false;
987
988 if (!oh->mpu_irqs)
989 return -ENOENT;
990
991 i = 0;
992 while (oh->mpu_irqs[i].irq != -1) {
993 if (name == oh->mpu_irqs[i].name ||
994 !strcmp(name, oh->mpu_irqs[i].name)) {
995 found = true;
996 break;
997 }
998 i++;
999 }
1000
1001 if (!found)
1002 return -ENOENT;
1003
1004 *irq = oh->mpu_irqs[i].irq;
1005
1006 return 0;
1007 }
1008
1009 /**
1010 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1011 * @oh: struct omap_hwmod * to operate on
1012 * @name: pointer to the name of the SDMA request line to fetch (optional)
1013 * @dma: pointer to an unsigned int to store the request line ID to
1014 *
1015 * Retrieve an SDMA request line ID named by @name on the IP block
1016 * pointed to by @oh. The ID will be filled into the address pointed
1017 * to by @dma. When @name is non-null, the request line ID associated
1018 * with the named entry will be returned. If @name is null, the first
1019 * matching entry will be returned. Data order is not meaningful in
1020 * hwmod data, so callers are strongly encouraged to use a non-null
1021 * @name whenever possible to avoid unpredictable effects if hwmod
1022 * data is later added that causes data ordering to change. Returns 0
1023 * upon success or a negative error code upon error.
1024 */
1025 static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1026 unsigned int *dma)
1027 {
1028 int i;
1029 bool found = false;
1030
1031 if (!oh->sdma_reqs)
1032 return -ENOENT;
1033
1034 i = 0;
1035 while (oh->sdma_reqs[i].dma_req != -1) {
1036 if (name == oh->sdma_reqs[i].name ||
1037 !strcmp(name, oh->sdma_reqs[i].name)) {
1038 found = true;
1039 break;
1040 }
1041 i++;
1042 }
1043
1044 if (!found)
1045 return -ENOENT;
1046
1047 *dma = oh->sdma_reqs[i].dma_req;
1048
1049 return 0;
1050 }
1051
1052 /**
1053 * _get_addr_space_by_name - fetch address space start & end by name
1054 * @oh: struct omap_hwmod * to operate on
1055 * @name: pointer to the name of the address space to fetch (optional)
1056 * @pa_start: pointer to a u32 to store the starting address to
1057 * @pa_end: pointer to a u32 to store the ending address to
1058 *
1059 * Retrieve address space start and end addresses for the IP block
1060 * pointed to by @oh. The data will be filled into the addresses
1061 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1062 * address space data associated with the named entry will be
1063 * returned. If @name is null, the first matching entry will be
1064 * returned. Data order is not meaningful in hwmod data, so callers
1065 * are strongly encouraged to use a non-null @name whenever possible
1066 * to avoid unpredictable effects if hwmod data is later added that
1067 * causes data ordering to change. Returns 0 upon success or a
1068 * negative error code upon error.
1069 */
1070 static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1071 u32 *pa_start, u32 *pa_end)
1072 {
1073 int i, j;
1074 struct omap_hwmod_ocp_if *os;
1075 struct list_head *p = NULL;
1076 bool found = false;
1077
1078 p = oh->slave_ports.next;
1079
1080 i = 0;
1081 while (i < oh->slaves_cnt) {
1082 os = _fetch_next_ocp_if(&p, &i);
1083
1084 if (!os->addr)
1085 return -ENOENT;
1086
1087 j = 0;
1088 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1089 if (name == os->addr[j].name ||
1090 !strcmp(name, os->addr[j].name)) {
1091 found = true;
1092 break;
1093 }
1094 j++;
1095 }
1096
1097 if (found)
1098 break;
1099 }
1100
1101 if (!found)
1102 return -ENOENT;
1103
1104 *pa_start = os->addr[j].pa_start;
1105 *pa_end = os->addr[j].pa_end;
1106
1107 return 0;
1108 }
1109
1110 /**
1111 * _save_mpu_port_index - find and save the index to @oh's MPU port
1112 * @oh: struct omap_hwmod *
1113 *
1114 * Determines the array index of the OCP slave port that the MPU uses
1115 * to address the device, and saves it into the struct omap_hwmod.
1116 * Intended to be called during hwmod registration only. No return
1117 * value.
1118 */
1119 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1120 {
1121 struct omap_hwmod_ocp_if *os = NULL;
1122 struct list_head *p;
1123 int i = 0;
1124
1125 if (!oh)
1126 return;
1127
1128 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1129
1130 p = oh->slave_ports.next;
1131
1132 while (i < oh->slaves_cnt) {
1133 os = _fetch_next_ocp_if(&p, &i);
1134 if (os->user & OCP_USER_MPU) {
1135 oh->_mpu_port = os;
1136 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1137 break;
1138 }
1139 }
1140
1141 return;
1142 }
1143
1144 /**
1145 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1146 * @oh: struct omap_hwmod *
1147 *
1148 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1149 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1150 * communicate with the IP block. This interface need not be directly
1151 * connected to the MPU (and almost certainly is not), but is directly
1152 * connected to the IP block represented by @oh. Returns a pointer
1153 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1154 * error or if there does not appear to be a path from the MPU to this
1155 * IP block.
1156 */
1157 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1158 {
1159 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1160 return NULL;
1161
1162 return oh->_mpu_port;
1163 };
1164
1165 /**
1166 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
1167 * @oh: struct omap_hwmod *
1168 *
1169 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1170 * the register target MPU address space; or returns NULL upon error.
1171 */
1172 static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
1173 {
1174 struct omap_hwmod_ocp_if *os;
1175 struct omap_hwmod_addr_space *mem;
1176 int found = 0, i = 0;
1177
1178 os = _find_mpu_rt_port(oh);
1179 if (!os || !os->addr)
1180 return NULL;
1181
1182 do {
1183 mem = &os->addr[i++];
1184 if (mem->flags & ADDR_TYPE_RT)
1185 found = 1;
1186 } while (!found && mem->pa_start != mem->pa_end);
1187
1188 return (found) ? mem : NULL;
1189 }
1190
1191 /**
1192 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1193 * @oh: struct omap_hwmod *
1194 *
1195 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1196 * by @oh is set to indicate to the PRCM that the IP block is active.
1197 * Usually this means placing the module into smart-idle mode and
1198 * smart-standby, but if there is a bug in the automatic idle handling
1199 * for the IP block, it may need to be placed into the force-idle or
1200 * no-idle variants of these modes. No return value.
1201 */
1202 static void _enable_sysc(struct omap_hwmod *oh)
1203 {
1204 u8 idlemode, sf;
1205 u32 v;
1206 bool clkdm_act;
1207
1208 if (!oh->class->sysc)
1209 return;
1210
1211 v = oh->_sysc_cache;
1212 sf = oh->class->sysc->sysc_flags;
1213
1214 if (sf & SYSC_HAS_SIDLEMODE) {
1215 clkdm_act = ((oh->clkdm &&
1216 oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) ||
1217 (oh->_clk && oh->_clk->clkdm &&
1218 oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU));
1219 if (clkdm_act && !(oh->class->sysc->idlemodes &
1220 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1221 idlemode = HWMOD_IDLEMODE_FORCE;
1222 else
1223 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1224 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
1225 _set_slave_idlemode(oh, idlemode, &v);
1226 }
1227
1228 if (sf & SYSC_HAS_MIDLEMODE) {
1229 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1230 idlemode = HWMOD_IDLEMODE_NO;
1231 } else {
1232 if (sf & SYSC_HAS_ENAWAKEUP)
1233 _enable_wakeup(oh, &v);
1234 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1235 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1236 else
1237 idlemode = HWMOD_IDLEMODE_SMART;
1238 }
1239 _set_master_standbymode(oh, idlemode, &v);
1240 }
1241
1242 /*
1243 * XXX The clock framework should handle this, by
1244 * calling into this code. But this must wait until the
1245 * clock structures are tagged with omap_hwmod entries
1246 */
1247 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1248 (sf & SYSC_HAS_CLOCKACTIVITY))
1249 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
1250
1251 /* If slave is in SMARTIDLE, also enable wakeup */
1252 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1253 _enable_wakeup(oh, &v);
1254
1255 _write_sysconfig(v, oh);
1256
1257 /*
1258 * Set the autoidle bit only after setting the smartidle bit
1259 * Setting this will not have any impact on the other modules.
1260 */
1261 if (sf & SYSC_HAS_AUTOIDLE) {
1262 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1263 0 : 1;
1264 _set_module_autoidle(oh, idlemode, &v);
1265 _write_sysconfig(v, oh);
1266 }
1267 }
1268
1269 /**
1270 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1271 * @oh: struct omap_hwmod *
1272 *
1273 * If module is marked as SWSUP_SIDLE, force the module into slave
1274 * idle; otherwise, configure it for smart-idle. If module is marked
1275 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1276 * configure it for smart-standby. No return value.
1277 */
1278 static void _idle_sysc(struct omap_hwmod *oh)
1279 {
1280 u8 idlemode, sf;
1281 u32 v;
1282
1283 if (!oh->class->sysc)
1284 return;
1285
1286 v = oh->_sysc_cache;
1287 sf = oh->class->sysc->sysc_flags;
1288
1289 if (sf & SYSC_HAS_SIDLEMODE) {
1290 /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
1291 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1292 !(oh->class->sysc->idlemodes &
1293 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1294 idlemode = HWMOD_IDLEMODE_FORCE;
1295 else
1296 idlemode = HWMOD_IDLEMODE_SMART;
1297 _set_slave_idlemode(oh, idlemode, &v);
1298 }
1299
1300 if (sf & SYSC_HAS_MIDLEMODE) {
1301 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1302 idlemode = HWMOD_IDLEMODE_FORCE;
1303 } else {
1304 if (sf & SYSC_HAS_ENAWAKEUP)
1305 _enable_wakeup(oh, &v);
1306 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1307 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1308 else
1309 idlemode = HWMOD_IDLEMODE_SMART;
1310 }
1311 _set_master_standbymode(oh, idlemode, &v);
1312 }
1313
1314 /* If slave is in SMARTIDLE, also enable wakeup */
1315 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1316 _enable_wakeup(oh, &v);
1317
1318 _write_sysconfig(v, oh);
1319 }
1320
1321 /**
1322 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1323 * @oh: struct omap_hwmod *
1324 *
1325 * Force the module into slave idle and master suspend. No return
1326 * value.
1327 */
1328 static void _shutdown_sysc(struct omap_hwmod *oh)
1329 {
1330 u32 v;
1331 u8 sf;
1332
1333 if (!oh->class->sysc)
1334 return;
1335
1336 v = oh->_sysc_cache;
1337 sf = oh->class->sysc->sysc_flags;
1338
1339 if (sf & SYSC_HAS_SIDLEMODE)
1340 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1341
1342 if (sf & SYSC_HAS_MIDLEMODE)
1343 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1344
1345 if (sf & SYSC_HAS_AUTOIDLE)
1346 _set_module_autoidle(oh, 1, &v);
1347
1348 _write_sysconfig(v, oh);
1349 }
1350
1351 /**
1352 * _lookup - find an omap_hwmod by name
1353 * @name: find an omap_hwmod by name
1354 *
1355 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1356 */
1357 static struct omap_hwmod *_lookup(const char *name)
1358 {
1359 struct omap_hwmod *oh, *temp_oh;
1360
1361 oh = NULL;
1362
1363 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1364 if (!strcmp(name, temp_oh->name)) {
1365 oh = temp_oh;
1366 break;
1367 }
1368 }
1369
1370 return oh;
1371 }
1372
1373 /**
1374 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1375 * @oh: struct omap_hwmod *
1376 *
1377 * Convert a clockdomain name stored in a struct omap_hwmod into a
1378 * clockdomain pointer, and save it into the struct omap_hwmod.
1379 * Return -EINVAL if the clkdm_name lookup failed.
1380 */
1381 static int _init_clkdm(struct omap_hwmod *oh)
1382 {
1383 if (!oh->clkdm_name)
1384 return 0;
1385
1386 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1387 if (!oh->clkdm) {
1388 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1389 oh->name, oh->clkdm_name);
1390 return -EINVAL;
1391 }
1392
1393 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1394 oh->name, oh->clkdm_name);
1395
1396 return 0;
1397 }
1398
1399 /**
1400 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1401 * well the clockdomain.
1402 * @oh: struct omap_hwmod *
1403 * @data: not used; pass NULL
1404 *
1405 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1406 * Resolves all clock names embedded in the hwmod. Returns 0 on
1407 * success, or a negative error code on failure.
1408 */
1409 static int _init_clocks(struct omap_hwmod *oh, void *data)
1410 {
1411 int ret = 0;
1412
1413 if (oh->_state != _HWMOD_STATE_REGISTERED)
1414 return 0;
1415
1416 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1417
1418 ret |= _init_main_clk(oh);
1419 ret |= _init_interface_clks(oh);
1420 ret |= _init_opt_clks(oh);
1421 if (soc_ops.init_clkdm)
1422 ret |= soc_ops.init_clkdm(oh);
1423
1424 if (!ret)
1425 oh->_state = _HWMOD_STATE_CLKS_INITED;
1426 else
1427 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1428
1429 return ret;
1430 }
1431
1432 /**
1433 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1434 * @oh: struct omap_hwmod *
1435 * @name: name of the reset line in the context of this hwmod
1436 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1437 *
1438 * Return the bit position of the reset line that match the
1439 * input name. Return -ENOENT if not found.
1440 */
1441 static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1442 struct omap_hwmod_rst_info *ohri)
1443 {
1444 int i;
1445
1446 for (i = 0; i < oh->rst_lines_cnt; i++) {
1447 const char *rst_line = oh->rst_lines[i].name;
1448 if (!strcmp(rst_line, name)) {
1449 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1450 ohri->st_shift = oh->rst_lines[i].st_shift;
1451 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1452 oh->name, __func__, rst_line, ohri->rst_shift,
1453 ohri->st_shift);
1454
1455 return 0;
1456 }
1457 }
1458
1459 return -ENOENT;
1460 }
1461
1462 /**
1463 * _assert_hardreset - assert the HW reset line of submodules
1464 * contained in the hwmod module.
1465 * @oh: struct omap_hwmod *
1466 * @name: name of the reset line to lookup and assert
1467 *
1468 * Some IP like dsp, ipu or iva contain processor that require an HW
1469 * reset line to be assert / deassert in order to enable fully the IP.
1470 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1471 * asserting the hardreset line on the currently-booted SoC, or passes
1472 * along the return value from _lookup_hardreset() or the SoC's
1473 * assert_hardreset code.
1474 */
1475 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1476 {
1477 struct omap_hwmod_rst_info ohri;
1478 u8 ret = -EINVAL;
1479
1480 if (!oh)
1481 return -EINVAL;
1482
1483 if (!soc_ops.assert_hardreset)
1484 return -ENOSYS;
1485
1486 ret = _lookup_hardreset(oh, name, &ohri);
1487 if (IS_ERR_VALUE(ret))
1488 return ret;
1489
1490 ret = soc_ops.assert_hardreset(oh, &ohri);
1491
1492 return ret;
1493 }
1494
1495 /**
1496 * _deassert_hardreset - deassert the HW reset line of submodules contained
1497 * in the hwmod module.
1498 * @oh: struct omap_hwmod *
1499 * @name: name of the reset line to look up and deassert
1500 *
1501 * Some IP like dsp, ipu or iva contain processor that require an HW
1502 * reset line to be assert / deassert in order to enable fully the IP.
1503 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1504 * deasserting the hardreset line on the currently-booted SoC, or passes
1505 * along the return value from _lookup_hardreset() or the SoC's
1506 * deassert_hardreset code.
1507 */
1508 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1509 {
1510 struct omap_hwmod_rst_info ohri;
1511 int ret = -EINVAL;
1512
1513 if (!oh)
1514 return -EINVAL;
1515
1516 if (!soc_ops.deassert_hardreset)
1517 return -ENOSYS;
1518
1519 ret = _lookup_hardreset(oh, name, &ohri);
1520 if (IS_ERR_VALUE(ret))
1521 return ret;
1522
1523 ret = soc_ops.deassert_hardreset(oh, &ohri);
1524 if (ret == -EBUSY)
1525 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1526
1527 return ret;
1528 }
1529
1530 /**
1531 * _read_hardreset - read the HW reset line state of submodules
1532 * contained in the hwmod module
1533 * @oh: struct omap_hwmod *
1534 * @name: name of the reset line to look up and read
1535 *
1536 * Return the state of the reset line. Returns -EINVAL if @oh is
1537 * null, -ENOSYS if we have no way of reading the hardreset line
1538 * status on the currently-booted SoC, or passes along the return
1539 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1540 * code.
1541 */
1542 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1543 {
1544 struct omap_hwmod_rst_info ohri;
1545 u8 ret = -EINVAL;
1546
1547 if (!oh)
1548 return -EINVAL;
1549
1550 if (!soc_ops.is_hardreset_asserted)
1551 return -ENOSYS;
1552
1553 ret = _lookup_hardreset(oh, name, &ohri);
1554 if (IS_ERR_VALUE(ret))
1555 return ret;
1556
1557 return soc_ops.is_hardreset_asserted(oh, &ohri);
1558 }
1559
1560 /**
1561 * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
1562 * @oh: struct omap_hwmod *
1563 *
1564 * If any hardreset line associated with @oh is asserted, then return true.
1565 * Otherwise, if @oh has no hardreset lines associated with it, or if
1566 * no hardreset lines associated with @oh are asserted, then return false.
1567 * This function is used to avoid executing some parts of the IP block
1568 * enable/disable sequence if a hardreset line is set.
1569 */
1570 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1571 {
1572 int i;
1573
1574 if (oh->rst_lines_cnt == 0)
1575 return false;
1576
1577 for (i = 0; i < oh->rst_lines_cnt; i++)
1578 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1579 return true;
1580
1581 return false;
1582 }
1583
1584 /**
1585 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1586 * @oh: struct omap_hwmod *
1587 *
1588 * Disable the PRCM module mode related to the hwmod @oh.
1589 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1590 */
1591 static int _omap4_disable_module(struct omap_hwmod *oh)
1592 {
1593 int v;
1594
1595 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1596 return -EINVAL;
1597
1598 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1599
1600 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1601 oh->clkdm->cm_inst,
1602 oh->clkdm->clkdm_offs,
1603 oh->prcm.omap4.clkctrl_offs);
1604
1605 if (_are_any_hardreset_lines_asserted(oh))
1606 return 0;
1607
1608 v = _omap4_wait_target_disable(oh);
1609 if (v)
1610 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1611 oh->name);
1612
1613 return 0;
1614 }
1615
1616 /**
1617 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1618 * @oh: struct omap_hwmod *
1619 *
1620 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1621 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1622 * reset this way, -EINVAL if the hwmod is in the wrong state,
1623 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1624 *
1625 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1626 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1627 * use the SYSCONFIG softreset bit to provide the status.
1628 *
1629 * Note that some IP like McBSP do have reset control but don't have
1630 * reset status.
1631 */
1632 static int _ocp_softreset(struct omap_hwmod *oh)
1633 {
1634 u32 v, softrst_mask;
1635 int c = 0;
1636 int ret = 0;
1637
1638 if (!oh->class->sysc ||
1639 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1640 return -ENOENT;
1641
1642 /* clocks must be on for this operation */
1643 if (oh->_state != _HWMOD_STATE_ENABLED) {
1644 pr_warning("omap_hwmod: %s: reset can only be entered from "
1645 "enabled state\n", oh->name);
1646 return -EINVAL;
1647 }
1648
1649 /* For some modules, all optionnal clocks need to be enabled as well */
1650 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1651 _enable_optional_clocks(oh);
1652
1653 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1654
1655 v = oh->_sysc_cache;
1656 ret = _set_softreset(oh, &v);
1657 if (ret)
1658 goto dis_opt_clks;
1659 _write_sysconfig(v, oh);
1660
1661 if (oh->class->sysc->srst_udelay)
1662 udelay(oh->class->sysc->srst_udelay);
1663
1664 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1665 omap_test_timeout((omap_hwmod_read(oh,
1666 oh->class->sysc->syss_offs)
1667 & SYSS_RESETDONE_MASK),
1668 MAX_MODULE_SOFTRESET_WAIT, c);
1669 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1670 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
1671 omap_test_timeout(!(omap_hwmod_read(oh,
1672 oh->class->sysc->sysc_offs)
1673 & softrst_mask),
1674 MAX_MODULE_SOFTRESET_WAIT, c);
1675 }
1676
1677 if (c == MAX_MODULE_SOFTRESET_WAIT)
1678 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1679 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1680 else
1681 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1682
1683 /*
1684 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1685 * _wait_target_ready() or _reset()
1686 */
1687
1688 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1689
1690 dis_opt_clks:
1691 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1692 _disable_optional_clocks(oh);
1693
1694 return ret;
1695 }
1696
1697 /**
1698 * _reset - reset an omap_hwmod
1699 * @oh: struct omap_hwmod *
1700 *
1701 * Resets an omap_hwmod @oh. If the module has a custom reset
1702 * function pointer defined, then call it to reset the IP block, and
1703 * pass along its return value to the caller. Otherwise, if the IP
1704 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1705 * associated with it, call a function to reset the IP block via that
1706 * method, and pass along the return value to the caller. Finally, if
1707 * the IP block has some hardreset lines associated with it, assert
1708 * all of those, but do _not_ deassert them. (This is because driver
1709 * authors have expressed an apparent requirement to control the
1710 * deassertion of the hardreset lines themselves.)
1711 *
1712 * The default software reset mechanism for most OMAP IP blocks is
1713 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1714 * hwmods cannot be reset via this method. Some are not targets and
1715 * therefore have no OCP header registers to access. Others (like the
1716 * IVA) have idiosyncratic reset sequences. So for these relatively
1717 * rare cases, custom reset code can be supplied in the struct
1718 * omap_hwmod_class .reset function pointer.
1719 *
1720 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1721 * does not prevent idling of the system. This is necessary for cases
1722 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1723 * kernel without disabling dma.
1724 *
1725 * Passes along the return value from either _ocp_softreset() or the
1726 * custom reset function - these must return -EINVAL if the hwmod
1727 * cannot be reset this way or if the hwmod is in the wrong state,
1728 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1729 */
1730 static int _reset(struct omap_hwmod *oh)
1731 {
1732 int i, r;
1733
1734 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1735
1736 if (oh->class->reset) {
1737 r = oh->class->reset(oh);
1738 } else {
1739 if (oh->rst_lines_cnt > 0) {
1740 for (i = 0; i < oh->rst_lines_cnt; i++)
1741 _assert_hardreset(oh, oh->rst_lines[i].name);
1742 return 0;
1743 } else {
1744 r = _ocp_softreset(oh);
1745 if (r == -ENOENT)
1746 r = 0;
1747 }
1748 }
1749
1750 _set_dmadisable(oh);
1751
1752 /*
1753 * OCP_SYSCONFIG bits need to be reprogrammed after a
1754 * softreset. The _enable() function should be split to avoid
1755 * the rewrite of the OCP_SYSCONFIG register.
1756 */
1757 if (oh->class->sysc) {
1758 _update_sysc_cache(oh);
1759 _enable_sysc(oh);
1760 }
1761
1762 return r;
1763 }
1764
1765 /**
1766 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
1767 *
1768 * Call the appropriate PRM function to clear any logged I/O chain
1769 * wakeups and to reconfigure the chain. This apparently needs to be
1770 * done upon every mux change. Since hwmods can be concurrently
1771 * enabled and idled, hold a spinlock around the I/O chain
1772 * reconfiguration sequence. No return value.
1773 *
1774 * XXX When the PRM code is moved to drivers, this function can be removed,
1775 * as the PRM infrastructure should abstract this.
1776 */
1777 static void _reconfigure_io_chain(void)
1778 {
1779 unsigned long flags;
1780
1781 spin_lock_irqsave(&io_chain_lock, flags);
1782
1783 if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
1784 omap3xxx_prm_reconfigure_io_chain();
1785 else if (cpu_is_omap44xx())
1786 omap44xx_prm_reconfigure_io_chain();
1787
1788 spin_unlock_irqrestore(&io_chain_lock, flags);
1789 }
1790
1791 /**
1792 * _enable - enable an omap_hwmod
1793 * @oh: struct omap_hwmod *
1794 *
1795 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1796 * register target. Returns -EINVAL if the hwmod is in the wrong
1797 * state or passes along the return value of _wait_target_ready().
1798 */
1799 static int _enable(struct omap_hwmod *oh)
1800 {
1801 int r;
1802 int hwsup = 0;
1803
1804 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1805
1806 /*
1807 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1808 * state at init. Now that someone is really trying to enable
1809 * them, just ensure that the hwmod mux is set.
1810 */
1811 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1812 /*
1813 * If the caller has mux data populated, do the mux'ing
1814 * which wouldn't have been done as part of the _enable()
1815 * done during setup.
1816 */
1817 if (oh->mux)
1818 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1819
1820 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1821 return 0;
1822 }
1823
1824 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1825 oh->_state != _HWMOD_STATE_IDLE &&
1826 oh->_state != _HWMOD_STATE_DISABLED) {
1827 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1828 oh->name);
1829 return -EINVAL;
1830 }
1831
1832 /*
1833 * If an IP block contains HW reset lines and any of them are
1834 * asserted, we let integration code associated with that
1835 * block handle the enable. We've received very little
1836 * information on what those driver authors need, and until
1837 * detailed information is provided and the driver code is
1838 * posted to the public lists, this is probably the best we
1839 * can do.
1840 */
1841 if (_are_any_hardreset_lines_asserted(oh))
1842 return 0;
1843
1844 /* Mux pins for device runtime if populated */
1845 if (oh->mux && (!oh->mux->enabled ||
1846 ((oh->_state == _HWMOD_STATE_IDLE) &&
1847 oh->mux->pads_dynamic))) {
1848 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1849 _reconfigure_io_chain();
1850 }
1851
1852 _add_initiator_dep(oh, mpu_oh);
1853
1854 if (oh->clkdm) {
1855 /*
1856 * A clockdomain must be in SW_SUP before enabling
1857 * completely the module. The clockdomain can be set
1858 * in HW_AUTO only when the module become ready.
1859 */
1860 hwsup = clkdm_in_hwsup(oh->clkdm);
1861 r = clkdm_hwmod_enable(oh->clkdm, oh);
1862 if (r) {
1863 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1864 oh->name, oh->clkdm->name, r);
1865 return r;
1866 }
1867 }
1868
1869 _enable_clocks(oh);
1870 if (soc_ops.enable_module)
1871 soc_ops.enable_module(oh);
1872
1873 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1874 -EINVAL;
1875 if (!r) {
1876 /*
1877 * Set the clockdomain to HW_AUTO only if the target is ready,
1878 * assuming that the previous state was HW_AUTO
1879 */
1880 if (oh->clkdm && hwsup)
1881 clkdm_allow_idle(oh->clkdm);
1882
1883 oh->_state = _HWMOD_STATE_ENABLED;
1884
1885 /* Access the sysconfig only if the target is ready */
1886 if (oh->class->sysc) {
1887 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1888 _update_sysc_cache(oh);
1889 _enable_sysc(oh);
1890 }
1891 } else {
1892 _disable_clocks(oh);
1893 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1894 oh->name, r);
1895
1896 if (oh->clkdm)
1897 clkdm_hwmod_disable(oh->clkdm, oh);
1898 }
1899
1900 return r;
1901 }
1902
1903 /**
1904 * _idle - idle an omap_hwmod
1905 * @oh: struct omap_hwmod *
1906 *
1907 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1908 * no further work. Returns -EINVAL if the hwmod is in the wrong
1909 * state or returns 0.
1910 */
1911 static int _idle(struct omap_hwmod *oh)
1912 {
1913 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1914
1915 if (oh->_state != _HWMOD_STATE_ENABLED) {
1916 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1917 oh->name);
1918 return -EINVAL;
1919 }
1920
1921 if (_are_any_hardreset_lines_asserted(oh))
1922 return 0;
1923
1924 if (oh->class->sysc)
1925 _idle_sysc(oh);
1926 _del_initiator_dep(oh, mpu_oh);
1927
1928 if (soc_ops.disable_module)
1929 soc_ops.disable_module(oh);
1930
1931 /*
1932 * The module must be in idle mode before disabling any parents
1933 * clocks. Otherwise, the parent clock might be disabled before
1934 * the module transition is done, and thus will prevent the
1935 * transition to complete properly.
1936 */
1937 _disable_clocks(oh);
1938 if (oh->clkdm)
1939 clkdm_hwmod_disable(oh->clkdm, oh);
1940
1941 /* Mux pins for device idle if populated */
1942 if (oh->mux && oh->mux->pads_dynamic) {
1943 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1944 _reconfigure_io_chain();
1945 }
1946
1947 oh->_state = _HWMOD_STATE_IDLE;
1948
1949 return 0;
1950 }
1951
1952 /**
1953 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1954 * @oh: struct omap_hwmod *
1955 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1956 *
1957 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1958 * local copy. Intended to be used by drivers that require
1959 * direct manipulation of the AUTOIDLE bits.
1960 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1961 * along the return value from _set_module_autoidle().
1962 *
1963 * Any users of this function should be scrutinized carefully.
1964 */
1965 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1966 {
1967 u32 v;
1968 int retval = 0;
1969 unsigned long flags;
1970
1971 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1972 return -EINVAL;
1973
1974 spin_lock_irqsave(&oh->_lock, flags);
1975
1976 v = oh->_sysc_cache;
1977
1978 retval = _set_module_autoidle(oh, autoidle, &v);
1979
1980 if (!retval)
1981 _write_sysconfig(v, oh);
1982
1983 spin_unlock_irqrestore(&oh->_lock, flags);
1984
1985 return retval;
1986 }
1987
1988 /**
1989 * _shutdown - shutdown an omap_hwmod
1990 * @oh: struct omap_hwmod *
1991 *
1992 * Shut down an omap_hwmod @oh. This should be called when the driver
1993 * used for the hwmod is removed or unloaded or if the driver is not
1994 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1995 * state or returns 0.
1996 */
1997 static int _shutdown(struct omap_hwmod *oh)
1998 {
1999 int ret, i;
2000 u8 prev_state;
2001
2002 if (oh->_state != _HWMOD_STATE_IDLE &&
2003 oh->_state != _HWMOD_STATE_ENABLED) {
2004 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2005 oh->name);
2006 return -EINVAL;
2007 }
2008
2009 if (_are_any_hardreset_lines_asserted(oh))
2010 return 0;
2011
2012 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2013
2014 if (oh->class->pre_shutdown) {
2015 prev_state = oh->_state;
2016 if (oh->_state == _HWMOD_STATE_IDLE)
2017 _enable(oh);
2018 ret = oh->class->pre_shutdown(oh);
2019 if (ret) {
2020 if (prev_state == _HWMOD_STATE_IDLE)
2021 _idle(oh);
2022 return ret;
2023 }
2024 }
2025
2026 if (oh->class->sysc) {
2027 if (oh->_state == _HWMOD_STATE_IDLE)
2028 _enable(oh);
2029 _shutdown_sysc(oh);
2030 }
2031
2032 /* clocks and deps are already disabled in idle */
2033 if (oh->_state == _HWMOD_STATE_ENABLED) {
2034 _del_initiator_dep(oh, mpu_oh);
2035 /* XXX what about the other system initiators here? dma, dsp */
2036 if (soc_ops.disable_module)
2037 soc_ops.disable_module(oh);
2038 _disable_clocks(oh);
2039 if (oh->clkdm)
2040 clkdm_hwmod_disable(oh->clkdm, oh);
2041 }
2042 /* XXX Should this code also force-disable the optional clocks? */
2043
2044 for (i = 0; i < oh->rst_lines_cnt; i++)
2045 _assert_hardreset(oh, oh->rst_lines[i].name);
2046
2047 /* Mux pins to safe mode or use populated off mode values */
2048 if (oh->mux)
2049 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
2050
2051 oh->_state = _HWMOD_STATE_DISABLED;
2052
2053 return 0;
2054 }
2055
2056 /**
2057 * _init_mpu_rt_base - populate the virtual address for a hwmod
2058 * @oh: struct omap_hwmod * to locate the virtual address
2059 *
2060 * Cache the virtual address used by the MPU to access this IP block's
2061 * registers. This address is needed early so the OCP registers that
2062 * are part of the device's address space can be ioremapped properly.
2063 * No return value.
2064 */
2065 static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2066 {
2067 struct omap_hwmod_addr_space *mem;
2068 void __iomem *va_start;
2069
2070 if (!oh)
2071 return;
2072
2073 _save_mpu_port_index(oh);
2074
2075 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2076 return;
2077
2078 mem = _find_mpu_rt_addr_space(oh);
2079 if (!mem) {
2080 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2081 oh->name);
2082 return;
2083 }
2084
2085 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2086 if (!va_start) {
2087 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2088 return;
2089 }
2090
2091 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2092 oh->name, va_start);
2093
2094 oh->_mpu_rt_va = va_start;
2095 }
2096
2097 /**
2098 * _init - initialize internal data for the hwmod @oh
2099 * @oh: struct omap_hwmod *
2100 * @n: (unused)
2101 *
2102 * Look up the clocks and the address space used by the MPU to access
2103 * registers belonging to the hwmod @oh. @oh must already be
2104 * registered at this point. This is the first of two phases for
2105 * hwmod initialization. Code called here does not touch any hardware
2106 * registers, it simply prepares internal data structures. Returns 0
2107 * upon success or if the hwmod isn't registered, or -EINVAL upon
2108 * failure.
2109 */
2110 static int __init _init(struct omap_hwmod *oh, void *data)
2111 {
2112 int r;
2113
2114 if (oh->_state != _HWMOD_STATE_REGISTERED)
2115 return 0;
2116
2117 _init_mpu_rt_base(oh, NULL);
2118
2119 r = _init_clocks(oh, NULL);
2120 if (IS_ERR_VALUE(r)) {
2121 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2122 return -EINVAL;
2123 }
2124
2125 oh->_state = _HWMOD_STATE_INITIALIZED;
2126
2127 return 0;
2128 }
2129
2130 /**
2131 * _setup_iclk_autoidle - configure an IP block's interface clocks
2132 * @oh: struct omap_hwmod *
2133 *
2134 * Set up the module's interface clocks. XXX This function is still mostly
2135 * a stub; implementing this properly requires iclk autoidle usecounting in
2136 * the clock code. No return value.
2137 */
2138 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2139 {
2140 struct omap_hwmod_ocp_if *os;
2141 struct list_head *p;
2142 int i = 0;
2143 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2144 return;
2145
2146 p = oh->slave_ports.next;
2147
2148 while (i < oh->slaves_cnt) {
2149 os = _fetch_next_ocp_if(&p, &i);
2150 if (!os->_clk)
2151 continue;
2152
2153 if (os->flags & OCPIF_SWSUP_IDLE) {
2154 /* XXX omap_iclk_deny_idle(c); */
2155 } else {
2156 /* XXX omap_iclk_allow_idle(c); */
2157 clk_enable(os->_clk);
2158 }
2159 }
2160
2161 return;
2162 }
2163
2164 /**
2165 * _setup_reset - reset an IP block during the setup process
2166 * @oh: struct omap_hwmod *
2167 *
2168 * Reset the IP block corresponding to the hwmod @oh during the setup
2169 * process. The IP block is first enabled so it can be successfully
2170 * reset. Returns 0 upon success or a negative error code upon
2171 * failure.
2172 */
2173 static int __init _setup_reset(struct omap_hwmod *oh)
2174 {
2175 int r;
2176
2177 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2178 return -EINVAL;
2179
2180 if (oh->rst_lines_cnt == 0) {
2181 r = _enable(oh);
2182 if (r) {
2183 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2184 oh->name, oh->_state);
2185 return -EINVAL;
2186 }
2187 }
2188
2189 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2190 r = _reset(oh);
2191
2192 return r;
2193 }
2194
2195 /**
2196 * _setup_postsetup - transition to the appropriate state after _setup
2197 * @oh: struct omap_hwmod *
2198 *
2199 * Place an IP block represented by @oh into a "post-setup" state --
2200 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2201 * this function is called at the end of _setup().) The postsetup
2202 * state for an IP block can be changed by calling
2203 * omap_hwmod_enter_postsetup_state() early in the boot process,
2204 * before one of the omap_hwmod_setup*() functions are called for the
2205 * IP block.
2206 *
2207 * The IP block stays in this state until a PM runtime-based driver is
2208 * loaded for that IP block. A post-setup state of IDLE is
2209 * appropriate for almost all IP blocks with runtime PM-enabled
2210 * drivers, since those drivers are able to enable the IP block. A
2211 * post-setup state of ENABLED is appropriate for kernels with PM
2212 * runtime disabled. The DISABLED state is appropriate for unusual IP
2213 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2214 * included, since the WDTIMER starts running on reset and will reset
2215 * the MPU if left active.
2216 *
2217 * This post-setup mechanism is deprecated. Once all of the OMAP
2218 * drivers have been converted to use PM runtime, and all of the IP
2219 * block data and interconnect data is available to the hwmod code, it
2220 * should be possible to replace this mechanism with a "lazy reset"
2221 * arrangement. In a "lazy reset" setup, each IP block is enabled
2222 * when the driver first probes, then all remaining IP blocks without
2223 * drivers are either shut down or enabled after the drivers have
2224 * loaded. However, this cannot take place until the above
2225 * preconditions have been met, since otherwise the late reset code
2226 * has no way of knowing which IP blocks are in use by drivers, and
2227 * which ones are unused.
2228 *
2229 * No return value.
2230 */
2231 static void __init _setup_postsetup(struct omap_hwmod *oh)
2232 {
2233 u8 postsetup_state;
2234
2235 if (oh->rst_lines_cnt > 0)
2236 return;
2237
2238 postsetup_state = oh->_postsetup_state;
2239 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2240 postsetup_state = _HWMOD_STATE_ENABLED;
2241
2242 /*
2243 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2244 * it should be set by the core code as a runtime flag during startup
2245 */
2246 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
2247 (postsetup_state == _HWMOD_STATE_IDLE)) {
2248 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2249 postsetup_state = _HWMOD_STATE_ENABLED;
2250 }
2251
2252 if (postsetup_state == _HWMOD_STATE_IDLE)
2253 _idle(oh);
2254 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2255 _shutdown(oh);
2256 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2257 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2258 oh->name, postsetup_state);
2259
2260 return;
2261 }
2262
2263 /**
2264 * _setup - prepare IP block hardware for use
2265 * @oh: struct omap_hwmod *
2266 * @n: (unused, pass NULL)
2267 *
2268 * Configure the IP block represented by @oh. This may include
2269 * enabling the IP block, resetting it, and placing it into a
2270 * post-setup state, depending on the type of IP block and applicable
2271 * flags. IP blocks are reset to prevent any previous configuration
2272 * by the bootloader or previous operating system from interfering
2273 * with power management or other parts of the system. The reset can
2274 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2275 * two phases for hwmod initialization. Code called here generally
2276 * affects the IP block hardware, or system integration hardware
2277 * associated with the IP block. Returns 0.
2278 */
2279 static int __init _setup(struct omap_hwmod *oh, void *data)
2280 {
2281 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2282 return 0;
2283
2284 _setup_iclk_autoidle(oh);
2285
2286 if (!_setup_reset(oh))
2287 _setup_postsetup(oh);
2288
2289 return 0;
2290 }
2291
2292 /**
2293 * _register - register a struct omap_hwmod
2294 * @oh: struct omap_hwmod *
2295 *
2296 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2297 * already has been registered by the same name; -EINVAL if the
2298 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2299 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2300 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2301 * success.
2302 *
2303 * XXX The data should be copied into bootmem, so the original data
2304 * should be marked __initdata and freed after init. This would allow
2305 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2306 * that the copy process would be relatively complex due to the large number
2307 * of substructures.
2308 */
2309 static int __init _register(struct omap_hwmod *oh)
2310 {
2311 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2312 (oh->_state != _HWMOD_STATE_UNKNOWN))
2313 return -EINVAL;
2314
2315 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2316
2317 if (_lookup(oh->name))
2318 return -EEXIST;
2319
2320 list_add_tail(&oh->node, &omap_hwmod_list);
2321
2322 INIT_LIST_HEAD(&oh->master_ports);
2323 INIT_LIST_HEAD(&oh->slave_ports);
2324 spin_lock_init(&oh->_lock);
2325
2326 oh->_state = _HWMOD_STATE_REGISTERED;
2327
2328 /*
2329 * XXX Rather than doing a strcmp(), this should test a flag
2330 * set in the hwmod data, inserted by the autogenerator code.
2331 */
2332 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2333 mpu_oh = oh;
2334
2335 return 0;
2336 }
2337
2338 /**
2339 * _alloc_links - return allocated memory for hwmod links
2340 * @ml: pointer to a struct omap_hwmod_link * for the master link
2341 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2342 *
2343 * Return pointers to two struct omap_hwmod_link records, via the
2344 * addresses pointed to by @ml and @sl. Will first attempt to return
2345 * memory allocated as part of a large initial block, but if that has
2346 * been exhausted, will allocate memory itself. Since ideally this
2347 * second allocation path will never occur, the number of these
2348 * 'supplemental' allocations will be logged when debugging is
2349 * enabled. Returns 0.
2350 */
2351 static int __init _alloc_links(struct omap_hwmod_link **ml,
2352 struct omap_hwmod_link **sl)
2353 {
2354 unsigned int sz;
2355
2356 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2357 *ml = &linkspace[free_ls++];
2358 *sl = &linkspace[free_ls++];
2359 return 0;
2360 }
2361
2362 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2363
2364 *sl = NULL;
2365 *ml = alloc_bootmem(sz);
2366
2367 memset(*ml, 0, sz);
2368
2369 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2370
2371 ls_supp++;
2372 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2373 ls_supp * LINKS_PER_OCP_IF);
2374
2375 return 0;
2376 };
2377
2378 /**
2379 * _add_link - add an interconnect between two IP blocks
2380 * @oi: pointer to a struct omap_hwmod_ocp_if record
2381 *
2382 * Add struct omap_hwmod_link records connecting the master IP block
2383 * specified in @oi->master to @oi, and connecting the slave IP block
2384 * specified in @oi->slave to @oi. This code is assumed to run before
2385 * preemption or SMP has been enabled, thus avoiding the need for
2386 * locking in this code. Changes to this assumption will require
2387 * additional locking. Returns 0.
2388 */
2389 static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2390 {
2391 struct omap_hwmod_link *ml, *sl;
2392
2393 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2394 oi->slave->name);
2395
2396 _alloc_links(&ml, &sl);
2397
2398 ml->ocp_if = oi;
2399 INIT_LIST_HEAD(&ml->node);
2400 list_add(&ml->node, &oi->master->master_ports);
2401 oi->master->masters_cnt++;
2402
2403 sl->ocp_if = oi;
2404 INIT_LIST_HEAD(&sl->node);
2405 list_add(&sl->node, &oi->slave->slave_ports);
2406 oi->slave->slaves_cnt++;
2407
2408 return 0;
2409 }
2410
2411 /**
2412 * _register_link - register a struct omap_hwmod_ocp_if
2413 * @oi: struct omap_hwmod_ocp_if *
2414 *
2415 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2416 * has already been registered; -EINVAL if @oi is NULL or if the
2417 * record pointed to by @oi is missing required fields; or 0 upon
2418 * success.
2419 *
2420 * XXX The data should be copied into bootmem, so the original data
2421 * should be marked __initdata and freed after init. This would allow
2422 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2423 */
2424 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2425 {
2426 if (!oi || !oi->master || !oi->slave || !oi->user)
2427 return -EINVAL;
2428
2429 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2430 return -EEXIST;
2431
2432 pr_debug("omap_hwmod: registering link from %s to %s\n",
2433 oi->master->name, oi->slave->name);
2434
2435 /*
2436 * Register the connected hwmods, if they haven't been
2437 * registered already
2438 */
2439 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2440 _register(oi->master);
2441
2442 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2443 _register(oi->slave);
2444
2445 _add_link(oi);
2446
2447 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2448
2449 return 0;
2450 }
2451
2452 /**
2453 * _alloc_linkspace - allocate large block of hwmod links
2454 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2455 *
2456 * Allocate a large block of struct omap_hwmod_link records. This
2457 * improves boot time significantly by avoiding the need to allocate
2458 * individual records one by one. If the number of records to
2459 * allocate in the block hasn't been manually specified, this function
2460 * will count the number of struct omap_hwmod_ocp_if records in @ois
2461 * and use that to determine the allocation size. For SoC families
2462 * that require multiple list registrations, such as OMAP3xxx, this
2463 * estimation process isn't optimal, so manual estimation is advised
2464 * in those cases. Returns -EEXIST if the allocation has already occurred
2465 * or 0 upon success.
2466 */
2467 static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2468 {
2469 unsigned int i = 0;
2470 unsigned int sz;
2471
2472 if (linkspace) {
2473 WARN(1, "linkspace already allocated\n");
2474 return -EEXIST;
2475 }
2476
2477 if (max_ls == 0)
2478 while (ois[i++])
2479 max_ls += LINKS_PER_OCP_IF;
2480
2481 sz = sizeof(struct omap_hwmod_link) * max_ls;
2482
2483 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2484 __func__, sz, max_ls);
2485
2486 linkspace = alloc_bootmem(sz);
2487
2488 memset(linkspace, 0, sz);
2489
2490 return 0;
2491 }
2492
2493 /* Static functions intended only for use in soc_ops field function pointers */
2494
2495 /**
2496 * _omap2_wait_target_ready - wait for a module to leave slave idle
2497 * @oh: struct omap_hwmod *
2498 *
2499 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2500 * does not have an IDLEST bit or if the module successfully leaves
2501 * slave idle; otherwise, pass along the return value of the
2502 * appropriate *_cm*_wait_module_ready() function.
2503 */
2504 static int _omap2_wait_target_ready(struct omap_hwmod *oh)
2505 {
2506 if (!oh)
2507 return -EINVAL;
2508
2509 if (oh->flags & HWMOD_NO_IDLEST)
2510 return 0;
2511
2512 if (!_find_mpu_rt_port(oh))
2513 return 0;
2514
2515 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2516
2517 return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2518 oh->prcm.omap2.idlest_reg_id,
2519 oh->prcm.omap2.idlest_idle_bit);
2520 }
2521
2522 /**
2523 * _omap4_wait_target_ready - wait for a module to leave slave idle
2524 * @oh: struct omap_hwmod *
2525 *
2526 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2527 * does not have an IDLEST bit or if the module successfully leaves
2528 * slave idle; otherwise, pass along the return value of the
2529 * appropriate *_cm*_wait_module_ready() function.
2530 */
2531 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2532 {
2533 if (!oh || !oh->clkdm)
2534 return -EINVAL;
2535
2536 if (oh->flags & HWMOD_NO_IDLEST)
2537 return 0;
2538
2539 if (!_find_mpu_rt_port(oh))
2540 return 0;
2541
2542 /* XXX check module SIDLEMODE, hardreset status */
2543
2544 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
2545 oh->clkdm->cm_inst,
2546 oh->clkdm->clkdm_offs,
2547 oh->prcm.omap4.clkctrl_offs);
2548 }
2549
2550 /**
2551 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2552 * @oh: struct omap_hwmod * to assert hardreset
2553 * @ohri: hardreset line data
2554 *
2555 * Call omap2_prm_assert_hardreset() with parameters extracted from
2556 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2557 * use as an soc_ops function pointer. Passes along the return value
2558 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2559 * for removal when the PRM code is moved into drivers/.
2560 */
2561 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2562 struct omap_hwmod_rst_info *ohri)
2563 {
2564 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
2565 ohri->rst_shift);
2566 }
2567
2568 /**
2569 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2570 * @oh: struct omap_hwmod * to deassert hardreset
2571 * @ohri: hardreset line data
2572 *
2573 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2574 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2575 * use as an soc_ops function pointer. Passes along the return value
2576 * from omap2_prm_deassert_hardreset(). XXX This function is
2577 * scheduled for removal when the PRM code is moved into drivers/.
2578 */
2579 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2580 struct omap_hwmod_rst_info *ohri)
2581 {
2582 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
2583 ohri->rst_shift,
2584 ohri->st_shift);
2585 }
2586
2587 /**
2588 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2589 * @oh: struct omap_hwmod * to test hardreset
2590 * @ohri: hardreset line data
2591 *
2592 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2593 * from the hwmod @oh and the hardreset line data @ohri. Only
2594 * intended for use as an soc_ops function pointer. Passes along the
2595 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2596 * function is scheduled for removal when the PRM code is moved into
2597 * drivers/.
2598 */
2599 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2600 struct omap_hwmod_rst_info *ohri)
2601 {
2602 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
2603 ohri->st_shift);
2604 }
2605
2606 /**
2607 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2608 * @oh: struct omap_hwmod * to assert hardreset
2609 * @ohri: hardreset line data
2610 *
2611 * Call omap4_prminst_assert_hardreset() with parameters extracted
2612 * from the hwmod @oh and the hardreset line data @ohri. Only
2613 * intended for use as an soc_ops function pointer. Passes along the
2614 * return value from omap4_prminst_assert_hardreset(). XXX This
2615 * function is scheduled for removal when the PRM code is moved into
2616 * drivers/.
2617 */
2618 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2619 struct omap_hwmod_rst_info *ohri)
2620 {
2621 if (!oh->clkdm)
2622 return -EINVAL;
2623
2624 return omap4_prminst_assert_hardreset(ohri->rst_shift,
2625 oh->clkdm->pwrdm.ptr->prcm_partition,
2626 oh->clkdm->pwrdm.ptr->prcm_offs,
2627 oh->prcm.omap4.rstctrl_offs);
2628 }
2629
2630 /**
2631 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2632 * @oh: struct omap_hwmod * to deassert hardreset
2633 * @ohri: hardreset line data
2634 *
2635 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2636 * from the hwmod @oh and the hardreset line data @ohri. Only
2637 * intended for use as an soc_ops function pointer. Passes along the
2638 * return value from omap4_prminst_deassert_hardreset(). XXX This
2639 * function is scheduled for removal when the PRM code is moved into
2640 * drivers/.
2641 */
2642 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2643 struct omap_hwmod_rst_info *ohri)
2644 {
2645 if (!oh->clkdm)
2646 return -EINVAL;
2647
2648 if (ohri->st_shift)
2649 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2650 oh->name, ohri->name);
2651 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
2652 oh->clkdm->pwrdm.ptr->prcm_partition,
2653 oh->clkdm->pwrdm.ptr->prcm_offs,
2654 oh->prcm.omap4.rstctrl_offs);
2655 }
2656
2657 /**
2658 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2659 * @oh: struct omap_hwmod * to test hardreset
2660 * @ohri: hardreset line data
2661 *
2662 * Call omap4_prminst_is_hardreset_asserted() with parameters
2663 * extracted from the hwmod @oh and the hardreset line data @ohri.
2664 * Only intended for use as an soc_ops function pointer. Passes along
2665 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2666 * This function is scheduled for removal when the PRM code is moved
2667 * into drivers/.
2668 */
2669 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2670 struct omap_hwmod_rst_info *ohri)
2671 {
2672 if (!oh->clkdm)
2673 return -EINVAL;
2674
2675 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
2676 oh->clkdm->pwrdm.ptr->prcm_partition,
2677 oh->clkdm->pwrdm.ptr->prcm_offs,
2678 oh->prcm.omap4.rstctrl_offs);
2679 }
2680
2681 /* Public functions */
2682
2683 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2684 {
2685 if (oh->flags & HWMOD_16BIT_REG)
2686 return __raw_readw(oh->_mpu_rt_va + reg_offs);
2687 else
2688 return __raw_readl(oh->_mpu_rt_va + reg_offs);
2689 }
2690
2691 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2692 {
2693 if (oh->flags & HWMOD_16BIT_REG)
2694 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
2695 else
2696 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
2697 }
2698
2699 /**
2700 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2701 * @oh: struct omap_hwmod *
2702 *
2703 * This is a public function exposed to drivers. Some drivers may need to do
2704 * some settings before and after resetting the device. Those drivers after
2705 * doing the necessary settings could use this function to start a reset by
2706 * setting the SYSCONFIG.SOFTRESET bit.
2707 */
2708 int omap_hwmod_softreset(struct omap_hwmod *oh)
2709 {
2710 u32 v;
2711 int ret;
2712
2713 if (!oh || !(oh->_sysc_cache))
2714 return -EINVAL;
2715
2716 v = oh->_sysc_cache;
2717 ret = _set_softreset(oh, &v);
2718 if (ret)
2719 goto error;
2720 _write_sysconfig(v, oh);
2721
2722 error:
2723 return ret;
2724 }
2725
2726 /**
2727 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
2728 * @oh: struct omap_hwmod *
2729 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
2730 *
2731 * Sets the IP block's OCP slave idlemode in hardware, and updates our
2732 * local copy. Intended to be used by drivers that have some erratum
2733 * that requires direct manipulation of the SIDLEMODE bits. Returns
2734 * -EINVAL if @oh is null, or passes along the return value from
2735 * _set_slave_idlemode().
2736 *
2737 * XXX Does this function have any current users? If not, we should
2738 * remove it; it is better to let the rest of the hwmod code handle this.
2739 * Any users of this function should be scrutinized carefully.
2740 */
2741 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
2742 {
2743 u32 v;
2744 int retval = 0;
2745
2746 if (!oh)
2747 return -EINVAL;
2748
2749 v = oh->_sysc_cache;
2750
2751 retval = _set_slave_idlemode(oh, idlemode, &v);
2752 if (!retval)
2753 _write_sysconfig(v, oh);
2754
2755 return retval;
2756 }
2757
2758 /**
2759 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2760 * @name: name of the omap_hwmod to look up
2761 *
2762 * Given a @name of an omap_hwmod, return a pointer to the registered
2763 * struct omap_hwmod *, or NULL upon error.
2764 */
2765 struct omap_hwmod *omap_hwmod_lookup(const char *name)
2766 {
2767 struct omap_hwmod *oh;
2768
2769 if (!name)
2770 return NULL;
2771
2772 oh = _lookup(name);
2773
2774 return oh;
2775 }
2776
2777 /**
2778 * omap_hwmod_for_each - call function for each registered omap_hwmod
2779 * @fn: pointer to a callback function
2780 * @data: void * data to pass to callback function
2781 *
2782 * Call @fn for each registered omap_hwmod, passing @data to each
2783 * function. @fn must return 0 for success or any other value for
2784 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2785 * will stop and the non-zero return value will be passed to the
2786 * caller of omap_hwmod_for_each(). @fn is called with
2787 * omap_hwmod_for_each() held.
2788 */
2789 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2790 void *data)
2791 {
2792 struct omap_hwmod *temp_oh;
2793 int ret = 0;
2794
2795 if (!fn)
2796 return -EINVAL;
2797
2798 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2799 ret = (*fn)(temp_oh, data);
2800 if (ret)
2801 break;
2802 }
2803
2804 return ret;
2805 }
2806
2807 /**
2808 * omap_hwmod_register_links - register an array of hwmod links
2809 * @ois: pointer to an array of omap_hwmod_ocp_if to register
2810 *
2811 * Intended to be called early in boot before the clock framework is
2812 * initialized. If @ois is not null, will register all omap_hwmods
2813 * listed in @ois that are valid for this chip. Returns -EINVAL if
2814 * omap_hwmod_init() hasn't been called before calling this function,
2815 * -ENOMEM if the link memory area can't be allocated, or 0 upon
2816 * success.
2817 */
2818 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
2819 {
2820 int r, i;
2821
2822 if (!inited)
2823 return -EINVAL;
2824
2825 if (!ois)
2826 return 0;
2827
2828 if (!linkspace) {
2829 if (_alloc_linkspace(ois)) {
2830 pr_err("omap_hwmod: could not allocate link space\n");
2831 return -ENOMEM;
2832 }
2833 }
2834
2835 i = 0;
2836 do {
2837 r = _register_link(ois[i]);
2838 WARN(r && r != -EEXIST,
2839 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
2840 ois[i]->master->name, ois[i]->slave->name, r);
2841 } while (ois[++i]);
2842
2843 return 0;
2844 }
2845
2846 /**
2847 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
2848 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
2849 *
2850 * If the hwmod data corresponding to the MPU subsystem IP block
2851 * hasn't been initialized and set up yet, do so now. This must be
2852 * done first since sleep dependencies may be added from other hwmods
2853 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
2854 * return value.
2855 */
2856 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
2857 {
2858 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
2859 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
2860 __func__, MPU_INITIATOR_NAME);
2861 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
2862 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
2863 }
2864
2865 /**
2866 * omap_hwmod_setup_one - set up a single hwmod
2867 * @oh_name: const char * name of the already-registered hwmod to set up
2868 *
2869 * Initialize and set up a single hwmod. Intended to be used for a
2870 * small number of early devices, such as the timer IP blocks used for
2871 * the scheduler clock. Must be called after omap2_clk_init().
2872 * Resolves the struct clk names to struct clk pointers for each
2873 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
2874 * -EINVAL upon error or 0 upon success.
2875 */
2876 int __init omap_hwmod_setup_one(const char *oh_name)
2877 {
2878 struct omap_hwmod *oh;
2879
2880 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
2881
2882 oh = _lookup(oh_name);
2883 if (!oh) {
2884 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
2885 return -EINVAL;
2886 }
2887
2888 _ensure_mpu_hwmod_is_setup(oh);
2889
2890 _init(oh, NULL);
2891 _setup(oh, NULL);
2892
2893 return 0;
2894 }
2895
2896 /**
2897 * omap_hwmod_setup_all - set up all registered IP blocks
2898 *
2899 * Initialize and set up all IP blocks registered with the hwmod code.
2900 * Must be called after omap2_clk_init(). Resolves the struct clk
2901 * names to struct clk pointers for each registered omap_hwmod. Also
2902 * calls _setup() on each hwmod. Returns 0 upon success.
2903 */
2904 static int __init omap_hwmod_setup_all(void)
2905 {
2906 _ensure_mpu_hwmod_is_setup(NULL);
2907
2908 omap_hwmod_for_each(_init, NULL);
2909 omap_hwmod_for_each(_setup, NULL);
2910
2911 return 0;
2912 }
2913 core_initcall(omap_hwmod_setup_all);
2914
2915 /**
2916 * omap_hwmod_enable - enable an omap_hwmod
2917 * @oh: struct omap_hwmod *
2918 *
2919 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
2920 * Returns -EINVAL on error or passes along the return value from _enable().
2921 */
2922 int omap_hwmod_enable(struct omap_hwmod *oh)
2923 {
2924 int r;
2925 unsigned long flags;
2926
2927 if (!oh)
2928 return -EINVAL;
2929
2930 spin_lock_irqsave(&oh->_lock, flags);
2931 r = _enable(oh);
2932 spin_unlock_irqrestore(&oh->_lock, flags);
2933
2934 return r;
2935 }
2936
2937 /**
2938 * omap_hwmod_idle - idle an omap_hwmod
2939 * @oh: struct omap_hwmod *
2940 *
2941 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
2942 * Returns -EINVAL on error or passes along the return value from _idle().
2943 */
2944 int omap_hwmod_idle(struct omap_hwmod *oh)
2945 {
2946 unsigned long flags;
2947
2948 if (!oh)
2949 return -EINVAL;
2950
2951 spin_lock_irqsave(&oh->_lock, flags);
2952 _idle(oh);
2953 spin_unlock_irqrestore(&oh->_lock, flags);
2954
2955 return 0;
2956 }
2957
2958 /**
2959 * omap_hwmod_shutdown - shutdown an omap_hwmod
2960 * @oh: struct omap_hwmod *
2961 *
2962 * Shutdown an omap_hwmod @oh. Intended to be called by
2963 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2964 * the return value from _shutdown().
2965 */
2966 int omap_hwmod_shutdown(struct omap_hwmod *oh)
2967 {
2968 unsigned long flags;
2969
2970 if (!oh)
2971 return -EINVAL;
2972
2973 spin_lock_irqsave(&oh->_lock, flags);
2974 _shutdown(oh);
2975 spin_unlock_irqrestore(&oh->_lock, flags);
2976
2977 return 0;
2978 }
2979
2980 /**
2981 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2982 * @oh: struct omap_hwmod *oh
2983 *
2984 * Intended to be called by the omap_device code.
2985 */
2986 int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2987 {
2988 unsigned long flags;
2989
2990 spin_lock_irqsave(&oh->_lock, flags);
2991 _enable_clocks(oh);
2992 spin_unlock_irqrestore(&oh->_lock, flags);
2993
2994 return 0;
2995 }
2996
2997 /**
2998 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2999 * @oh: struct omap_hwmod *oh
3000 *
3001 * Intended to be called by the omap_device code.
3002 */
3003 int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3004 {
3005 unsigned long flags;
3006
3007 spin_lock_irqsave(&oh->_lock, flags);
3008 _disable_clocks(oh);
3009 spin_unlock_irqrestore(&oh->_lock, flags);
3010
3011 return 0;
3012 }
3013
3014 /**
3015 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3016 * @oh: struct omap_hwmod *oh
3017 *
3018 * Intended to be called by drivers and core code when all posted
3019 * writes to a device must complete before continuing further
3020 * execution (for example, after clearing some device IRQSTATUS
3021 * register bits)
3022 *
3023 * XXX what about targets with multiple OCP threads?
3024 */
3025 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3026 {
3027 BUG_ON(!oh);
3028
3029 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
3030 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3031 oh->name);
3032 return;
3033 }
3034
3035 /*
3036 * Forces posted writes to complete on the OCP thread handling
3037 * register writes
3038 */
3039 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
3040 }
3041
3042 /**
3043 * omap_hwmod_reset - reset the hwmod
3044 * @oh: struct omap_hwmod *
3045 *
3046 * Under some conditions, a driver may wish to reset the entire device.
3047 * Called from omap_device code. Returns -EINVAL on error or passes along
3048 * the return value from _reset().
3049 */
3050 int omap_hwmod_reset(struct omap_hwmod *oh)
3051 {
3052 int r;
3053 unsigned long flags;
3054
3055 if (!oh)
3056 return -EINVAL;
3057
3058 spin_lock_irqsave(&oh->_lock, flags);
3059 r = _reset(oh);
3060 spin_unlock_irqrestore(&oh->_lock, flags);
3061
3062 return r;
3063 }
3064
3065 /*
3066 * IP block data retrieval functions
3067 */
3068
3069 /**
3070 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3071 * @oh: struct omap_hwmod *
3072 * @res: pointer to the first element of an array of struct resource to fill
3073 *
3074 * Count the number of struct resource array elements necessary to
3075 * contain omap_hwmod @oh resources. Intended to be called by code
3076 * that registers omap_devices. Intended to be used to determine the
3077 * size of a dynamically-allocated struct resource array, before
3078 * calling omap_hwmod_fill_resources(). Returns the number of struct
3079 * resource array elements needed.
3080 *
3081 * XXX This code is not optimized. It could attempt to merge adjacent
3082 * resource IDs.
3083 *
3084 */
3085 int omap_hwmod_count_resources(struct omap_hwmod *oh)
3086 {
3087 struct omap_hwmod_ocp_if *os;
3088 struct list_head *p;
3089 int ret;
3090 int i = 0;
3091
3092 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
3093
3094 p = oh->slave_ports.next;
3095
3096 while (i < oh->slaves_cnt) {
3097 os = _fetch_next_ocp_if(&p, &i);
3098 ret += _count_ocp_if_addr_spaces(os);
3099 }
3100
3101 return ret;
3102 }
3103
3104 /**
3105 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3106 * @oh: struct omap_hwmod *
3107 * @res: pointer to the first element of an array of struct resource to fill
3108 *
3109 * Fill the struct resource array @res with resource data from the
3110 * omap_hwmod @oh. Intended to be called by code that registers
3111 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3112 * number of array elements filled.
3113 */
3114 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3115 {
3116 struct omap_hwmod_ocp_if *os;
3117 struct list_head *p;
3118 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
3119 int r = 0;
3120
3121 /* For each IRQ, DMA, memory area, fill in array.*/
3122
3123 mpu_irqs_cnt = _count_mpu_irqs(oh);
3124 for (i = 0; i < mpu_irqs_cnt; i++) {
3125 (res + r)->name = (oh->mpu_irqs + i)->name;
3126 (res + r)->start = (oh->mpu_irqs + i)->irq;
3127 (res + r)->end = (oh->mpu_irqs + i)->irq;
3128 (res + r)->flags = IORESOURCE_IRQ;
3129 r++;
3130 }
3131
3132 sdma_reqs_cnt = _count_sdma_reqs(oh);
3133 for (i = 0; i < sdma_reqs_cnt; i++) {
3134 (res + r)->name = (oh->sdma_reqs + i)->name;
3135 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3136 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3137 (res + r)->flags = IORESOURCE_DMA;
3138 r++;
3139 }
3140
3141 p = oh->slave_ports.next;
3142
3143 i = 0;
3144 while (i < oh->slaves_cnt) {
3145 os = _fetch_next_ocp_if(&p, &i);
3146 addr_cnt = _count_ocp_if_addr_spaces(os);
3147
3148 for (j = 0; j < addr_cnt; j++) {
3149 (res + r)->name = (os->addr + j)->name;
3150 (res + r)->start = (os->addr + j)->pa_start;
3151 (res + r)->end = (os->addr + j)->pa_end;
3152 (res + r)->flags = IORESOURCE_MEM;
3153 r++;
3154 }
3155 }
3156
3157 return r;
3158 }
3159
3160 /**
3161 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3162 * @oh: struct omap_hwmod * to operate on
3163 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3164 * @name: pointer to the name of the data to fetch (optional)
3165 * @rsrc: pointer to a struct resource, allocated by the caller
3166 *
3167 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3168 * data for the IP block pointed to by @oh. The data will be filled
3169 * into a struct resource record pointed to by @rsrc. The struct
3170 * resource must be allocated by the caller. When @name is non-null,
3171 * the data associated with the matching entry in the IRQ/SDMA/address
3172 * space hwmod data arrays will be returned. If @name is null, the
3173 * first array entry will be returned. Data order is not meaningful
3174 * in hwmod data, so callers are strongly encouraged to use a non-null
3175 * @name whenever possible to avoid unpredictable effects if hwmod
3176 * data is later added that causes data ordering to change. This
3177 * function is only intended for use by OMAP core code. Device
3178 * drivers should not call this function - the appropriate bus-related
3179 * data accessor functions should be used instead. Returns 0 upon
3180 * success or a negative error code upon error.
3181 */
3182 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3183 const char *name, struct resource *rsrc)
3184 {
3185 int r;
3186 unsigned int irq, dma;
3187 u32 pa_start, pa_end;
3188
3189 if (!oh || !rsrc)
3190 return -EINVAL;
3191
3192 if (type == IORESOURCE_IRQ) {
3193 r = _get_mpu_irq_by_name(oh, name, &irq);
3194 if (r)
3195 return r;
3196
3197 rsrc->start = irq;
3198 rsrc->end = irq;
3199 } else if (type == IORESOURCE_DMA) {
3200 r = _get_sdma_req_by_name(oh, name, &dma);
3201 if (r)
3202 return r;
3203
3204 rsrc->start = dma;
3205 rsrc->end = dma;
3206 } else if (type == IORESOURCE_MEM) {
3207 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3208 if (r)
3209 return r;
3210
3211 rsrc->start = pa_start;
3212 rsrc->end = pa_end;
3213 } else {
3214 return -EINVAL;
3215 }
3216
3217 rsrc->flags = type;
3218 rsrc->name = name;
3219
3220 return 0;
3221 }
3222
3223 /**
3224 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3225 * @oh: struct omap_hwmod *
3226 *
3227 * Return the powerdomain pointer associated with the OMAP module
3228 * @oh's main clock. If @oh does not have a main clk, return the
3229 * powerdomain associated with the interface clock associated with the
3230 * module's MPU port. (XXX Perhaps this should use the SDMA port
3231 * instead?) Returns NULL on error, or a struct powerdomain * on
3232 * success.
3233 */
3234 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3235 {
3236 struct clk *c;
3237 struct omap_hwmod_ocp_if *oi;
3238
3239 if (!oh)
3240 return NULL;
3241
3242 if (oh->_clk) {
3243 c = oh->_clk;
3244 } else {
3245 oi = _find_mpu_rt_port(oh);
3246 if (!oi)
3247 return NULL;
3248 c = oi->_clk;
3249 }
3250
3251 if (!c->clkdm)
3252 return NULL;
3253
3254 return c->clkdm->pwrdm.ptr;
3255
3256 }
3257
3258 /**
3259 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3260 * @oh: struct omap_hwmod *
3261 *
3262 * Returns the virtual address corresponding to the beginning of the
3263 * module's register target, in the address range that is intended to
3264 * be used by the MPU. Returns the virtual address upon success or NULL
3265 * upon error.
3266 */
3267 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3268 {
3269 if (!oh)
3270 return NULL;
3271
3272 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3273 return NULL;
3274
3275 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3276 return NULL;
3277
3278 return oh->_mpu_rt_va;
3279 }
3280
3281 /**
3282 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3283 * @oh: struct omap_hwmod *
3284 * @init_oh: struct omap_hwmod * (initiator)
3285 *
3286 * Add a sleep dependency between the initiator @init_oh and @oh.
3287 * Intended to be called by DSP/Bridge code via platform_data for the
3288 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3289 * code needs to add/del initiator dependencies dynamically
3290 * before/after accessing a device. Returns the return value from
3291 * _add_initiator_dep().
3292 *
3293 * XXX Keep a usecount in the clockdomain code
3294 */
3295 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3296 struct omap_hwmod *init_oh)
3297 {
3298 return _add_initiator_dep(oh, init_oh);
3299 }
3300
3301 /*
3302 * XXX what about functions for drivers to save/restore ocp_sysconfig
3303 * for context save/restore operations?
3304 */
3305
3306 /**
3307 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3308 * @oh: struct omap_hwmod *
3309 * @init_oh: struct omap_hwmod * (initiator)
3310 *
3311 * Remove a sleep dependency between the initiator @init_oh and @oh.
3312 * Intended to be called by DSP/Bridge code via platform_data for the
3313 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3314 * code needs to add/del initiator dependencies dynamically
3315 * before/after accessing a device. Returns the return value from
3316 * _del_initiator_dep().
3317 *
3318 * XXX Keep a usecount in the clockdomain code
3319 */
3320 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3321 struct omap_hwmod *init_oh)
3322 {
3323 return _del_initiator_dep(oh, init_oh);
3324 }
3325
3326 /**
3327 * omap_hwmod_enable_wakeup - allow device to wake up the system
3328 * @oh: struct omap_hwmod *
3329 *
3330 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3331 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3332 * this IP block if it has dynamic mux entries. Eventually this
3333 * should set PRCM wakeup registers to cause the PRCM to receive
3334 * wakeup events from the module. Does not set any wakeup routing
3335 * registers beyond this point - if the module is to wake up any other
3336 * module or subsystem, that must be set separately. Called by
3337 * omap_device code. Returns -EINVAL on error or 0 upon success.
3338 */
3339 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3340 {
3341 unsigned long flags;
3342 u32 v;
3343
3344 spin_lock_irqsave(&oh->_lock, flags);
3345
3346 if (oh->class->sysc &&
3347 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3348 v = oh->_sysc_cache;
3349 _enable_wakeup(oh, &v);
3350 _write_sysconfig(v, oh);
3351 }
3352
3353 _set_idle_ioring_wakeup(oh, true);
3354 spin_unlock_irqrestore(&oh->_lock, flags);
3355
3356 return 0;
3357 }
3358
3359 /**
3360 * omap_hwmod_disable_wakeup - prevent device from waking the system
3361 * @oh: struct omap_hwmod *
3362 *
3363 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3364 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3365 * events for this IP block if it has dynamic mux entries. Eventually
3366 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3367 * wakeup events from the module. Does not set any wakeup routing
3368 * registers beyond this point - if the module is to wake up any other
3369 * module or subsystem, that must be set separately. Called by
3370 * omap_device code. Returns -EINVAL on error or 0 upon success.
3371 */
3372 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3373 {
3374 unsigned long flags;
3375 u32 v;
3376
3377 spin_lock_irqsave(&oh->_lock, flags);
3378
3379 if (oh->class->sysc &&
3380 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3381 v = oh->_sysc_cache;
3382 _disable_wakeup(oh, &v);
3383 _write_sysconfig(v, oh);
3384 }
3385
3386 _set_idle_ioring_wakeup(oh, false);
3387 spin_unlock_irqrestore(&oh->_lock, flags);
3388
3389 return 0;
3390 }
3391
3392 /**
3393 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3394 * contained in the hwmod module.
3395 * @oh: struct omap_hwmod *
3396 * @name: name of the reset line to lookup and assert
3397 *
3398 * Some IP like dsp, ipu or iva contain processor that require
3399 * an HW reset line to be assert / deassert in order to enable fully
3400 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3401 * yet supported on this OMAP; otherwise, passes along the return value
3402 * from _assert_hardreset().
3403 */
3404 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3405 {
3406 int ret;
3407 unsigned long flags;
3408
3409 if (!oh)
3410 return -EINVAL;
3411
3412 spin_lock_irqsave(&oh->_lock, flags);
3413 ret = _assert_hardreset(oh, name);
3414 spin_unlock_irqrestore(&oh->_lock, flags);
3415
3416 return ret;
3417 }
3418
3419 /**
3420 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3421 * contained in the hwmod module.
3422 * @oh: struct omap_hwmod *
3423 * @name: name of the reset line to look up and deassert
3424 *
3425 * Some IP like dsp, ipu or iva contain processor that require
3426 * an HW reset line to be assert / deassert in order to enable fully
3427 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3428 * yet supported on this OMAP; otherwise, passes along the return value
3429 * from _deassert_hardreset().
3430 */
3431 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3432 {
3433 int ret;
3434 unsigned long flags;
3435
3436 if (!oh)
3437 return -EINVAL;
3438
3439 spin_lock_irqsave(&oh->_lock, flags);
3440 ret = _deassert_hardreset(oh, name);
3441 spin_unlock_irqrestore(&oh->_lock, flags);
3442
3443 return ret;
3444 }
3445
3446 /**
3447 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3448 * contained in the hwmod module
3449 * @oh: struct omap_hwmod *
3450 * @name: name of the reset line to look up and read
3451 *
3452 * Return the current state of the hwmod @oh's reset line named @name:
3453 * returns -EINVAL upon parameter error or if this operation
3454 * is unsupported on the current OMAP; otherwise, passes along the return
3455 * value from _read_hardreset().
3456 */
3457 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3458 {
3459 int ret;
3460 unsigned long flags;
3461
3462 if (!oh)
3463 return -EINVAL;
3464
3465 spin_lock_irqsave(&oh->_lock, flags);
3466 ret = _read_hardreset(oh, name);
3467 spin_unlock_irqrestore(&oh->_lock, flags);
3468
3469 return ret;
3470 }
3471
3472
3473 /**
3474 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3475 * @classname: struct omap_hwmod_class name to search for
3476 * @fn: callback function pointer to call for each hwmod in class @classname
3477 * @user: arbitrary context data to pass to the callback function
3478 *
3479 * For each omap_hwmod of class @classname, call @fn.
3480 * If the callback function returns something other than
3481 * zero, the iterator is terminated, and the callback function's return
3482 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3483 * if @classname or @fn are NULL, or passes back the error code from @fn.
3484 */
3485 int omap_hwmod_for_each_by_class(const char *classname,
3486 int (*fn)(struct omap_hwmod *oh,
3487 void *user),
3488 void *user)
3489 {
3490 struct omap_hwmod *temp_oh;
3491 int ret = 0;
3492
3493 if (!classname || !fn)
3494 return -EINVAL;
3495
3496 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3497 __func__, classname);
3498
3499 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3500 if (!strcmp(temp_oh->class->name, classname)) {
3501 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3502 __func__, temp_oh->name);
3503 ret = (*fn)(temp_oh, user);
3504 if (ret)
3505 break;
3506 }
3507 }
3508
3509 if (ret)
3510 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3511 __func__, ret);
3512
3513 return ret;
3514 }
3515
3516 /**
3517 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3518 * @oh: struct omap_hwmod *
3519 * @state: state that _setup() should leave the hwmod in
3520 *
3521 * Sets the hwmod state that @oh will enter at the end of _setup()
3522 * (called by omap_hwmod_setup_*()). See also the documentation
3523 * for _setup_postsetup(), above. Returns 0 upon success or
3524 * -EINVAL if there is a problem with the arguments or if the hwmod is
3525 * in the wrong state.
3526 */
3527 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3528 {
3529 int ret;
3530 unsigned long flags;
3531
3532 if (!oh)
3533 return -EINVAL;
3534
3535 if (state != _HWMOD_STATE_DISABLED &&
3536 state != _HWMOD_STATE_ENABLED &&
3537 state != _HWMOD_STATE_IDLE)
3538 return -EINVAL;
3539
3540 spin_lock_irqsave(&oh->_lock, flags);
3541
3542 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3543 ret = -EINVAL;
3544 goto ohsps_unlock;
3545 }
3546
3547 oh->_postsetup_state = state;
3548 ret = 0;
3549
3550 ohsps_unlock:
3551 spin_unlock_irqrestore(&oh->_lock, flags);
3552
3553 return ret;
3554 }
3555
3556 /**
3557 * omap_hwmod_get_context_loss_count - get lost context count
3558 * @oh: struct omap_hwmod *
3559 *
3560 * Query the powerdomain of of @oh to get the context loss
3561 * count for this device.
3562 *
3563 * Returns the context loss count of the powerdomain assocated with @oh
3564 * upon success, or zero if no powerdomain exists for @oh.
3565 */
3566 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3567 {
3568 struct powerdomain *pwrdm;
3569 int ret = 0;
3570
3571 pwrdm = omap_hwmod_get_pwrdm(oh);
3572 if (pwrdm)
3573 ret = pwrdm_get_context_loss_count(pwrdm);
3574
3575 return ret;
3576 }
3577
3578 /**
3579 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3580 * @oh: struct omap_hwmod *
3581 *
3582 * Prevent the hwmod @oh from being reset during the setup process.
3583 * Intended for use by board-*.c files on boards with devices that
3584 * cannot tolerate being reset. Must be called before the hwmod has
3585 * been set up. Returns 0 upon success or negative error code upon
3586 * failure.
3587 */
3588 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3589 {
3590 if (!oh)
3591 return -EINVAL;
3592
3593 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3594 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3595 oh->name);
3596 return -EINVAL;
3597 }
3598
3599 oh->flags |= HWMOD_INIT_NO_RESET;
3600
3601 return 0;
3602 }
3603
3604 /**
3605 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3606 * @oh: struct omap_hwmod * containing hwmod mux entries
3607 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3608 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3609 *
3610 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3611 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3612 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3613 * this function is not called for a given pad_idx, then the ISR
3614 * associated with @oh's first MPU IRQ will be triggered when an I/O
3615 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3616 * the _dynamic or wakeup_ entry: if there are other entries not
3617 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3618 * entries are NOT COUNTED in the dynamic pad index. This function
3619 * must be called separately for each pad that requires its interrupt
3620 * to be re-routed this way. Returns -EINVAL if there is an argument
3621 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3622 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3623 *
3624 * XXX This function interface is fragile. Rather than using array
3625 * indexes, which are subject to unpredictable change, it should be
3626 * using hwmod IRQ names, and some other stable key for the hwmod mux
3627 * pad records.
3628 */
3629 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3630 {
3631 int nr_irqs;
3632
3633 might_sleep();
3634
3635 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3636 pad_idx >= oh->mux->nr_pads_dynamic)
3637 return -EINVAL;
3638
3639 /* Check the number of available mpu_irqs */
3640 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
3641 ;
3642
3643 if (irq_idx >= nr_irqs)
3644 return -EINVAL;
3645
3646 if (!oh->mux->irqs) {
3647 /* XXX What frees this? */
3648 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
3649 GFP_KERNEL);
3650 if (!oh->mux->irqs)
3651 return -ENOMEM;
3652 }
3653 oh->mux->irqs[pad_idx] = irq_idx;
3654
3655 return 0;
3656 }
3657
3658 /**
3659 * omap_hwmod_init - initialize the hwmod code
3660 *
3661 * Sets up some function pointers needed by the hwmod code to operate on the
3662 * currently-booted SoC. Intended to be called once during kernel init
3663 * before any hwmods are registered. No return value.
3664 */
3665 void __init omap_hwmod_init(void)
3666 {
3667 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
3668 soc_ops.wait_target_ready = _omap2_wait_target_ready;
3669 soc_ops.assert_hardreset = _omap2_assert_hardreset;
3670 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
3671 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
3672 } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
3673 soc_ops.enable_module = _omap4_enable_module;
3674 soc_ops.disable_module = _omap4_disable_module;
3675 soc_ops.wait_target_ready = _omap4_wait_target_ready;
3676 soc_ops.assert_hardreset = _omap4_assert_hardreset;
3677 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
3678 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
3679 soc_ops.init_clkdm = _init_clkdm;
3680 } else {
3681 WARN(1, "omap_hwmod: unknown SoC type\n");
3682 }
3683
3684 inited = true;
3685 }
3686
3687 /**
3688 * omap_hwmod_get_main_clk - get pointer to main clock name
3689 * @oh: struct omap_hwmod *
3690 *
3691 * Returns the main clock name assocated with @oh upon success,
3692 * or NULL if @oh is NULL.
3693 */
3694 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
3695 {
3696 if (!oh)
3697 return NULL;
3698
3699 return oh->main_clk;
3700 }
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