OMAP2+: hwmod: Do not write the enawakeup bit if SYSC_HAS_ENAWAKEUP is not set
[deliverable/linux.git] / arch / arm / mach-omap2 / omap_hwmod.c
1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 *
6 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
7 *
8 * Created in collaboration with (alphabetical order): Thara Gopinath,
9 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
10 * Sawant, Santosh Shilimkar, Richard Woodruff
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * Introduction
17 * ------------
18 * One way to view an OMAP SoC is as a collection of largely unrelated
19 * IP blocks connected by interconnects. The IP blocks include
20 * devices such as ARM processors, audio serial interfaces, UARTs,
21 * etc. Some of these devices, like the DSP, are created by TI;
22 * others, like the SGX, largely originate from external vendors. In
23 * TI's documentation, on-chip devices are referred to as "OMAP
24 * modules." Some of these IP blocks are identical across several
25 * OMAP versions. Others are revised frequently.
26 *
27 * These OMAP modules are tied together by various interconnects.
28 * Most of the address and data flow between modules is via OCP-based
29 * interconnects such as the L3 and L4 buses; but there are other
30 * interconnects that distribute the hardware clock tree, handle idle
31 * and reset signaling, supply power, and connect the modules to
32 * various pads or balls on the OMAP package.
33 *
34 * OMAP hwmod provides a consistent way to describe the on-chip
35 * hardware blocks and their integration into the rest of the chip.
36 * This description can be automatically generated from the TI
37 * hardware database. OMAP hwmod provides a standard, consistent API
38 * to reset, enable, idle, and disable these hardware blocks. And
39 * hwmod provides a way for other core code, such as the Linux device
40 * code or the OMAP power management and address space mapping code,
41 * to query the hardware database.
42 *
43 * Using hwmod
44 * -----------
45 * Drivers won't call hwmod functions directly. That is done by the
46 * omap_device code, and in rare occasions, by custom integration code
47 * in arch/arm/ *omap*. The omap_device code includes functions to
48 * build a struct platform_device using omap_hwmod data, and that is
49 * currently how hwmod data is communicated to drivers and to the
50 * Linux driver model. Most drivers will call omap_hwmod functions only
51 * indirectly, via pm_runtime*() functions.
52 *
53 * From a layering perspective, here is where the OMAP hwmod code
54 * fits into the kernel software stack:
55 *
56 * +-------------------------------+
57 * | Device driver code |
58 * | (e.g., drivers/) |
59 * +-------------------------------+
60 * | Linux driver model |
61 * | (platform_device / |
62 * | platform_driver data/code) |
63 * +-------------------------------+
64 * | OMAP core-driver integration |
65 * |(arch/arm/mach-omap2/devices.c)|
66 * +-------------------------------+
67 * | omap_device code |
68 * | (../plat-omap/omap_device.c) |
69 * +-------------------------------+
70 * ----> | omap_hwmod code/data | <-----
71 * | (../mach-omap2/omap_hwmod*) |
72 * +-------------------------------+
73 * | OMAP clock/PRCM/register fns |
74 * | (__raw_{read,write}l, clk*) |
75 * +-------------------------------+
76 *
77 * Device drivers should not contain any OMAP-specific code or data in
78 * them. They should only contain code to operate the IP block that
79 * the driver is responsible for. This is because these IP blocks can
80 * also appear in other SoCs, either from TI (such as DaVinci) or from
81 * other manufacturers; and drivers should be reusable across other
82 * platforms.
83 *
84 * The OMAP hwmod code also will attempt to reset and idle all on-chip
85 * devices upon boot. The goal here is for the kernel to be
86 * completely self-reliant and independent from bootloaders. This is
87 * to ensure a repeatable configuration, both to ensure consistent
88 * runtime behavior, and to make it easier for others to reproduce
89 * bugs.
90 *
91 * OMAP module activity states
92 * ---------------------------
93 * The hwmod code considers modules to be in one of several activity
94 * states. IP blocks start out in an UNKNOWN state, then once they
95 * are registered via the hwmod code, proceed to the REGISTERED state.
96 * Once their clock names are resolved to clock pointers, the module
97 * enters the CLKS_INITED state; and finally, once the module has been
98 * reset and the integration registers programmed, the INITIALIZED state
99 * is entered. The hwmod code will then place the module into either
100 * the IDLE state to save power, or in the case of a critical system
101 * module, the ENABLED state.
102 *
103 * OMAP core integration code can then call omap_hwmod*() functions
104 * directly to move the module between the IDLE, ENABLED, and DISABLED
105 * states, as needed. This is done during both the PM idle loop, and
106 * in the OMAP core integration code's implementation of the PM runtime
107 * functions.
108 *
109 * References
110 * ----------
111 * This is a partial list.
112 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
113 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
114 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
115 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
116 * - Open Core Protocol Specification 2.2
117 *
118 * To do:
119 * - handle IO mapping
120 * - bus throughput & module latency measurement code
121 *
122 * XXX add tests at the beginning of each function to ensure the hwmod is
123 * in the appropriate state
124 * XXX error return values should be checked to ensure that they are
125 * appropriate
126 */
127 #undef DEBUG
128
129 #include <linux/kernel.h>
130 #include <linux/errno.h>
131 #include <linux/io.h>
132 #include <linux/clk.h>
133 #include <linux/delay.h>
134 #include <linux/err.h>
135 #include <linux/list.h>
136 #include <linux/mutex.h>
137 #include <linux/spinlock.h>
138
139 #include <plat/common.h>
140 #include <plat/cpu.h>
141 #include "clockdomain.h"
142 #include "powerdomain.h"
143 #include <plat/clock.h>
144 #include <plat/omap_hwmod.h>
145 #include <plat/prcm.h>
146
147 #include "cm2xxx_3xxx.h"
148 #include "cm44xx.h"
149 #include "prm2xxx_3xxx.h"
150 #include "prm44xx.h"
151 #include "mux.h"
152
153 /* Maximum microseconds to wait for OMAP module to softreset */
154 #define MAX_MODULE_SOFTRESET_WAIT 10000
155
156 /* Name of the OMAP hwmod for the MPU */
157 #define MPU_INITIATOR_NAME "mpu"
158
159 /* omap_hwmod_list contains all registered struct omap_hwmods */
160 static LIST_HEAD(omap_hwmod_list);
161
162 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
163 static struct omap_hwmod *mpu_oh;
164
165
166 /* Private functions */
167
168 /**
169 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
170 * @oh: struct omap_hwmod *
171 *
172 * Load the current value of the hwmod OCP_SYSCONFIG register into the
173 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
174 * OCP_SYSCONFIG register or 0 upon success.
175 */
176 static int _update_sysc_cache(struct omap_hwmod *oh)
177 {
178 if (!oh->class->sysc) {
179 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
180 return -EINVAL;
181 }
182
183 /* XXX ensure module interface clock is up */
184
185 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
186
187 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
188 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
189
190 return 0;
191 }
192
193 /**
194 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
195 * @v: OCP_SYSCONFIG value to write
196 * @oh: struct omap_hwmod *
197 *
198 * Write @v into the module class' OCP_SYSCONFIG register, if it has
199 * one. No return value.
200 */
201 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
202 {
203 if (!oh->class->sysc) {
204 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
205 return;
206 }
207
208 /* XXX ensure module interface clock is up */
209
210 /* Module might have lost context, always update cache and register */
211 oh->_sysc_cache = v;
212 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
213 }
214
215 /**
216 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
217 * @oh: struct omap_hwmod *
218 * @standbymode: MIDLEMODE field bits
219 * @v: pointer to register contents to modify
220 *
221 * Update the master standby mode bits in @v to be @standbymode for
222 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
223 * upon error or 0 upon success.
224 */
225 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
226 u32 *v)
227 {
228 u32 mstandby_mask;
229 u8 mstandby_shift;
230
231 if (!oh->class->sysc ||
232 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
233 return -EINVAL;
234
235 if (!oh->class->sysc->sysc_fields) {
236 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
237 return -EINVAL;
238 }
239
240 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
241 mstandby_mask = (0x3 << mstandby_shift);
242
243 *v &= ~mstandby_mask;
244 *v |= __ffs(standbymode) << mstandby_shift;
245
246 return 0;
247 }
248
249 /**
250 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
251 * @oh: struct omap_hwmod *
252 * @idlemode: SIDLEMODE field bits
253 * @v: pointer to register contents to modify
254 *
255 * Update the slave idle mode bits in @v to be @idlemode for the @oh
256 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
257 * or 0 upon success.
258 */
259 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
260 {
261 u32 sidle_mask;
262 u8 sidle_shift;
263
264 if (!oh->class->sysc ||
265 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
266 return -EINVAL;
267
268 if (!oh->class->sysc->sysc_fields) {
269 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
270 return -EINVAL;
271 }
272
273 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
274 sidle_mask = (0x3 << sidle_shift);
275
276 *v &= ~sidle_mask;
277 *v |= __ffs(idlemode) << sidle_shift;
278
279 return 0;
280 }
281
282 /**
283 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
284 * @oh: struct omap_hwmod *
285 * @clockact: CLOCKACTIVITY field bits
286 * @v: pointer to register contents to modify
287 *
288 * Update the clockactivity mode bits in @v to be @clockact for the
289 * @oh hwmod. Used for additional powersaving on some modules. Does
290 * not write to the hardware. Returns -EINVAL upon error or 0 upon
291 * success.
292 */
293 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
294 {
295 u32 clkact_mask;
296 u8 clkact_shift;
297
298 if (!oh->class->sysc ||
299 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
300 return -EINVAL;
301
302 if (!oh->class->sysc->sysc_fields) {
303 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
304 return -EINVAL;
305 }
306
307 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
308 clkact_mask = (0x3 << clkact_shift);
309
310 *v &= ~clkact_mask;
311 *v |= clockact << clkact_shift;
312
313 return 0;
314 }
315
316 /**
317 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
318 * @oh: struct omap_hwmod *
319 * @v: pointer to register contents to modify
320 *
321 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
322 * error or 0 upon success.
323 */
324 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
325 {
326 u32 softrst_mask;
327
328 if (!oh->class->sysc ||
329 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
330 return -EINVAL;
331
332 if (!oh->class->sysc->sysc_fields) {
333 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
334 return -EINVAL;
335 }
336
337 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
338
339 *v |= softrst_mask;
340
341 return 0;
342 }
343
344 /**
345 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
346 * @oh: struct omap_hwmod *
347 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
348 * @v: pointer to register contents to modify
349 *
350 * Update the module autoidle bit in @v to be @autoidle for the @oh
351 * hwmod. The autoidle bit controls whether the module can gate
352 * internal clocks automatically when it isn't doing anything; the
353 * exact function of this bit varies on a per-module basis. This
354 * function does not write to the hardware. Returns -EINVAL upon
355 * error or 0 upon success.
356 */
357 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
358 u32 *v)
359 {
360 u32 autoidle_mask;
361 u8 autoidle_shift;
362
363 if (!oh->class->sysc ||
364 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
365 return -EINVAL;
366
367 if (!oh->class->sysc->sysc_fields) {
368 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
369 return -EINVAL;
370 }
371
372 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
373 autoidle_mask = (0x1 << autoidle_shift);
374
375 *v &= ~autoidle_mask;
376 *v |= autoidle << autoidle_shift;
377
378 return 0;
379 }
380
381 /**
382 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
383 * @oh: struct omap_hwmod *
384 *
385 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
386 * upon error or 0 upon success.
387 */
388 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
389 {
390 if (!oh->class->sysc ||
391 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
392 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
393 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
394 return -EINVAL;
395
396 if (!oh->class->sysc->sysc_fields) {
397 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
398 return -EINVAL;
399 }
400
401 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
402 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
403
404 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
405 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
406 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
407 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
408
409 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
410
411 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
412
413 return 0;
414 }
415
416 /**
417 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
418 * @oh: struct omap_hwmod *
419 *
420 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
421 * upon error or 0 upon success.
422 */
423 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
424 {
425 if (!oh->class->sysc ||
426 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
427 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
428 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
429 return -EINVAL;
430
431 if (!oh->class->sysc->sysc_fields) {
432 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
433 return -EINVAL;
434 }
435
436 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
437 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
438
439 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
440 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
441 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
442 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
443
444 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
445
446 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
447
448 return 0;
449 }
450
451 /**
452 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
453 * @oh: struct omap_hwmod *
454 *
455 * Prevent the hardware module @oh from entering idle while the
456 * hardare module initiator @init_oh is active. Useful when a module
457 * will be accessed by a particular initiator (e.g., if a module will
458 * be accessed by the IVA, there should be a sleepdep between the IVA
459 * initiator and the module). Only applies to modules in smart-idle
460 * mode. If the clockdomain is marked as not needing autodeps, return
461 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
462 * passes along clkdm_add_sleepdep() value upon success.
463 */
464 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
465 {
466 if (!oh->_clk)
467 return -EINVAL;
468
469 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
470 return 0;
471
472 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
473 }
474
475 /**
476 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
477 * @oh: struct omap_hwmod *
478 *
479 * Allow the hardware module @oh to enter idle while the hardare
480 * module initiator @init_oh is active. Useful when a module will not
481 * be accessed by a particular initiator (e.g., if a module will not
482 * be accessed by the IVA, there should be no sleepdep between the IVA
483 * initiator and the module). Only applies to modules in smart-idle
484 * mode. If the clockdomain is marked as not needing autodeps, return
485 * 0 without doing anything. Returns -EINVAL upon error or passes
486 * along clkdm_del_sleepdep() value upon success.
487 */
488 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
489 {
490 if (!oh->_clk)
491 return -EINVAL;
492
493 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
494 return 0;
495
496 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
497 }
498
499 /**
500 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
501 * @oh: struct omap_hwmod *
502 *
503 * Called from _init_clocks(). Populates the @oh _clk (main
504 * functional clock pointer) if a main_clk is present. Returns 0 on
505 * success or -EINVAL on error.
506 */
507 static int _init_main_clk(struct omap_hwmod *oh)
508 {
509 int ret = 0;
510
511 if (!oh->main_clk)
512 return 0;
513
514 oh->_clk = omap_clk_get_by_name(oh->main_clk);
515 if (!oh->_clk) {
516 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
517 oh->name, oh->main_clk);
518 return -EINVAL;
519 }
520
521 if (!oh->_clk->clkdm)
522 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
523 oh->main_clk, oh->_clk->name);
524
525 return ret;
526 }
527
528 /**
529 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
530 * @oh: struct omap_hwmod *
531 *
532 * Called from _init_clocks(). Populates the @oh OCP slave interface
533 * clock pointers. Returns 0 on success or -EINVAL on error.
534 */
535 static int _init_interface_clks(struct omap_hwmod *oh)
536 {
537 struct clk *c;
538 int i;
539 int ret = 0;
540
541 if (oh->slaves_cnt == 0)
542 return 0;
543
544 for (i = 0; i < oh->slaves_cnt; i++) {
545 struct omap_hwmod_ocp_if *os = oh->slaves[i];
546
547 if (!os->clk)
548 continue;
549
550 c = omap_clk_get_by_name(os->clk);
551 if (!c) {
552 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
553 oh->name, os->clk);
554 ret = -EINVAL;
555 }
556 os->_clk = c;
557 }
558
559 return ret;
560 }
561
562 /**
563 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
564 * @oh: struct omap_hwmod *
565 *
566 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
567 * clock pointers. Returns 0 on success or -EINVAL on error.
568 */
569 static int _init_opt_clks(struct omap_hwmod *oh)
570 {
571 struct omap_hwmod_opt_clk *oc;
572 struct clk *c;
573 int i;
574 int ret = 0;
575
576 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
577 c = omap_clk_get_by_name(oc->clk);
578 if (!c) {
579 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
580 oh->name, oc->clk);
581 ret = -EINVAL;
582 }
583 oc->_clk = c;
584 }
585
586 return ret;
587 }
588
589 /**
590 * _enable_clocks - enable hwmod main clock and interface clocks
591 * @oh: struct omap_hwmod *
592 *
593 * Enables all clocks necessary for register reads and writes to succeed
594 * on the hwmod @oh. Returns 0.
595 */
596 static int _enable_clocks(struct omap_hwmod *oh)
597 {
598 int i;
599
600 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
601
602 if (oh->_clk)
603 clk_enable(oh->_clk);
604
605 if (oh->slaves_cnt > 0) {
606 for (i = 0; i < oh->slaves_cnt; i++) {
607 struct omap_hwmod_ocp_if *os = oh->slaves[i];
608 struct clk *c = os->_clk;
609
610 if (c && (os->flags & OCPIF_SWSUP_IDLE))
611 clk_enable(c);
612 }
613 }
614
615 /* The opt clocks are controlled by the device driver. */
616
617 return 0;
618 }
619
620 /**
621 * _disable_clocks - disable hwmod main clock and interface clocks
622 * @oh: struct omap_hwmod *
623 *
624 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
625 */
626 static int _disable_clocks(struct omap_hwmod *oh)
627 {
628 int i;
629
630 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
631
632 if (oh->_clk)
633 clk_disable(oh->_clk);
634
635 if (oh->slaves_cnt > 0) {
636 for (i = 0; i < oh->slaves_cnt; i++) {
637 struct omap_hwmod_ocp_if *os = oh->slaves[i];
638 struct clk *c = os->_clk;
639
640 if (c && (os->flags & OCPIF_SWSUP_IDLE))
641 clk_disable(c);
642 }
643 }
644
645 /* The opt clocks are controlled by the device driver. */
646
647 return 0;
648 }
649
650 static void _enable_optional_clocks(struct omap_hwmod *oh)
651 {
652 struct omap_hwmod_opt_clk *oc;
653 int i;
654
655 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
656
657 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
658 if (oc->_clk) {
659 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
660 oc->_clk->name);
661 clk_enable(oc->_clk);
662 }
663 }
664
665 static void _disable_optional_clocks(struct omap_hwmod *oh)
666 {
667 struct omap_hwmod_opt_clk *oc;
668 int i;
669
670 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
671
672 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
673 if (oc->_clk) {
674 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
675 oc->_clk->name);
676 clk_disable(oc->_clk);
677 }
678 }
679
680 /**
681 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
682 * @oh: struct omap_hwmod *
683 *
684 * Returns the array index of the OCP slave port that the MPU
685 * addresses the device on, or -EINVAL upon error or not found.
686 */
687 static int __init _find_mpu_port_index(struct omap_hwmod *oh)
688 {
689 int i;
690 int found = 0;
691
692 if (!oh || oh->slaves_cnt == 0)
693 return -EINVAL;
694
695 for (i = 0; i < oh->slaves_cnt; i++) {
696 struct omap_hwmod_ocp_if *os = oh->slaves[i];
697
698 if (os->user & OCP_USER_MPU) {
699 found = 1;
700 break;
701 }
702 }
703
704 if (found)
705 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
706 oh->name, i);
707 else
708 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
709 oh->name);
710
711 return (found) ? i : -EINVAL;
712 }
713
714 /**
715 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
716 * @oh: struct omap_hwmod *
717 *
718 * Return the virtual address of the base of the register target of
719 * device @oh, or NULL on error.
720 */
721 static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
722 {
723 struct omap_hwmod_ocp_if *os;
724 struct omap_hwmod_addr_space *mem;
725 int i;
726 int found = 0;
727 void __iomem *va_start;
728
729 if (!oh || oh->slaves_cnt == 0)
730 return NULL;
731
732 os = oh->slaves[index];
733
734 for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
735 if (mem->flags & ADDR_TYPE_RT) {
736 found = 1;
737 break;
738 }
739 }
740
741 if (found) {
742 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
743 if (!va_start) {
744 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
745 return NULL;
746 }
747 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
748 oh->name, va_start);
749 } else {
750 pr_debug("omap_hwmod: %s: no MPU register target found\n",
751 oh->name);
752 }
753
754 return (found) ? va_start : NULL;
755 }
756
757 /**
758 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
759 * @oh: struct omap_hwmod *
760 *
761 * If module is marked as SWSUP_SIDLE, force the module out of slave
762 * idle; otherwise, configure it for smart-idle. If module is marked
763 * as SWSUP_MSUSPEND, force the module out of master standby;
764 * otherwise, configure it for smart-standby. No return value.
765 */
766 static void _enable_sysc(struct omap_hwmod *oh)
767 {
768 u8 idlemode, sf;
769 u32 v;
770
771 if (!oh->class->sysc)
772 return;
773
774 v = oh->_sysc_cache;
775 sf = oh->class->sysc->sysc_flags;
776
777 if (sf & SYSC_HAS_SIDLEMODE) {
778 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
779 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
780 _set_slave_idlemode(oh, idlemode, &v);
781 }
782
783 if (sf & SYSC_HAS_MIDLEMODE) {
784 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
785 idlemode = HWMOD_IDLEMODE_NO;
786 } else {
787 if (sf & SYSC_HAS_ENAWAKEUP)
788 _enable_wakeup(oh, &v);
789 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
790 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
791 else
792 idlemode = HWMOD_IDLEMODE_SMART;
793 }
794 _set_master_standbymode(oh, idlemode, &v);
795 }
796
797 /*
798 * XXX The clock framework should handle this, by
799 * calling into this code. But this must wait until the
800 * clock structures are tagged with omap_hwmod entries
801 */
802 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
803 (sf & SYSC_HAS_CLOCKACTIVITY))
804 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
805
806 /* If slave is in SMARTIDLE, also enable wakeup */
807 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
808 _enable_wakeup(oh, &v);
809
810 _write_sysconfig(v, oh);
811
812 /*
813 * Set the autoidle bit only after setting the smartidle bit
814 * Setting this will not have any impact on the other modules.
815 */
816 if (sf & SYSC_HAS_AUTOIDLE) {
817 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
818 0 : 1;
819 _set_module_autoidle(oh, idlemode, &v);
820 _write_sysconfig(v, oh);
821 }
822 }
823
824 /**
825 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
826 * @oh: struct omap_hwmod *
827 *
828 * If module is marked as SWSUP_SIDLE, force the module into slave
829 * idle; otherwise, configure it for smart-idle. If module is marked
830 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
831 * configure it for smart-standby. No return value.
832 */
833 static void _idle_sysc(struct omap_hwmod *oh)
834 {
835 u8 idlemode, sf;
836 u32 v;
837
838 if (!oh->class->sysc)
839 return;
840
841 v = oh->_sysc_cache;
842 sf = oh->class->sysc->sysc_flags;
843
844 if (sf & SYSC_HAS_SIDLEMODE) {
845 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
846 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
847 _set_slave_idlemode(oh, idlemode, &v);
848 }
849
850 if (sf & SYSC_HAS_MIDLEMODE) {
851 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
852 idlemode = HWMOD_IDLEMODE_FORCE;
853 } else {
854 if (sf & SYSC_HAS_ENAWAKEUP)
855 _enable_wakeup(oh, &v);
856 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
857 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
858 else
859 idlemode = HWMOD_IDLEMODE_SMART;
860 }
861 _set_master_standbymode(oh, idlemode, &v);
862 }
863
864 /* If slave is in SMARTIDLE, also enable wakeup */
865 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
866 _enable_wakeup(oh, &v);
867
868 _write_sysconfig(v, oh);
869 }
870
871 /**
872 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
873 * @oh: struct omap_hwmod *
874 *
875 * Force the module into slave idle and master suspend. No return
876 * value.
877 */
878 static void _shutdown_sysc(struct omap_hwmod *oh)
879 {
880 u32 v;
881 u8 sf;
882
883 if (!oh->class->sysc)
884 return;
885
886 v = oh->_sysc_cache;
887 sf = oh->class->sysc->sysc_flags;
888
889 if (sf & SYSC_HAS_SIDLEMODE)
890 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
891
892 if (sf & SYSC_HAS_MIDLEMODE)
893 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
894
895 if (sf & SYSC_HAS_AUTOIDLE)
896 _set_module_autoidle(oh, 1, &v);
897
898 _write_sysconfig(v, oh);
899 }
900
901 /**
902 * _lookup - find an omap_hwmod by name
903 * @name: find an omap_hwmod by name
904 *
905 * Return a pointer to an omap_hwmod by name, or NULL if not found.
906 */
907 static struct omap_hwmod *_lookup(const char *name)
908 {
909 struct omap_hwmod *oh, *temp_oh;
910
911 oh = NULL;
912
913 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
914 if (!strcmp(name, temp_oh->name)) {
915 oh = temp_oh;
916 break;
917 }
918 }
919
920 return oh;
921 }
922
923 /**
924 * _init_clocks - clk_get() all clocks associated with this hwmod
925 * @oh: struct omap_hwmod *
926 * @data: not used; pass NULL
927 *
928 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
929 * Resolves all clock names embedded in the hwmod. Returns 0 on
930 * success, or a negative error code on failure.
931 */
932 static int _init_clocks(struct omap_hwmod *oh, void *data)
933 {
934 int ret = 0;
935
936 if (oh->_state != _HWMOD_STATE_REGISTERED)
937 return 0;
938
939 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
940
941 ret |= _init_main_clk(oh);
942 ret |= _init_interface_clks(oh);
943 ret |= _init_opt_clks(oh);
944
945 if (!ret)
946 oh->_state = _HWMOD_STATE_CLKS_INITED;
947
948 return ret;
949 }
950
951 /**
952 * _wait_target_ready - wait for a module to leave slave idle
953 * @oh: struct omap_hwmod *
954 *
955 * Wait for a module @oh to leave slave idle. Returns 0 if the module
956 * does not have an IDLEST bit or if the module successfully leaves
957 * slave idle; otherwise, pass along the return value of the
958 * appropriate *_cm_wait_module_ready() function.
959 */
960 static int _wait_target_ready(struct omap_hwmod *oh)
961 {
962 struct omap_hwmod_ocp_if *os;
963 int ret;
964
965 if (!oh)
966 return -EINVAL;
967
968 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
969 return 0;
970
971 os = oh->slaves[oh->_mpu_port_index];
972
973 if (oh->flags & HWMOD_NO_IDLEST)
974 return 0;
975
976 /* XXX check module SIDLEMODE */
977
978 /* XXX check clock enable states */
979
980 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
981 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
982 oh->prcm.omap2.idlest_reg_id,
983 oh->prcm.omap2.idlest_idle_bit);
984 } else if (cpu_is_omap44xx()) {
985 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
986 } else {
987 BUG();
988 };
989
990 return ret;
991 }
992
993 /**
994 * _lookup_hardreset - fill register bit info for this hwmod/reset line
995 * @oh: struct omap_hwmod *
996 * @name: name of the reset line in the context of this hwmod
997 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
998 *
999 * Return the bit position of the reset line that match the
1000 * input name. Return -ENOENT if not found.
1001 */
1002 static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1003 struct omap_hwmod_rst_info *ohri)
1004 {
1005 int i;
1006
1007 for (i = 0; i < oh->rst_lines_cnt; i++) {
1008 const char *rst_line = oh->rst_lines[i].name;
1009 if (!strcmp(rst_line, name)) {
1010 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1011 ohri->st_shift = oh->rst_lines[i].st_shift;
1012 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1013 oh->name, __func__, rst_line, ohri->rst_shift,
1014 ohri->st_shift);
1015
1016 return 0;
1017 }
1018 }
1019
1020 return -ENOENT;
1021 }
1022
1023 /**
1024 * _assert_hardreset - assert the HW reset line of submodules
1025 * contained in the hwmod module.
1026 * @oh: struct omap_hwmod *
1027 * @name: name of the reset line to lookup and assert
1028 *
1029 * Some IP like dsp, ipu or iva contain processor that require
1030 * an HW reset line to be assert / deassert in order to enable fully
1031 * the IP.
1032 */
1033 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1034 {
1035 struct omap_hwmod_rst_info ohri;
1036 u8 ret;
1037
1038 if (!oh)
1039 return -EINVAL;
1040
1041 ret = _lookup_hardreset(oh, name, &ohri);
1042 if (IS_ERR_VALUE(ret))
1043 return ret;
1044
1045 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1046 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
1047 ohri.rst_shift);
1048 else if (cpu_is_omap44xx())
1049 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
1050 ohri.rst_shift);
1051 else
1052 return -EINVAL;
1053 }
1054
1055 /**
1056 * _deassert_hardreset - deassert the HW reset line of submodules contained
1057 * in the hwmod module.
1058 * @oh: struct omap_hwmod *
1059 * @name: name of the reset line to look up and deassert
1060 *
1061 * Some IP like dsp, ipu or iva contain processor that require
1062 * an HW reset line to be assert / deassert in order to enable fully
1063 * the IP.
1064 */
1065 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1066 {
1067 struct omap_hwmod_rst_info ohri;
1068 int ret;
1069
1070 if (!oh)
1071 return -EINVAL;
1072
1073 ret = _lookup_hardreset(oh, name, &ohri);
1074 if (IS_ERR_VALUE(ret))
1075 return ret;
1076
1077 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1078 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1079 ohri.rst_shift,
1080 ohri.st_shift);
1081 } else if (cpu_is_omap44xx()) {
1082 if (ohri.st_shift)
1083 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1084 oh->name, name);
1085 ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
1086 ohri.rst_shift);
1087 } else {
1088 return -EINVAL;
1089 }
1090
1091 if (ret == -EBUSY)
1092 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1093
1094 return ret;
1095 }
1096
1097 /**
1098 * _read_hardreset - read the HW reset line state of submodules
1099 * contained in the hwmod module
1100 * @oh: struct omap_hwmod *
1101 * @name: name of the reset line to look up and read
1102 *
1103 * Return the state of the reset line.
1104 */
1105 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1106 {
1107 struct omap_hwmod_rst_info ohri;
1108 u8 ret;
1109
1110 if (!oh)
1111 return -EINVAL;
1112
1113 ret = _lookup_hardreset(oh, name, &ohri);
1114 if (IS_ERR_VALUE(ret))
1115 return ret;
1116
1117 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1118 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1119 ohri.st_shift);
1120 } else if (cpu_is_omap44xx()) {
1121 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
1122 ohri.rst_shift);
1123 } else {
1124 return -EINVAL;
1125 }
1126 }
1127
1128 /**
1129 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1130 * @oh: struct omap_hwmod *
1131 *
1132 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1133 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1134 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1135 * the module did not reset in time, or 0 upon success.
1136 *
1137 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1138 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1139 * use the SYSCONFIG softreset bit to provide the status.
1140 *
1141 * Note that some IP like McBSP do have reset control but don't have
1142 * reset status.
1143 */
1144 static int _ocp_softreset(struct omap_hwmod *oh)
1145 {
1146 u32 v;
1147 int c = 0;
1148 int ret = 0;
1149
1150 if (!oh->class->sysc ||
1151 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1152 return -EINVAL;
1153
1154 /* clocks must be on for this operation */
1155 if (oh->_state != _HWMOD_STATE_ENABLED) {
1156 pr_warning("omap_hwmod: %s: reset can only be entered from "
1157 "enabled state\n", oh->name);
1158 return -EINVAL;
1159 }
1160
1161 /* For some modules, all optionnal clocks need to be enabled as well */
1162 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1163 _enable_optional_clocks(oh);
1164
1165 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1166
1167 v = oh->_sysc_cache;
1168 ret = _set_softreset(oh, &v);
1169 if (ret)
1170 goto dis_opt_clks;
1171 _write_sysconfig(v, oh);
1172
1173 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1174 omap_test_timeout((omap_hwmod_read(oh,
1175 oh->class->sysc->syss_offs)
1176 & SYSS_RESETDONE_MASK),
1177 MAX_MODULE_SOFTRESET_WAIT, c);
1178 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
1179 omap_test_timeout(!(omap_hwmod_read(oh,
1180 oh->class->sysc->sysc_offs)
1181 & SYSC_TYPE2_SOFTRESET_MASK),
1182 MAX_MODULE_SOFTRESET_WAIT, c);
1183
1184 if (c == MAX_MODULE_SOFTRESET_WAIT)
1185 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1186 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1187 else
1188 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1189
1190 /*
1191 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1192 * _wait_target_ready() or _reset()
1193 */
1194
1195 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1196
1197 dis_opt_clks:
1198 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1199 _disable_optional_clocks(oh);
1200
1201 return ret;
1202 }
1203
1204 /**
1205 * _reset - reset an omap_hwmod
1206 * @oh: struct omap_hwmod *
1207 *
1208 * Resets an omap_hwmod @oh. The default software reset mechanism for
1209 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1210 * bit. However, some hwmods cannot be reset via this method: some
1211 * are not targets and therefore have no OCP header registers to
1212 * access; others (like the IVA) have idiosyncratic reset sequences.
1213 * So for these relatively rare cases, custom reset code can be
1214 * supplied in the struct omap_hwmod_class .reset function pointer.
1215 * Passes along the return value from either _reset() or the custom
1216 * reset function - these must return -EINVAL if the hwmod cannot be
1217 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1218 * the module did not reset in time, or 0 upon success.
1219 */
1220 static int _reset(struct omap_hwmod *oh)
1221 {
1222 int ret;
1223
1224 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1225
1226 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1227
1228 return ret;
1229 }
1230
1231 /**
1232 * _enable - enable an omap_hwmod
1233 * @oh: struct omap_hwmod *
1234 *
1235 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1236 * register target. Returns -EINVAL if the hwmod is in the wrong
1237 * state or passes along the return value of _wait_target_ready().
1238 */
1239 static int _enable(struct omap_hwmod *oh)
1240 {
1241 int r;
1242
1243 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1244 oh->_state != _HWMOD_STATE_IDLE &&
1245 oh->_state != _HWMOD_STATE_DISABLED) {
1246 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1247 "from initialized, idle, or disabled state\n", oh->name);
1248 return -EINVAL;
1249 }
1250
1251 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1252
1253 /*
1254 * If an IP contains only one HW reset line, then de-assert it in order
1255 * to allow to enable the clocks. Otherwise the PRCM will return
1256 * Intransition status, and the init will failed.
1257 */
1258 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1259 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1260 _deassert_hardreset(oh, oh->rst_lines[0].name);
1261
1262 /* Mux pins for device runtime if populated */
1263 if (oh->mux && (!oh->mux->enabled ||
1264 ((oh->_state == _HWMOD_STATE_IDLE) &&
1265 oh->mux->pads_dynamic)))
1266 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1267
1268 _add_initiator_dep(oh, mpu_oh);
1269 _enable_clocks(oh);
1270
1271 r = _wait_target_ready(oh);
1272 if (!r) {
1273 oh->_state = _HWMOD_STATE_ENABLED;
1274
1275 /* Access the sysconfig only if the target is ready */
1276 if (oh->class->sysc) {
1277 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1278 _update_sysc_cache(oh);
1279 _enable_sysc(oh);
1280 }
1281 } else {
1282 _disable_clocks(oh);
1283 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1284 oh->name, r);
1285 }
1286
1287 return r;
1288 }
1289
1290 /**
1291 * _idle - idle an omap_hwmod
1292 * @oh: struct omap_hwmod *
1293 *
1294 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1295 * no further work. Returns -EINVAL if the hwmod is in the wrong
1296 * state or returns 0.
1297 */
1298 static int _idle(struct omap_hwmod *oh)
1299 {
1300 if (oh->_state != _HWMOD_STATE_ENABLED) {
1301 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1302 "enabled state\n", oh->name);
1303 return -EINVAL;
1304 }
1305
1306 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1307
1308 if (oh->class->sysc)
1309 _idle_sysc(oh);
1310 _del_initiator_dep(oh, mpu_oh);
1311 _disable_clocks(oh);
1312
1313 /* Mux pins for device idle if populated */
1314 if (oh->mux && oh->mux->pads_dynamic)
1315 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1316
1317 oh->_state = _HWMOD_STATE_IDLE;
1318
1319 return 0;
1320 }
1321
1322 /**
1323 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1324 * @oh: struct omap_hwmod *
1325 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1326 *
1327 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1328 * local copy. Intended to be used by drivers that require
1329 * direct manipulation of the AUTOIDLE bits.
1330 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1331 * along the return value from _set_module_autoidle().
1332 *
1333 * Any users of this function should be scrutinized carefully.
1334 */
1335 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1336 {
1337 u32 v;
1338 int retval = 0;
1339 unsigned long flags;
1340
1341 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1342 return -EINVAL;
1343
1344 spin_lock_irqsave(&oh->_lock, flags);
1345
1346 v = oh->_sysc_cache;
1347
1348 retval = _set_module_autoidle(oh, autoidle, &v);
1349
1350 if (!retval)
1351 _write_sysconfig(v, oh);
1352
1353 spin_unlock_irqrestore(&oh->_lock, flags);
1354
1355 return retval;
1356 }
1357
1358 /**
1359 * _shutdown - shutdown an omap_hwmod
1360 * @oh: struct omap_hwmod *
1361 *
1362 * Shut down an omap_hwmod @oh. This should be called when the driver
1363 * used for the hwmod is removed or unloaded or if the driver is not
1364 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1365 * state or returns 0.
1366 */
1367 static int _shutdown(struct omap_hwmod *oh)
1368 {
1369 int ret;
1370 u8 prev_state;
1371
1372 if (oh->_state != _HWMOD_STATE_IDLE &&
1373 oh->_state != _HWMOD_STATE_ENABLED) {
1374 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1375 "from idle, or enabled state\n", oh->name);
1376 return -EINVAL;
1377 }
1378
1379 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1380
1381 if (oh->class->pre_shutdown) {
1382 prev_state = oh->_state;
1383 if (oh->_state == _HWMOD_STATE_IDLE)
1384 _enable(oh);
1385 ret = oh->class->pre_shutdown(oh);
1386 if (ret) {
1387 if (prev_state == _HWMOD_STATE_IDLE)
1388 _idle(oh);
1389 return ret;
1390 }
1391 }
1392
1393 if (oh->class->sysc) {
1394 if (oh->_state == _HWMOD_STATE_IDLE)
1395 _enable(oh);
1396 _shutdown_sysc(oh);
1397 }
1398
1399 /*
1400 * If an IP contains only one HW reset line, then assert it
1401 * before disabling the clocks and shutting down the IP.
1402 */
1403 if (oh->rst_lines_cnt == 1)
1404 _assert_hardreset(oh, oh->rst_lines[0].name);
1405
1406 /* clocks and deps are already disabled in idle */
1407 if (oh->_state == _HWMOD_STATE_ENABLED) {
1408 _del_initiator_dep(oh, mpu_oh);
1409 /* XXX what about the other system initiators here? dma, dsp */
1410 _disable_clocks(oh);
1411 }
1412 /* XXX Should this code also force-disable the optional clocks? */
1413
1414 /* Mux pins to safe mode or use populated off mode values */
1415 if (oh->mux)
1416 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
1417
1418 oh->_state = _HWMOD_STATE_DISABLED;
1419
1420 return 0;
1421 }
1422
1423 /**
1424 * _setup - do initial configuration of omap_hwmod
1425 * @oh: struct omap_hwmod *
1426 *
1427 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
1428 * OCP_SYSCONFIG register. Returns 0.
1429 */
1430 static int _setup(struct omap_hwmod *oh, void *data)
1431 {
1432 int i, r;
1433 u8 postsetup_state;
1434
1435 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1436 return 0;
1437
1438 /* Set iclk autoidle mode */
1439 if (oh->slaves_cnt > 0) {
1440 for (i = 0; i < oh->slaves_cnt; i++) {
1441 struct omap_hwmod_ocp_if *os = oh->slaves[i];
1442 struct clk *c = os->_clk;
1443
1444 if (!c)
1445 continue;
1446
1447 if (os->flags & OCPIF_SWSUP_IDLE) {
1448 /* XXX omap_iclk_deny_idle(c); */
1449 } else {
1450 /* XXX omap_iclk_allow_idle(c); */
1451 clk_enable(c);
1452 }
1453 }
1454 }
1455
1456 oh->_state = _HWMOD_STATE_INITIALIZED;
1457
1458 /*
1459 * In the case of hwmod with hardreset that should not be
1460 * de-assert at boot time, we have to keep the module
1461 * initialized, because we cannot enable it properly with the
1462 * reset asserted. Exit without warning because that behavior is
1463 * expected.
1464 */
1465 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1466 return 0;
1467
1468 r = _enable(oh);
1469 if (r) {
1470 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1471 oh->name, oh->_state);
1472 return 0;
1473 }
1474
1475 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
1476 _reset(oh);
1477
1478 /*
1479 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
1480 * The _enable() function should be split to
1481 * avoid the rewrite of the OCP_SYSCONFIG register.
1482 */
1483 if (oh->class->sysc) {
1484 _update_sysc_cache(oh);
1485 _enable_sysc(oh);
1486 }
1487 }
1488
1489 postsetup_state = oh->_postsetup_state;
1490 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1491 postsetup_state = _HWMOD_STATE_ENABLED;
1492
1493 /*
1494 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1495 * it should be set by the core code as a runtime flag during startup
1496 */
1497 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1498 (postsetup_state == _HWMOD_STATE_IDLE))
1499 postsetup_state = _HWMOD_STATE_ENABLED;
1500
1501 if (postsetup_state == _HWMOD_STATE_IDLE)
1502 _idle(oh);
1503 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1504 _shutdown(oh);
1505 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1506 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1507 oh->name, postsetup_state);
1508
1509 return 0;
1510 }
1511
1512 /**
1513 * _register - register a struct omap_hwmod
1514 * @oh: struct omap_hwmod *
1515 *
1516 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1517 * already has been registered by the same name; -EINVAL if the
1518 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1519 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1520 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1521 * success.
1522 *
1523 * XXX The data should be copied into bootmem, so the original data
1524 * should be marked __initdata and freed after init. This would allow
1525 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1526 * that the copy process would be relatively complex due to the large number
1527 * of substructures.
1528 */
1529 static int __init _register(struct omap_hwmod *oh)
1530 {
1531 int ms_id;
1532
1533 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1534 (oh->_state != _HWMOD_STATE_UNKNOWN))
1535 return -EINVAL;
1536
1537 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1538
1539 if (_lookup(oh->name))
1540 return -EEXIST;
1541
1542 ms_id = _find_mpu_port_index(oh);
1543 if (!IS_ERR_VALUE(ms_id))
1544 oh->_mpu_port_index = ms_id;
1545 else
1546 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1547
1548 list_add_tail(&oh->node, &omap_hwmod_list);
1549
1550 spin_lock_init(&oh->_lock);
1551
1552 oh->_state = _HWMOD_STATE_REGISTERED;
1553
1554 /*
1555 * XXX Rather than doing a strcmp(), this should test a flag
1556 * set in the hwmod data, inserted by the autogenerator code.
1557 */
1558 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1559 mpu_oh = oh;
1560
1561 return 0;
1562 }
1563
1564
1565 /* Public functions */
1566
1567 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1568 {
1569 if (oh->flags & HWMOD_16BIT_REG)
1570 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1571 else
1572 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1573 }
1574
1575 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1576 {
1577 if (oh->flags & HWMOD_16BIT_REG)
1578 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1579 else
1580 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1581 }
1582
1583 /**
1584 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1585 * @oh: struct omap_hwmod *
1586 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1587 *
1588 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1589 * local copy. Intended to be used by drivers that have some erratum
1590 * that requires direct manipulation of the SIDLEMODE bits. Returns
1591 * -EINVAL if @oh is null, or passes along the return value from
1592 * _set_slave_idlemode().
1593 *
1594 * XXX Does this function have any current users? If not, we should
1595 * remove it; it is better to let the rest of the hwmod code handle this.
1596 * Any users of this function should be scrutinized carefully.
1597 */
1598 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1599 {
1600 u32 v;
1601 int retval = 0;
1602
1603 if (!oh)
1604 return -EINVAL;
1605
1606 v = oh->_sysc_cache;
1607
1608 retval = _set_slave_idlemode(oh, idlemode, &v);
1609 if (!retval)
1610 _write_sysconfig(v, oh);
1611
1612 return retval;
1613 }
1614
1615 /**
1616 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1617 * @name: name of the omap_hwmod to look up
1618 *
1619 * Given a @name of an omap_hwmod, return a pointer to the registered
1620 * struct omap_hwmod *, or NULL upon error.
1621 */
1622 struct omap_hwmod *omap_hwmod_lookup(const char *name)
1623 {
1624 struct omap_hwmod *oh;
1625
1626 if (!name)
1627 return NULL;
1628
1629 oh = _lookup(name);
1630
1631 return oh;
1632 }
1633
1634 /**
1635 * omap_hwmod_for_each - call function for each registered omap_hwmod
1636 * @fn: pointer to a callback function
1637 * @data: void * data to pass to callback function
1638 *
1639 * Call @fn for each registered omap_hwmod, passing @data to each
1640 * function. @fn must return 0 for success or any other value for
1641 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1642 * will stop and the non-zero return value will be passed to the
1643 * caller of omap_hwmod_for_each(). @fn is called with
1644 * omap_hwmod_for_each() held.
1645 */
1646 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1647 void *data)
1648 {
1649 struct omap_hwmod *temp_oh;
1650 int ret = 0;
1651
1652 if (!fn)
1653 return -EINVAL;
1654
1655 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1656 ret = (*fn)(temp_oh, data);
1657 if (ret)
1658 break;
1659 }
1660
1661 return ret;
1662 }
1663
1664 /**
1665 * omap_hwmod_register - register an array of hwmods
1666 * @ohs: pointer to an array of omap_hwmods to register
1667 *
1668 * Intended to be called early in boot before the clock framework is
1669 * initialized. If @ohs is not null, will register all omap_hwmods
1670 * listed in @ohs that are valid for this chip. Returns 0.
1671 */
1672 int __init omap_hwmod_register(struct omap_hwmod **ohs)
1673 {
1674 int r, i;
1675
1676 if (!ohs)
1677 return 0;
1678
1679 i = 0;
1680 do {
1681 if (!omap_chip_is(ohs[i]->omap_chip))
1682 continue;
1683
1684 r = _register(ohs[i]);
1685 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
1686 r);
1687 } while (ohs[++i]);
1688
1689 return 0;
1690 }
1691
1692 /*
1693 * _populate_mpu_rt_base - populate the virtual address for a hwmod
1694 *
1695 * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
1696 * Assumes the caller takes care of locking if needed.
1697 */
1698 static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
1699 {
1700 if (oh->_state != _HWMOD_STATE_REGISTERED)
1701 return 0;
1702
1703 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1704 return 0;
1705
1706 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
1707 if (!oh->_mpu_rt_va)
1708 pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
1709 __func__, oh->name);
1710
1711 return 0;
1712 }
1713
1714 /**
1715 * omap_hwmod_setup_one - set up a single hwmod
1716 * @oh_name: const char * name of the already-registered hwmod to set up
1717 *
1718 * Must be called after omap2_clk_init(). Resolves the struct clk
1719 * names to struct clk pointers for each registered omap_hwmod. Also
1720 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
1721 * success.
1722 */
1723 int __init omap_hwmod_setup_one(const char *oh_name)
1724 {
1725 struct omap_hwmod *oh;
1726 int r;
1727
1728 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
1729
1730 if (!mpu_oh) {
1731 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
1732 oh_name, MPU_INITIATOR_NAME);
1733 return -EINVAL;
1734 }
1735
1736 oh = _lookup(oh_name);
1737 if (!oh) {
1738 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
1739 return -EINVAL;
1740 }
1741
1742 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
1743 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
1744
1745 r = _populate_mpu_rt_base(oh, NULL);
1746 if (IS_ERR_VALUE(r)) {
1747 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
1748 return -EINVAL;
1749 }
1750
1751 r = _init_clocks(oh, NULL);
1752 if (IS_ERR_VALUE(r)) {
1753 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
1754 return -EINVAL;
1755 }
1756
1757 _setup(oh, NULL);
1758
1759 return 0;
1760 }
1761
1762 /**
1763 * omap_hwmod_setup - do some post-clock framework initialization
1764 *
1765 * Must be called after omap2_clk_init(). Resolves the struct clk names
1766 * to struct clk pointers for each registered omap_hwmod. Also calls
1767 * _setup() on each hwmod. Returns 0 upon success.
1768 */
1769 static int __init omap_hwmod_setup_all(void)
1770 {
1771 int r;
1772
1773 if (!mpu_oh) {
1774 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
1775 __func__, MPU_INITIATOR_NAME);
1776 return -EINVAL;
1777 }
1778
1779 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
1780
1781 r = omap_hwmod_for_each(_init_clocks, NULL);
1782 WARN(IS_ERR_VALUE(r),
1783 "omap_hwmod: %s: _init_clocks failed\n", __func__);
1784
1785 omap_hwmod_for_each(_setup, NULL);
1786
1787 return 0;
1788 }
1789 core_initcall(omap_hwmod_setup_all);
1790
1791 /**
1792 * omap_hwmod_enable - enable an omap_hwmod
1793 * @oh: struct omap_hwmod *
1794 *
1795 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
1796 * Returns -EINVAL on error or passes along the return value from _enable().
1797 */
1798 int omap_hwmod_enable(struct omap_hwmod *oh)
1799 {
1800 int r;
1801 unsigned long flags;
1802
1803 if (!oh)
1804 return -EINVAL;
1805
1806 spin_lock_irqsave(&oh->_lock, flags);
1807 r = _enable(oh);
1808 spin_unlock_irqrestore(&oh->_lock, flags);
1809
1810 return r;
1811 }
1812
1813 /**
1814 * omap_hwmod_idle - idle an omap_hwmod
1815 * @oh: struct omap_hwmod *
1816 *
1817 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
1818 * Returns -EINVAL on error or passes along the return value from _idle().
1819 */
1820 int omap_hwmod_idle(struct omap_hwmod *oh)
1821 {
1822 unsigned long flags;
1823
1824 if (!oh)
1825 return -EINVAL;
1826
1827 spin_lock_irqsave(&oh->_lock, flags);
1828 _idle(oh);
1829 spin_unlock_irqrestore(&oh->_lock, flags);
1830
1831 return 0;
1832 }
1833
1834 /**
1835 * omap_hwmod_shutdown - shutdown an omap_hwmod
1836 * @oh: struct omap_hwmod *
1837 *
1838 * Shutdown an omap_hwmod @oh. Intended to be called by
1839 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1840 * the return value from _shutdown().
1841 */
1842 int omap_hwmod_shutdown(struct omap_hwmod *oh)
1843 {
1844 unsigned long flags;
1845
1846 if (!oh)
1847 return -EINVAL;
1848
1849 spin_lock_irqsave(&oh->_lock, flags);
1850 _shutdown(oh);
1851 spin_unlock_irqrestore(&oh->_lock, flags);
1852
1853 return 0;
1854 }
1855
1856 /**
1857 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1858 * @oh: struct omap_hwmod *oh
1859 *
1860 * Intended to be called by the omap_device code.
1861 */
1862 int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1863 {
1864 unsigned long flags;
1865
1866 spin_lock_irqsave(&oh->_lock, flags);
1867 _enable_clocks(oh);
1868 spin_unlock_irqrestore(&oh->_lock, flags);
1869
1870 return 0;
1871 }
1872
1873 /**
1874 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1875 * @oh: struct omap_hwmod *oh
1876 *
1877 * Intended to be called by the omap_device code.
1878 */
1879 int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1880 {
1881 unsigned long flags;
1882
1883 spin_lock_irqsave(&oh->_lock, flags);
1884 _disable_clocks(oh);
1885 spin_unlock_irqrestore(&oh->_lock, flags);
1886
1887 return 0;
1888 }
1889
1890 /**
1891 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1892 * @oh: struct omap_hwmod *oh
1893 *
1894 * Intended to be called by drivers and core code when all posted
1895 * writes to a device must complete before continuing further
1896 * execution (for example, after clearing some device IRQSTATUS
1897 * register bits)
1898 *
1899 * XXX what about targets with multiple OCP threads?
1900 */
1901 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1902 {
1903 BUG_ON(!oh);
1904
1905 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
1906 WARN(1, "omap_device: %s: OCP barrier impossible due to "
1907 "device configuration\n", oh->name);
1908 return;
1909 }
1910
1911 /*
1912 * Forces posted writes to complete on the OCP thread handling
1913 * register writes
1914 */
1915 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
1916 }
1917
1918 /**
1919 * omap_hwmod_reset - reset the hwmod
1920 * @oh: struct omap_hwmod *
1921 *
1922 * Under some conditions, a driver may wish to reset the entire device.
1923 * Called from omap_device code. Returns -EINVAL on error or passes along
1924 * the return value from _reset().
1925 */
1926 int omap_hwmod_reset(struct omap_hwmod *oh)
1927 {
1928 int r;
1929 unsigned long flags;
1930
1931 if (!oh)
1932 return -EINVAL;
1933
1934 spin_lock_irqsave(&oh->_lock, flags);
1935 r = _reset(oh);
1936 spin_unlock_irqrestore(&oh->_lock, flags);
1937
1938 return r;
1939 }
1940
1941 /**
1942 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1943 * @oh: struct omap_hwmod *
1944 * @res: pointer to the first element of an array of struct resource to fill
1945 *
1946 * Count the number of struct resource array elements necessary to
1947 * contain omap_hwmod @oh resources. Intended to be called by code
1948 * that registers omap_devices. Intended to be used to determine the
1949 * size of a dynamically-allocated struct resource array, before
1950 * calling omap_hwmod_fill_resources(). Returns the number of struct
1951 * resource array elements needed.
1952 *
1953 * XXX This code is not optimized. It could attempt to merge adjacent
1954 * resource IDs.
1955 *
1956 */
1957 int omap_hwmod_count_resources(struct omap_hwmod *oh)
1958 {
1959 int ret, i;
1960
1961 ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
1962
1963 for (i = 0; i < oh->slaves_cnt; i++)
1964 ret += oh->slaves[i]->addr_cnt;
1965
1966 return ret;
1967 }
1968
1969 /**
1970 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1971 * @oh: struct omap_hwmod *
1972 * @res: pointer to the first element of an array of struct resource to fill
1973 *
1974 * Fill the struct resource array @res with resource data from the
1975 * omap_hwmod @oh. Intended to be called by code that registers
1976 * omap_devices. See also omap_hwmod_count_resources(). Returns the
1977 * number of array elements filled.
1978 */
1979 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1980 {
1981 int i, j;
1982 int r = 0;
1983
1984 /* For each IRQ, DMA, memory area, fill in array.*/
1985
1986 for (i = 0; i < oh->mpu_irqs_cnt; i++) {
1987 (res + r)->name = (oh->mpu_irqs + i)->name;
1988 (res + r)->start = (oh->mpu_irqs + i)->irq;
1989 (res + r)->end = (oh->mpu_irqs + i)->irq;
1990 (res + r)->flags = IORESOURCE_IRQ;
1991 r++;
1992 }
1993
1994 for (i = 0; i < oh->sdma_reqs_cnt; i++) {
1995 (res + r)->name = (oh->sdma_reqs + i)->name;
1996 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
1997 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
1998 (res + r)->flags = IORESOURCE_DMA;
1999 r++;
2000 }
2001
2002 for (i = 0; i < oh->slaves_cnt; i++) {
2003 struct omap_hwmod_ocp_if *os;
2004
2005 os = oh->slaves[i];
2006
2007 for (j = 0; j < os->addr_cnt; j++) {
2008 (res + r)->name = (os->addr + j)->name;
2009 (res + r)->start = (os->addr + j)->pa_start;
2010 (res + r)->end = (os->addr + j)->pa_end;
2011 (res + r)->flags = IORESOURCE_MEM;
2012 r++;
2013 }
2014 }
2015
2016 return r;
2017 }
2018
2019 /**
2020 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2021 * @oh: struct omap_hwmod *
2022 *
2023 * Return the powerdomain pointer associated with the OMAP module
2024 * @oh's main clock. If @oh does not have a main clk, return the
2025 * powerdomain associated with the interface clock associated with the
2026 * module's MPU port. (XXX Perhaps this should use the SDMA port
2027 * instead?) Returns NULL on error, or a struct powerdomain * on
2028 * success.
2029 */
2030 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2031 {
2032 struct clk *c;
2033
2034 if (!oh)
2035 return NULL;
2036
2037 if (oh->_clk) {
2038 c = oh->_clk;
2039 } else {
2040 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2041 return NULL;
2042 c = oh->slaves[oh->_mpu_port_index]->_clk;
2043 }
2044
2045 if (!c->clkdm)
2046 return NULL;
2047
2048 return c->clkdm->pwrdm.ptr;
2049
2050 }
2051
2052 /**
2053 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2054 * @oh: struct omap_hwmod *
2055 *
2056 * Returns the virtual address corresponding to the beginning of the
2057 * module's register target, in the address range that is intended to
2058 * be used by the MPU. Returns the virtual address upon success or NULL
2059 * upon error.
2060 */
2061 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2062 {
2063 if (!oh)
2064 return NULL;
2065
2066 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2067 return NULL;
2068
2069 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2070 return NULL;
2071
2072 return oh->_mpu_rt_va;
2073 }
2074
2075 /**
2076 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2077 * @oh: struct omap_hwmod *
2078 * @init_oh: struct omap_hwmod * (initiator)
2079 *
2080 * Add a sleep dependency between the initiator @init_oh and @oh.
2081 * Intended to be called by DSP/Bridge code via platform_data for the
2082 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2083 * code needs to add/del initiator dependencies dynamically
2084 * before/after accessing a device. Returns the return value from
2085 * _add_initiator_dep().
2086 *
2087 * XXX Keep a usecount in the clockdomain code
2088 */
2089 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2090 struct omap_hwmod *init_oh)
2091 {
2092 return _add_initiator_dep(oh, init_oh);
2093 }
2094
2095 /*
2096 * XXX what about functions for drivers to save/restore ocp_sysconfig
2097 * for context save/restore operations?
2098 */
2099
2100 /**
2101 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2102 * @oh: struct omap_hwmod *
2103 * @init_oh: struct omap_hwmod * (initiator)
2104 *
2105 * Remove a sleep dependency between the initiator @init_oh and @oh.
2106 * Intended to be called by DSP/Bridge code via platform_data for the
2107 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2108 * code needs to add/del initiator dependencies dynamically
2109 * before/after accessing a device. Returns the return value from
2110 * _del_initiator_dep().
2111 *
2112 * XXX Keep a usecount in the clockdomain code
2113 */
2114 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2115 struct omap_hwmod *init_oh)
2116 {
2117 return _del_initiator_dep(oh, init_oh);
2118 }
2119
2120 /**
2121 * omap_hwmod_enable_wakeup - allow device to wake up the system
2122 * @oh: struct omap_hwmod *
2123 *
2124 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2125 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
2126 * registers to cause the PRCM to receive wakeup events from the
2127 * module. Does not set any wakeup routing registers beyond this
2128 * point - if the module is to wake up any other module or subsystem,
2129 * that must be set separately. Called by omap_device code. Returns
2130 * -EINVAL on error or 0 upon success.
2131 */
2132 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2133 {
2134 unsigned long flags;
2135 u32 v;
2136
2137 if (!oh->class->sysc ||
2138 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2139 return -EINVAL;
2140
2141 spin_lock_irqsave(&oh->_lock, flags);
2142 v = oh->_sysc_cache;
2143 _enable_wakeup(oh, &v);
2144 _write_sysconfig(v, oh);
2145 spin_unlock_irqrestore(&oh->_lock, flags);
2146
2147 return 0;
2148 }
2149
2150 /**
2151 * omap_hwmod_disable_wakeup - prevent device from waking the system
2152 * @oh: struct omap_hwmod *
2153 *
2154 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2155 * from sending wakeups to the PRCM. Eventually this should clear
2156 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2157 * from the module. Does not set any wakeup routing registers beyond
2158 * this point - if the module is to wake up any other module or
2159 * subsystem, that must be set separately. Called by omap_device
2160 * code. Returns -EINVAL on error or 0 upon success.
2161 */
2162 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2163 {
2164 unsigned long flags;
2165 u32 v;
2166
2167 if (!oh->class->sysc ||
2168 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2169 return -EINVAL;
2170
2171 spin_lock_irqsave(&oh->_lock, flags);
2172 v = oh->_sysc_cache;
2173 _disable_wakeup(oh, &v);
2174 _write_sysconfig(v, oh);
2175 spin_unlock_irqrestore(&oh->_lock, flags);
2176
2177 return 0;
2178 }
2179
2180 /**
2181 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2182 * contained in the hwmod module.
2183 * @oh: struct omap_hwmod *
2184 * @name: name of the reset line to lookup and assert
2185 *
2186 * Some IP like dsp, ipu or iva contain processor that require
2187 * an HW reset line to be assert / deassert in order to enable fully
2188 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2189 * yet supported on this OMAP; otherwise, passes along the return value
2190 * from _assert_hardreset().
2191 */
2192 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2193 {
2194 int ret;
2195 unsigned long flags;
2196
2197 if (!oh)
2198 return -EINVAL;
2199
2200 spin_lock_irqsave(&oh->_lock, flags);
2201 ret = _assert_hardreset(oh, name);
2202 spin_unlock_irqrestore(&oh->_lock, flags);
2203
2204 return ret;
2205 }
2206
2207 /**
2208 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2209 * contained in the hwmod module.
2210 * @oh: struct omap_hwmod *
2211 * @name: name of the reset line to look up and deassert
2212 *
2213 * Some IP like dsp, ipu or iva contain processor that require
2214 * an HW reset line to be assert / deassert in order to enable fully
2215 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2216 * yet supported on this OMAP; otherwise, passes along the return value
2217 * from _deassert_hardreset().
2218 */
2219 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2220 {
2221 int ret;
2222 unsigned long flags;
2223
2224 if (!oh)
2225 return -EINVAL;
2226
2227 spin_lock_irqsave(&oh->_lock, flags);
2228 ret = _deassert_hardreset(oh, name);
2229 spin_unlock_irqrestore(&oh->_lock, flags);
2230
2231 return ret;
2232 }
2233
2234 /**
2235 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2236 * contained in the hwmod module
2237 * @oh: struct omap_hwmod *
2238 * @name: name of the reset line to look up and read
2239 *
2240 * Return the current state of the hwmod @oh's reset line named @name:
2241 * returns -EINVAL upon parameter error or if this operation
2242 * is unsupported on the current OMAP; otherwise, passes along the return
2243 * value from _read_hardreset().
2244 */
2245 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2246 {
2247 int ret;
2248 unsigned long flags;
2249
2250 if (!oh)
2251 return -EINVAL;
2252
2253 spin_lock_irqsave(&oh->_lock, flags);
2254 ret = _read_hardreset(oh, name);
2255 spin_unlock_irqrestore(&oh->_lock, flags);
2256
2257 return ret;
2258 }
2259
2260
2261 /**
2262 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2263 * @classname: struct omap_hwmod_class name to search for
2264 * @fn: callback function pointer to call for each hwmod in class @classname
2265 * @user: arbitrary context data to pass to the callback function
2266 *
2267 * For each omap_hwmod of class @classname, call @fn.
2268 * If the callback function returns something other than
2269 * zero, the iterator is terminated, and the callback function's return
2270 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2271 * if @classname or @fn are NULL, or passes back the error code from @fn.
2272 */
2273 int omap_hwmod_for_each_by_class(const char *classname,
2274 int (*fn)(struct omap_hwmod *oh,
2275 void *user),
2276 void *user)
2277 {
2278 struct omap_hwmod *temp_oh;
2279 int ret = 0;
2280
2281 if (!classname || !fn)
2282 return -EINVAL;
2283
2284 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2285 __func__, classname);
2286
2287 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2288 if (!strcmp(temp_oh->class->name, classname)) {
2289 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2290 __func__, temp_oh->name);
2291 ret = (*fn)(temp_oh, user);
2292 if (ret)
2293 break;
2294 }
2295 }
2296
2297 if (ret)
2298 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2299 __func__, ret);
2300
2301 return ret;
2302 }
2303
2304 /**
2305 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2306 * @oh: struct omap_hwmod *
2307 * @state: state that _setup() should leave the hwmod in
2308 *
2309 * Sets the hwmod state that @oh will enter at the end of _setup()
2310 * (called by omap_hwmod_setup_*()). Only valid to call between
2311 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
2312 * 0 upon success or -EINVAL if there is a problem with the arguments
2313 * or if the hwmod is in the wrong state.
2314 */
2315 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2316 {
2317 int ret;
2318 unsigned long flags;
2319
2320 if (!oh)
2321 return -EINVAL;
2322
2323 if (state != _HWMOD_STATE_DISABLED &&
2324 state != _HWMOD_STATE_ENABLED &&
2325 state != _HWMOD_STATE_IDLE)
2326 return -EINVAL;
2327
2328 spin_lock_irqsave(&oh->_lock, flags);
2329
2330 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2331 ret = -EINVAL;
2332 goto ohsps_unlock;
2333 }
2334
2335 oh->_postsetup_state = state;
2336 ret = 0;
2337
2338 ohsps_unlock:
2339 spin_unlock_irqrestore(&oh->_lock, flags);
2340
2341 return ret;
2342 }
2343
2344 /**
2345 * omap_hwmod_get_context_loss_count - get lost context count
2346 * @oh: struct omap_hwmod *
2347 *
2348 * Query the powerdomain of of @oh to get the context loss
2349 * count for this device.
2350 *
2351 * Returns the context loss count of the powerdomain assocated with @oh
2352 * upon success, or zero if no powerdomain exists for @oh.
2353 */
2354 u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2355 {
2356 struct powerdomain *pwrdm;
2357 int ret = 0;
2358
2359 pwrdm = omap_hwmod_get_pwrdm(oh);
2360 if (pwrdm)
2361 ret = pwrdm_get_context_loss_count(pwrdm);
2362
2363 return ret;
2364 }
2365
2366 /**
2367 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
2368 * @oh: struct omap_hwmod *
2369 *
2370 * Prevent the hwmod @oh from being reset during the setup process.
2371 * Intended for use by board-*.c files on boards with devices that
2372 * cannot tolerate being reset. Must be called before the hwmod has
2373 * been set up. Returns 0 upon success or negative error code upon
2374 * failure.
2375 */
2376 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2377 {
2378 if (!oh)
2379 return -EINVAL;
2380
2381 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2382 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
2383 oh->name);
2384 return -EINVAL;
2385 }
2386
2387 oh->flags |= HWMOD_INIT_NO_RESET;
2388
2389 return 0;
2390 }
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