OMAP: hwmod: Move pr_debug to improve the readability
[deliverable/linux.git] / arch / arm / mach-omap2 / omap_hwmod.c
1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 *
6 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
7 *
8 * Created in collaboration with (alphabetical order): Thara Gopinath,
9 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
10 * Sawant, Santosh Shilimkar, Richard Woodruff
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * Introduction
17 * ------------
18 * One way to view an OMAP SoC is as a collection of largely unrelated
19 * IP blocks connected by interconnects. The IP blocks include
20 * devices such as ARM processors, audio serial interfaces, UARTs,
21 * etc. Some of these devices, like the DSP, are created by TI;
22 * others, like the SGX, largely originate from external vendors. In
23 * TI's documentation, on-chip devices are referred to as "OMAP
24 * modules." Some of these IP blocks are identical across several
25 * OMAP versions. Others are revised frequently.
26 *
27 * These OMAP modules are tied together by various interconnects.
28 * Most of the address and data flow between modules is via OCP-based
29 * interconnects such as the L3 and L4 buses; but there are other
30 * interconnects that distribute the hardware clock tree, handle idle
31 * and reset signaling, supply power, and connect the modules to
32 * various pads or balls on the OMAP package.
33 *
34 * OMAP hwmod provides a consistent way to describe the on-chip
35 * hardware blocks and their integration into the rest of the chip.
36 * This description can be automatically generated from the TI
37 * hardware database. OMAP hwmod provides a standard, consistent API
38 * to reset, enable, idle, and disable these hardware blocks. And
39 * hwmod provides a way for other core code, such as the Linux device
40 * code or the OMAP power management and address space mapping code,
41 * to query the hardware database.
42 *
43 * Using hwmod
44 * -----------
45 * Drivers won't call hwmod functions directly. That is done by the
46 * omap_device code, and in rare occasions, by custom integration code
47 * in arch/arm/ *omap*. The omap_device code includes functions to
48 * build a struct platform_device using omap_hwmod data, and that is
49 * currently how hwmod data is communicated to drivers and to the
50 * Linux driver model. Most drivers will call omap_hwmod functions only
51 * indirectly, via pm_runtime*() functions.
52 *
53 * From a layering perspective, here is where the OMAP hwmod code
54 * fits into the kernel software stack:
55 *
56 * +-------------------------------+
57 * | Device driver code |
58 * | (e.g., drivers/) |
59 * +-------------------------------+
60 * | Linux driver model |
61 * | (platform_device / |
62 * | platform_driver data/code) |
63 * +-------------------------------+
64 * | OMAP core-driver integration |
65 * |(arch/arm/mach-omap2/devices.c)|
66 * +-------------------------------+
67 * | omap_device code |
68 * | (../plat-omap/omap_device.c) |
69 * +-------------------------------+
70 * ----> | omap_hwmod code/data | <-----
71 * | (../mach-omap2/omap_hwmod*) |
72 * +-------------------------------+
73 * | OMAP clock/PRCM/register fns |
74 * | (__raw_{read,write}l, clk*) |
75 * +-------------------------------+
76 *
77 * Device drivers should not contain any OMAP-specific code or data in
78 * them. They should only contain code to operate the IP block that
79 * the driver is responsible for. This is because these IP blocks can
80 * also appear in other SoCs, either from TI (such as DaVinci) or from
81 * other manufacturers; and drivers should be reusable across other
82 * platforms.
83 *
84 * The OMAP hwmod code also will attempt to reset and idle all on-chip
85 * devices upon boot. The goal here is for the kernel to be
86 * completely self-reliant and independent from bootloaders. This is
87 * to ensure a repeatable configuration, both to ensure consistent
88 * runtime behavior, and to make it easier for others to reproduce
89 * bugs.
90 *
91 * OMAP module activity states
92 * ---------------------------
93 * The hwmod code considers modules to be in one of several activity
94 * states. IP blocks start out in an UNKNOWN state, then once they
95 * are registered via the hwmod code, proceed to the REGISTERED state.
96 * Once their clock names are resolved to clock pointers, the module
97 * enters the CLKS_INITED state; and finally, once the module has been
98 * reset and the integration registers programmed, the INITIALIZED state
99 * is entered. The hwmod code will then place the module into either
100 * the IDLE state to save power, or in the case of a critical system
101 * module, the ENABLED state.
102 *
103 * OMAP core integration code can then call omap_hwmod*() functions
104 * directly to move the module between the IDLE, ENABLED, and DISABLED
105 * states, as needed. This is done during both the PM idle loop, and
106 * in the OMAP core integration code's implementation of the PM runtime
107 * functions.
108 *
109 * References
110 * ----------
111 * This is a partial list.
112 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
113 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
114 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
115 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
116 * - Open Core Protocol Specification 2.2
117 *
118 * To do:
119 * - handle IO mapping
120 * - bus throughput & module latency measurement code
121 *
122 * XXX add tests at the beginning of each function to ensure the hwmod is
123 * in the appropriate state
124 * XXX error return values should be checked to ensure that they are
125 * appropriate
126 */
127 #undef DEBUG
128
129 #include <linux/kernel.h>
130 #include <linux/errno.h>
131 #include <linux/io.h>
132 #include <linux/clk.h>
133 #include <linux/delay.h>
134 #include <linux/err.h>
135 #include <linux/list.h>
136 #include <linux/mutex.h>
137 #include <linux/spinlock.h>
138
139 #include <plat/common.h>
140 #include <plat/cpu.h>
141 #include "clockdomain.h"
142 #include "powerdomain.h"
143 #include <plat/clock.h>
144 #include <plat/omap_hwmod.h>
145 #include <plat/prcm.h>
146
147 #include "cm2xxx_3xxx.h"
148 #include "cm44xx.h"
149 #include "prm2xxx_3xxx.h"
150 #include "prm44xx.h"
151 #include "mux.h"
152
153 /* Maximum microseconds to wait for OMAP module to softreset */
154 #define MAX_MODULE_SOFTRESET_WAIT 10000
155
156 /* Name of the OMAP hwmod for the MPU */
157 #define MPU_INITIATOR_NAME "mpu"
158
159 /* omap_hwmod_list contains all registered struct omap_hwmods */
160 static LIST_HEAD(omap_hwmod_list);
161
162 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
163 static struct omap_hwmod *mpu_oh;
164
165
166 /* Private functions */
167
168 /**
169 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
170 * @oh: struct omap_hwmod *
171 *
172 * Load the current value of the hwmod OCP_SYSCONFIG register into the
173 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
174 * OCP_SYSCONFIG register or 0 upon success.
175 */
176 static int _update_sysc_cache(struct omap_hwmod *oh)
177 {
178 if (!oh->class->sysc) {
179 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
180 return -EINVAL;
181 }
182
183 /* XXX ensure module interface clock is up */
184
185 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
186
187 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
188 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
189
190 return 0;
191 }
192
193 /**
194 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
195 * @v: OCP_SYSCONFIG value to write
196 * @oh: struct omap_hwmod *
197 *
198 * Write @v into the module class' OCP_SYSCONFIG register, if it has
199 * one. No return value.
200 */
201 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
202 {
203 if (!oh->class->sysc) {
204 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
205 return;
206 }
207
208 /* XXX ensure module interface clock is up */
209
210 /* Module might have lost context, always update cache and register */
211 oh->_sysc_cache = v;
212 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
213 }
214
215 /**
216 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
217 * @oh: struct omap_hwmod *
218 * @standbymode: MIDLEMODE field bits
219 * @v: pointer to register contents to modify
220 *
221 * Update the master standby mode bits in @v to be @standbymode for
222 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
223 * upon error or 0 upon success.
224 */
225 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
226 u32 *v)
227 {
228 u32 mstandby_mask;
229 u8 mstandby_shift;
230
231 if (!oh->class->sysc ||
232 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
233 return -EINVAL;
234
235 if (!oh->class->sysc->sysc_fields) {
236 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
237 return -EINVAL;
238 }
239
240 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
241 mstandby_mask = (0x3 << mstandby_shift);
242
243 *v &= ~mstandby_mask;
244 *v |= __ffs(standbymode) << mstandby_shift;
245
246 return 0;
247 }
248
249 /**
250 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
251 * @oh: struct omap_hwmod *
252 * @idlemode: SIDLEMODE field bits
253 * @v: pointer to register contents to modify
254 *
255 * Update the slave idle mode bits in @v to be @idlemode for the @oh
256 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
257 * or 0 upon success.
258 */
259 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
260 {
261 u32 sidle_mask;
262 u8 sidle_shift;
263
264 if (!oh->class->sysc ||
265 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
266 return -EINVAL;
267
268 if (!oh->class->sysc->sysc_fields) {
269 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
270 return -EINVAL;
271 }
272
273 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
274 sidle_mask = (0x3 << sidle_shift);
275
276 *v &= ~sidle_mask;
277 *v |= __ffs(idlemode) << sidle_shift;
278
279 return 0;
280 }
281
282 /**
283 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
284 * @oh: struct omap_hwmod *
285 * @clockact: CLOCKACTIVITY field bits
286 * @v: pointer to register contents to modify
287 *
288 * Update the clockactivity mode bits in @v to be @clockact for the
289 * @oh hwmod. Used for additional powersaving on some modules. Does
290 * not write to the hardware. Returns -EINVAL upon error or 0 upon
291 * success.
292 */
293 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
294 {
295 u32 clkact_mask;
296 u8 clkact_shift;
297
298 if (!oh->class->sysc ||
299 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
300 return -EINVAL;
301
302 if (!oh->class->sysc->sysc_fields) {
303 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
304 return -EINVAL;
305 }
306
307 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
308 clkact_mask = (0x3 << clkact_shift);
309
310 *v &= ~clkact_mask;
311 *v |= clockact << clkact_shift;
312
313 return 0;
314 }
315
316 /**
317 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
318 * @oh: struct omap_hwmod *
319 * @v: pointer to register contents to modify
320 *
321 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
322 * error or 0 upon success.
323 */
324 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
325 {
326 u32 softrst_mask;
327
328 if (!oh->class->sysc ||
329 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
330 return -EINVAL;
331
332 if (!oh->class->sysc->sysc_fields) {
333 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
334 return -EINVAL;
335 }
336
337 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
338
339 *v |= softrst_mask;
340
341 return 0;
342 }
343
344 /**
345 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
346 * @oh: struct omap_hwmod *
347 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
348 * @v: pointer to register contents to modify
349 *
350 * Update the module autoidle bit in @v to be @autoidle for the @oh
351 * hwmod. The autoidle bit controls whether the module can gate
352 * internal clocks automatically when it isn't doing anything; the
353 * exact function of this bit varies on a per-module basis. This
354 * function does not write to the hardware. Returns -EINVAL upon
355 * error or 0 upon success.
356 */
357 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
358 u32 *v)
359 {
360 u32 autoidle_mask;
361 u8 autoidle_shift;
362
363 if (!oh->class->sysc ||
364 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
365 return -EINVAL;
366
367 if (!oh->class->sysc->sysc_fields) {
368 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
369 return -EINVAL;
370 }
371
372 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
373 autoidle_mask = (0x1 << autoidle_shift);
374
375 *v &= ~autoidle_mask;
376 *v |= autoidle << autoidle_shift;
377
378 return 0;
379 }
380
381 /**
382 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
383 * @oh: struct omap_hwmod *
384 *
385 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
386 * upon error or 0 upon success.
387 */
388 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
389 {
390 if (!oh->class->sysc ||
391 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
392 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
393 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
394 return -EINVAL;
395
396 if (!oh->class->sysc->sysc_fields) {
397 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
398 return -EINVAL;
399 }
400
401 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
402 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
403
404 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
405 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
406 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
407 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
408
409 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
410
411 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
412
413 return 0;
414 }
415
416 /**
417 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
418 * @oh: struct omap_hwmod *
419 *
420 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
421 * upon error or 0 upon success.
422 */
423 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
424 {
425 if (!oh->class->sysc ||
426 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
427 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
428 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
429 return -EINVAL;
430
431 if (!oh->class->sysc->sysc_fields) {
432 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
433 return -EINVAL;
434 }
435
436 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
437 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
438
439 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
440 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
441 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
442 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
443
444 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
445
446 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
447
448 return 0;
449 }
450
451 /**
452 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
453 * @oh: struct omap_hwmod *
454 *
455 * Prevent the hardware module @oh from entering idle while the
456 * hardare module initiator @init_oh is active. Useful when a module
457 * will be accessed by a particular initiator (e.g., if a module will
458 * be accessed by the IVA, there should be a sleepdep between the IVA
459 * initiator and the module). Only applies to modules in smart-idle
460 * mode. If the clockdomain is marked as not needing autodeps, return
461 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
462 * passes along clkdm_add_sleepdep() value upon success.
463 */
464 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
465 {
466 if (!oh->_clk)
467 return -EINVAL;
468
469 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
470 return 0;
471
472 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
473 }
474
475 /**
476 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
477 * @oh: struct omap_hwmod *
478 *
479 * Allow the hardware module @oh to enter idle while the hardare
480 * module initiator @init_oh is active. Useful when a module will not
481 * be accessed by a particular initiator (e.g., if a module will not
482 * be accessed by the IVA, there should be no sleepdep between the IVA
483 * initiator and the module). Only applies to modules in smart-idle
484 * mode. If the clockdomain is marked as not needing autodeps, return
485 * 0 without doing anything. Returns -EINVAL upon error or passes
486 * along clkdm_del_sleepdep() value upon success.
487 */
488 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
489 {
490 if (!oh->_clk)
491 return -EINVAL;
492
493 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
494 return 0;
495
496 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
497 }
498
499 /**
500 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
501 * @oh: struct omap_hwmod *
502 *
503 * Called from _init_clocks(). Populates the @oh _clk (main
504 * functional clock pointer) if a main_clk is present. Returns 0 on
505 * success or -EINVAL on error.
506 */
507 static int _init_main_clk(struct omap_hwmod *oh)
508 {
509 int ret = 0;
510
511 if (!oh->main_clk)
512 return 0;
513
514 oh->_clk = omap_clk_get_by_name(oh->main_clk);
515 if (!oh->_clk) {
516 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
517 oh->name, oh->main_clk);
518 return -EINVAL;
519 }
520
521 if (!oh->_clk->clkdm)
522 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
523 oh->main_clk, oh->_clk->name);
524
525 return ret;
526 }
527
528 /**
529 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
530 * @oh: struct omap_hwmod *
531 *
532 * Called from _init_clocks(). Populates the @oh OCP slave interface
533 * clock pointers. Returns 0 on success or -EINVAL on error.
534 */
535 static int _init_interface_clks(struct omap_hwmod *oh)
536 {
537 struct clk *c;
538 int i;
539 int ret = 0;
540
541 if (oh->slaves_cnt == 0)
542 return 0;
543
544 for (i = 0; i < oh->slaves_cnt; i++) {
545 struct omap_hwmod_ocp_if *os = oh->slaves[i];
546
547 if (!os->clk)
548 continue;
549
550 c = omap_clk_get_by_name(os->clk);
551 if (!c) {
552 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
553 oh->name, os->clk);
554 ret = -EINVAL;
555 }
556 os->_clk = c;
557 }
558
559 return ret;
560 }
561
562 /**
563 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
564 * @oh: struct omap_hwmod *
565 *
566 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
567 * clock pointers. Returns 0 on success or -EINVAL on error.
568 */
569 static int _init_opt_clks(struct omap_hwmod *oh)
570 {
571 struct omap_hwmod_opt_clk *oc;
572 struct clk *c;
573 int i;
574 int ret = 0;
575
576 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
577 c = omap_clk_get_by_name(oc->clk);
578 if (!c) {
579 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
580 oh->name, oc->clk);
581 ret = -EINVAL;
582 }
583 oc->_clk = c;
584 }
585
586 return ret;
587 }
588
589 /**
590 * _enable_clocks - enable hwmod main clock and interface clocks
591 * @oh: struct omap_hwmod *
592 *
593 * Enables all clocks necessary for register reads and writes to succeed
594 * on the hwmod @oh. Returns 0.
595 */
596 static int _enable_clocks(struct omap_hwmod *oh)
597 {
598 int i;
599
600 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
601
602 if (oh->_clk)
603 clk_enable(oh->_clk);
604
605 if (oh->slaves_cnt > 0) {
606 for (i = 0; i < oh->slaves_cnt; i++) {
607 struct omap_hwmod_ocp_if *os = oh->slaves[i];
608 struct clk *c = os->_clk;
609
610 if (c && (os->flags & OCPIF_SWSUP_IDLE))
611 clk_enable(c);
612 }
613 }
614
615 /* The opt clocks are controlled by the device driver. */
616
617 return 0;
618 }
619
620 /**
621 * _disable_clocks - disable hwmod main clock and interface clocks
622 * @oh: struct omap_hwmod *
623 *
624 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
625 */
626 static int _disable_clocks(struct omap_hwmod *oh)
627 {
628 int i;
629
630 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
631
632 if (oh->_clk)
633 clk_disable(oh->_clk);
634
635 if (oh->slaves_cnt > 0) {
636 for (i = 0; i < oh->slaves_cnt; i++) {
637 struct omap_hwmod_ocp_if *os = oh->slaves[i];
638 struct clk *c = os->_clk;
639
640 if (c && (os->flags & OCPIF_SWSUP_IDLE))
641 clk_disable(c);
642 }
643 }
644
645 /* The opt clocks are controlled by the device driver. */
646
647 return 0;
648 }
649
650 static void _enable_optional_clocks(struct omap_hwmod *oh)
651 {
652 struct omap_hwmod_opt_clk *oc;
653 int i;
654
655 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
656
657 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
658 if (oc->_clk) {
659 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
660 oc->_clk->name);
661 clk_enable(oc->_clk);
662 }
663 }
664
665 static void _disable_optional_clocks(struct omap_hwmod *oh)
666 {
667 struct omap_hwmod_opt_clk *oc;
668 int i;
669
670 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
671
672 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
673 if (oc->_clk) {
674 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
675 oc->_clk->name);
676 clk_disable(oc->_clk);
677 }
678 }
679
680 /**
681 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
682 * @oh: struct omap_hwmod *
683 *
684 * Returns the array index of the OCP slave port that the MPU
685 * addresses the device on, or -EINVAL upon error or not found.
686 */
687 static int __init _find_mpu_port_index(struct omap_hwmod *oh)
688 {
689 int i;
690 int found = 0;
691
692 if (!oh || oh->slaves_cnt == 0)
693 return -EINVAL;
694
695 for (i = 0; i < oh->slaves_cnt; i++) {
696 struct omap_hwmod_ocp_if *os = oh->slaves[i];
697
698 if (os->user & OCP_USER_MPU) {
699 found = 1;
700 break;
701 }
702 }
703
704 if (found)
705 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
706 oh->name, i);
707 else
708 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
709 oh->name);
710
711 return (found) ? i : -EINVAL;
712 }
713
714 /**
715 * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
716 * @oh: struct omap_hwmod *
717 *
718 * Return the virtual address of the base of the register target of
719 * device @oh, or NULL on error.
720 */
721 static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
722 {
723 struct omap_hwmod_ocp_if *os;
724 struct omap_hwmod_addr_space *mem;
725 int i;
726 int found = 0;
727 void __iomem *va_start;
728
729 if (!oh || oh->slaves_cnt == 0)
730 return NULL;
731
732 os = oh->slaves[index];
733
734 for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
735 if (mem->flags & ADDR_TYPE_RT) {
736 found = 1;
737 break;
738 }
739 }
740
741 if (found) {
742 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
743 if (!va_start) {
744 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
745 return NULL;
746 }
747 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
748 oh->name, va_start);
749 } else {
750 pr_debug("omap_hwmod: %s: no MPU register target found\n",
751 oh->name);
752 }
753
754 return (found) ? va_start : NULL;
755 }
756
757 /**
758 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
759 * @oh: struct omap_hwmod *
760 *
761 * If module is marked as SWSUP_SIDLE, force the module out of slave
762 * idle; otherwise, configure it for smart-idle. If module is marked
763 * as SWSUP_MSUSPEND, force the module out of master standby;
764 * otherwise, configure it for smart-standby. No return value.
765 */
766 static void _enable_sysc(struct omap_hwmod *oh)
767 {
768 u8 idlemode, sf;
769 u32 v;
770
771 if (!oh->class->sysc)
772 return;
773
774 v = oh->_sysc_cache;
775 sf = oh->class->sysc->sysc_flags;
776
777 if (sf & SYSC_HAS_SIDLEMODE) {
778 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
779 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
780 _set_slave_idlemode(oh, idlemode, &v);
781 }
782
783 if (sf & SYSC_HAS_MIDLEMODE) {
784 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
785 idlemode = HWMOD_IDLEMODE_NO;
786 } else {
787 if (sf & SYSC_HAS_ENAWAKEUP)
788 _enable_wakeup(oh, &v);
789 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
790 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
791 else
792 idlemode = HWMOD_IDLEMODE_SMART;
793 }
794 _set_master_standbymode(oh, idlemode, &v);
795 }
796
797 /*
798 * XXX The clock framework should handle this, by
799 * calling into this code. But this must wait until the
800 * clock structures are tagged with omap_hwmod entries
801 */
802 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
803 (sf & SYSC_HAS_CLOCKACTIVITY))
804 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
805
806 /* If slave is in SMARTIDLE, also enable wakeup */
807 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
808 _enable_wakeup(oh, &v);
809
810 _write_sysconfig(v, oh);
811
812 /*
813 * Set the autoidle bit only after setting the smartidle bit
814 * Setting this will not have any impact on the other modules.
815 */
816 if (sf & SYSC_HAS_AUTOIDLE) {
817 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
818 0 : 1;
819 _set_module_autoidle(oh, idlemode, &v);
820 _write_sysconfig(v, oh);
821 }
822 }
823
824 /**
825 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
826 * @oh: struct omap_hwmod *
827 *
828 * If module is marked as SWSUP_SIDLE, force the module into slave
829 * idle; otherwise, configure it for smart-idle. If module is marked
830 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
831 * configure it for smart-standby. No return value.
832 */
833 static void _idle_sysc(struct omap_hwmod *oh)
834 {
835 u8 idlemode, sf;
836 u32 v;
837
838 if (!oh->class->sysc)
839 return;
840
841 v = oh->_sysc_cache;
842 sf = oh->class->sysc->sysc_flags;
843
844 if (sf & SYSC_HAS_SIDLEMODE) {
845 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
846 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
847 _set_slave_idlemode(oh, idlemode, &v);
848 }
849
850 if (sf & SYSC_HAS_MIDLEMODE) {
851 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
852 idlemode = HWMOD_IDLEMODE_FORCE;
853 } else {
854 if (sf & SYSC_HAS_ENAWAKEUP)
855 _enable_wakeup(oh, &v);
856 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
857 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
858 else
859 idlemode = HWMOD_IDLEMODE_SMART;
860 }
861 _set_master_standbymode(oh, idlemode, &v);
862 }
863
864 /* If slave is in SMARTIDLE, also enable wakeup */
865 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
866 _enable_wakeup(oh, &v);
867
868 _write_sysconfig(v, oh);
869 }
870
871 /**
872 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
873 * @oh: struct omap_hwmod *
874 *
875 * Force the module into slave idle and master suspend. No return
876 * value.
877 */
878 static void _shutdown_sysc(struct omap_hwmod *oh)
879 {
880 u32 v;
881 u8 sf;
882
883 if (!oh->class->sysc)
884 return;
885
886 v = oh->_sysc_cache;
887 sf = oh->class->sysc->sysc_flags;
888
889 if (sf & SYSC_HAS_SIDLEMODE)
890 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
891
892 if (sf & SYSC_HAS_MIDLEMODE)
893 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
894
895 if (sf & SYSC_HAS_AUTOIDLE)
896 _set_module_autoidle(oh, 1, &v);
897
898 _write_sysconfig(v, oh);
899 }
900
901 /**
902 * _lookup - find an omap_hwmod by name
903 * @name: find an omap_hwmod by name
904 *
905 * Return a pointer to an omap_hwmod by name, or NULL if not found.
906 */
907 static struct omap_hwmod *_lookup(const char *name)
908 {
909 struct omap_hwmod *oh, *temp_oh;
910
911 oh = NULL;
912
913 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
914 if (!strcmp(name, temp_oh->name)) {
915 oh = temp_oh;
916 break;
917 }
918 }
919
920 return oh;
921 }
922
923 /**
924 * _init_clocks - clk_get() all clocks associated with this hwmod
925 * @oh: struct omap_hwmod *
926 * @data: not used; pass NULL
927 *
928 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
929 * Resolves all clock names embedded in the hwmod. Returns 0 on
930 * success, or a negative error code on failure.
931 */
932 static int _init_clocks(struct omap_hwmod *oh, void *data)
933 {
934 int ret = 0;
935
936 if (oh->_state != _HWMOD_STATE_REGISTERED)
937 return 0;
938
939 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
940
941 ret |= _init_main_clk(oh);
942 ret |= _init_interface_clks(oh);
943 ret |= _init_opt_clks(oh);
944
945 if (!ret)
946 oh->_state = _HWMOD_STATE_CLKS_INITED;
947 else
948 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
949
950 return ret;
951 }
952
953 /**
954 * _wait_target_ready - wait for a module to leave slave idle
955 * @oh: struct omap_hwmod *
956 *
957 * Wait for a module @oh to leave slave idle. Returns 0 if the module
958 * does not have an IDLEST bit or if the module successfully leaves
959 * slave idle; otherwise, pass along the return value of the
960 * appropriate *_cm_wait_module_ready() function.
961 */
962 static int _wait_target_ready(struct omap_hwmod *oh)
963 {
964 struct omap_hwmod_ocp_if *os;
965 int ret;
966
967 if (!oh)
968 return -EINVAL;
969
970 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
971 return 0;
972
973 os = oh->slaves[oh->_mpu_port_index];
974
975 if (oh->flags & HWMOD_NO_IDLEST)
976 return 0;
977
978 /* XXX check module SIDLEMODE */
979
980 /* XXX check clock enable states */
981
982 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
983 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
984 oh->prcm.omap2.idlest_reg_id,
985 oh->prcm.omap2.idlest_idle_bit);
986 } else if (cpu_is_omap44xx()) {
987 ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
988 } else {
989 BUG();
990 };
991
992 return ret;
993 }
994
995 /**
996 * _lookup_hardreset - fill register bit info for this hwmod/reset line
997 * @oh: struct omap_hwmod *
998 * @name: name of the reset line in the context of this hwmod
999 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1000 *
1001 * Return the bit position of the reset line that match the
1002 * input name. Return -ENOENT if not found.
1003 */
1004 static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1005 struct omap_hwmod_rst_info *ohri)
1006 {
1007 int i;
1008
1009 for (i = 0; i < oh->rst_lines_cnt; i++) {
1010 const char *rst_line = oh->rst_lines[i].name;
1011 if (!strcmp(rst_line, name)) {
1012 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1013 ohri->st_shift = oh->rst_lines[i].st_shift;
1014 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1015 oh->name, __func__, rst_line, ohri->rst_shift,
1016 ohri->st_shift);
1017
1018 return 0;
1019 }
1020 }
1021
1022 return -ENOENT;
1023 }
1024
1025 /**
1026 * _assert_hardreset - assert the HW reset line of submodules
1027 * contained in the hwmod module.
1028 * @oh: struct omap_hwmod *
1029 * @name: name of the reset line to lookup and assert
1030 *
1031 * Some IP like dsp, ipu or iva contain processor that require
1032 * an HW reset line to be assert / deassert in order to enable fully
1033 * the IP.
1034 */
1035 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1036 {
1037 struct omap_hwmod_rst_info ohri;
1038 u8 ret;
1039
1040 if (!oh)
1041 return -EINVAL;
1042
1043 ret = _lookup_hardreset(oh, name, &ohri);
1044 if (IS_ERR_VALUE(ret))
1045 return ret;
1046
1047 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1048 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
1049 ohri.rst_shift);
1050 else if (cpu_is_omap44xx())
1051 return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
1052 ohri.rst_shift);
1053 else
1054 return -EINVAL;
1055 }
1056
1057 /**
1058 * _deassert_hardreset - deassert the HW reset line of submodules contained
1059 * in the hwmod module.
1060 * @oh: struct omap_hwmod *
1061 * @name: name of the reset line to look up and deassert
1062 *
1063 * Some IP like dsp, ipu or iva contain processor that require
1064 * an HW reset line to be assert / deassert in order to enable fully
1065 * the IP.
1066 */
1067 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1068 {
1069 struct omap_hwmod_rst_info ohri;
1070 int ret;
1071
1072 if (!oh)
1073 return -EINVAL;
1074
1075 ret = _lookup_hardreset(oh, name, &ohri);
1076 if (IS_ERR_VALUE(ret))
1077 return ret;
1078
1079 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1080 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1081 ohri.rst_shift,
1082 ohri.st_shift);
1083 } else if (cpu_is_omap44xx()) {
1084 if (ohri.st_shift)
1085 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1086 oh->name, name);
1087 ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
1088 ohri.rst_shift);
1089 } else {
1090 return -EINVAL;
1091 }
1092
1093 if (ret == -EBUSY)
1094 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1095
1096 return ret;
1097 }
1098
1099 /**
1100 * _read_hardreset - read the HW reset line state of submodules
1101 * contained in the hwmod module
1102 * @oh: struct omap_hwmod *
1103 * @name: name of the reset line to look up and read
1104 *
1105 * Return the state of the reset line.
1106 */
1107 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1108 {
1109 struct omap_hwmod_rst_info ohri;
1110 u8 ret;
1111
1112 if (!oh)
1113 return -EINVAL;
1114
1115 ret = _lookup_hardreset(oh, name, &ohri);
1116 if (IS_ERR_VALUE(ret))
1117 return ret;
1118
1119 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1120 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1121 ohri.st_shift);
1122 } else if (cpu_is_omap44xx()) {
1123 return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
1124 ohri.rst_shift);
1125 } else {
1126 return -EINVAL;
1127 }
1128 }
1129
1130 /**
1131 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1132 * @oh: struct omap_hwmod *
1133 *
1134 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1135 * enabled for this to work. Returns -EINVAL if the hwmod cannot be
1136 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1137 * the module did not reset in time, or 0 upon success.
1138 *
1139 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1140 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1141 * use the SYSCONFIG softreset bit to provide the status.
1142 *
1143 * Note that some IP like McBSP do have reset control but don't have
1144 * reset status.
1145 */
1146 static int _ocp_softreset(struct omap_hwmod *oh)
1147 {
1148 u32 v;
1149 int c = 0;
1150 int ret = 0;
1151
1152 if (!oh->class->sysc ||
1153 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1154 return -EINVAL;
1155
1156 /* clocks must be on for this operation */
1157 if (oh->_state != _HWMOD_STATE_ENABLED) {
1158 pr_warning("omap_hwmod: %s: reset can only be entered from "
1159 "enabled state\n", oh->name);
1160 return -EINVAL;
1161 }
1162
1163 /* For some modules, all optionnal clocks need to be enabled as well */
1164 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1165 _enable_optional_clocks(oh);
1166
1167 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1168
1169 v = oh->_sysc_cache;
1170 ret = _set_softreset(oh, &v);
1171 if (ret)
1172 goto dis_opt_clks;
1173 _write_sysconfig(v, oh);
1174
1175 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1176 omap_test_timeout((omap_hwmod_read(oh,
1177 oh->class->sysc->syss_offs)
1178 & SYSS_RESETDONE_MASK),
1179 MAX_MODULE_SOFTRESET_WAIT, c);
1180 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
1181 omap_test_timeout(!(omap_hwmod_read(oh,
1182 oh->class->sysc->sysc_offs)
1183 & SYSC_TYPE2_SOFTRESET_MASK),
1184 MAX_MODULE_SOFTRESET_WAIT, c);
1185
1186 if (c == MAX_MODULE_SOFTRESET_WAIT)
1187 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1188 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1189 else
1190 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1191
1192 /*
1193 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1194 * _wait_target_ready() or _reset()
1195 */
1196
1197 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1198
1199 dis_opt_clks:
1200 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1201 _disable_optional_clocks(oh);
1202
1203 return ret;
1204 }
1205
1206 /**
1207 * _reset - reset an omap_hwmod
1208 * @oh: struct omap_hwmod *
1209 *
1210 * Resets an omap_hwmod @oh. The default software reset mechanism for
1211 * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1212 * bit. However, some hwmods cannot be reset via this method: some
1213 * are not targets and therefore have no OCP header registers to
1214 * access; others (like the IVA) have idiosyncratic reset sequences.
1215 * So for these relatively rare cases, custom reset code can be
1216 * supplied in the struct omap_hwmod_class .reset function pointer.
1217 * Passes along the return value from either _reset() or the custom
1218 * reset function - these must return -EINVAL if the hwmod cannot be
1219 * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1220 * the module did not reset in time, or 0 upon success.
1221 */
1222 static int _reset(struct omap_hwmod *oh)
1223 {
1224 int ret;
1225
1226 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1227
1228 ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1229
1230 return ret;
1231 }
1232
1233 /**
1234 * _enable - enable an omap_hwmod
1235 * @oh: struct omap_hwmod *
1236 *
1237 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1238 * register target. Returns -EINVAL if the hwmod is in the wrong
1239 * state or passes along the return value of _wait_target_ready().
1240 */
1241 static int _enable(struct omap_hwmod *oh)
1242 {
1243 int r;
1244
1245 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1246
1247 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1248 oh->_state != _HWMOD_STATE_IDLE &&
1249 oh->_state != _HWMOD_STATE_DISABLED) {
1250 WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1251 "from initialized, idle, or disabled state\n", oh->name);
1252 return -EINVAL;
1253 }
1254
1255 /* Mux pins for device runtime if populated */
1256 if (oh->mux && (!oh->mux->enabled ||
1257 ((oh->_state == _HWMOD_STATE_IDLE) &&
1258 oh->mux->pads_dynamic)))
1259 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1260
1261 _add_initiator_dep(oh, mpu_oh);
1262 _enable_clocks(oh);
1263
1264 /*
1265 * If an IP contains only one HW reset line, then de-assert it in order
1266 * to allow the module state transition. Otherwise the PRCM will return
1267 * Intransition status, and the init will failed.
1268 */
1269 if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1270 oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1271 _deassert_hardreset(oh, oh->rst_lines[0].name);
1272
1273 r = _wait_target_ready(oh);
1274 if (r) {
1275 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1276 oh->name, r);
1277 _disable_clocks(oh);
1278
1279 return r;
1280 }
1281
1282 oh->_state = _HWMOD_STATE_ENABLED;
1283
1284 /* Access the sysconfig only if the target is ready */
1285 if (oh->class->sysc) {
1286 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1287 _update_sysc_cache(oh);
1288 _enable_sysc(oh);
1289 }
1290
1291 return r;
1292 }
1293
1294 /**
1295 * _idle - idle an omap_hwmod
1296 * @oh: struct omap_hwmod *
1297 *
1298 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1299 * no further work. Returns -EINVAL if the hwmod is in the wrong
1300 * state or returns 0.
1301 */
1302 static int _idle(struct omap_hwmod *oh)
1303 {
1304 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1305
1306 if (oh->_state != _HWMOD_STATE_ENABLED) {
1307 WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1308 "enabled state\n", oh->name);
1309 return -EINVAL;
1310 }
1311
1312 if (oh->class->sysc)
1313 _idle_sysc(oh);
1314 _del_initiator_dep(oh, mpu_oh);
1315 _disable_clocks(oh);
1316
1317 /* Mux pins for device idle if populated */
1318 if (oh->mux && oh->mux->pads_dynamic)
1319 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1320
1321 oh->_state = _HWMOD_STATE_IDLE;
1322
1323 return 0;
1324 }
1325
1326 /**
1327 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1328 * @oh: struct omap_hwmod *
1329 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1330 *
1331 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1332 * local copy. Intended to be used by drivers that require
1333 * direct manipulation of the AUTOIDLE bits.
1334 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1335 * along the return value from _set_module_autoidle().
1336 *
1337 * Any users of this function should be scrutinized carefully.
1338 */
1339 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1340 {
1341 u32 v;
1342 int retval = 0;
1343 unsigned long flags;
1344
1345 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1346 return -EINVAL;
1347
1348 spin_lock_irqsave(&oh->_lock, flags);
1349
1350 v = oh->_sysc_cache;
1351
1352 retval = _set_module_autoidle(oh, autoidle, &v);
1353
1354 if (!retval)
1355 _write_sysconfig(v, oh);
1356
1357 spin_unlock_irqrestore(&oh->_lock, flags);
1358
1359 return retval;
1360 }
1361
1362 /**
1363 * _shutdown - shutdown an omap_hwmod
1364 * @oh: struct omap_hwmod *
1365 *
1366 * Shut down an omap_hwmod @oh. This should be called when the driver
1367 * used for the hwmod is removed or unloaded or if the driver is not
1368 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1369 * state or returns 0.
1370 */
1371 static int _shutdown(struct omap_hwmod *oh)
1372 {
1373 int ret;
1374 u8 prev_state;
1375
1376 if (oh->_state != _HWMOD_STATE_IDLE &&
1377 oh->_state != _HWMOD_STATE_ENABLED) {
1378 WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1379 "from idle, or enabled state\n", oh->name);
1380 return -EINVAL;
1381 }
1382
1383 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1384
1385 if (oh->class->pre_shutdown) {
1386 prev_state = oh->_state;
1387 if (oh->_state == _HWMOD_STATE_IDLE)
1388 _enable(oh);
1389 ret = oh->class->pre_shutdown(oh);
1390 if (ret) {
1391 if (prev_state == _HWMOD_STATE_IDLE)
1392 _idle(oh);
1393 return ret;
1394 }
1395 }
1396
1397 if (oh->class->sysc) {
1398 if (oh->_state == _HWMOD_STATE_IDLE)
1399 _enable(oh);
1400 _shutdown_sysc(oh);
1401 }
1402
1403 /* clocks and deps are already disabled in idle */
1404 if (oh->_state == _HWMOD_STATE_ENABLED) {
1405 _del_initiator_dep(oh, mpu_oh);
1406 /* XXX what about the other system initiators here? dma, dsp */
1407 _disable_clocks(oh);
1408 }
1409 /* XXX Should this code also force-disable the optional clocks? */
1410
1411 /*
1412 * If an IP contains only one HW reset line, then assert it
1413 * after disabling the clocks and before shutting down the IP.
1414 */
1415 if (oh->rst_lines_cnt == 1)
1416 _assert_hardreset(oh, oh->rst_lines[0].name);
1417
1418 /* Mux pins to safe mode or use populated off mode values */
1419 if (oh->mux)
1420 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
1421
1422 oh->_state = _HWMOD_STATE_DISABLED;
1423
1424 return 0;
1425 }
1426
1427 /**
1428 * _setup - do initial configuration of omap_hwmod
1429 * @oh: struct omap_hwmod *
1430 *
1431 * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
1432 * OCP_SYSCONFIG register. Returns 0.
1433 */
1434 static int _setup(struct omap_hwmod *oh, void *data)
1435 {
1436 int i, r;
1437 u8 postsetup_state;
1438
1439 if (oh->_state != _HWMOD_STATE_CLKS_INITED)
1440 return 0;
1441
1442 /* Set iclk autoidle mode */
1443 if (oh->slaves_cnt > 0) {
1444 for (i = 0; i < oh->slaves_cnt; i++) {
1445 struct omap_hwmod_ocp_if *os = oh->slaves[i];
1446 struct clk *c = os->_clk;
1447
1448 if (!c)
1449 continue;
1450
1451 if (os->flags & OCPIF_SWSUP_IDLE) {
1452 /* XXX omap_iclk_deny_idle(c); */
1453 } else {
1454 /* XXX omap_iclk_allow_idle(c); */
1455 clk_enable(c);
1456 }
1457 }
1458 }
1459
1460 oh->_state = _HWMOD_STATE_INITIALIZED;
1461
1462 /*
1463 * In the case of hwmod with hardreset that should not be
1464 * de-assert at boot time, we have to keep the module
1465 * initialized, because we cannot enable it properly with the
1466 * reset asserted. Exit without warning because that behavior is
1467 * expected.
1468 */
1469 if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1470 return 0;
1471
1472 r = _enable(oh);
1473 if (r) {
1474 pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1475 oh->name, oh->_state);
1476 return 0;
1477 }
1478
1479 if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
1480 _reset(oh);
1481
1482 /*
1483 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
1484 * The _enable() function should be split to
1485 * avoid the rewrite of the OCP_SYSCONFIG register.
1486 */
1487 if (oh->class->sysc) {
1488 _update_sysc_cache(oh);
1489 _enable_sysc(oh);
1490 }
1491 }
1492
1493 postsetup_state = oh->_postsetup_state;
1494 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1495 postsetup_state = _HWMOD_STATE_ENABLED;
1496
1497 /*
1498 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1499 * it should be set by the core code as a runtime flag during startup
1500 */
1501 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1502 (postsetup_state == _HWMOD_STATE_IDLE))
1503 postsetup_state = _HWMOD_STATE_ENABLED;
1504
1505 if (postsetup_state == _HWMOD_STATE_IDLE)
1506 _idle(oh);
1507 else if (postsetup_state == _HWMOD_STATE_DISABLED)
1508 _shutdown(oh);
1509 else if (postsetup_state != _HWMOD_STATE_ENABLED)
1510 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1511 oh->name, postsetup_state);
1512
1513 return 0;
1514 }
1515
1516 /**
1517 * _register - register a struct omap_hwmod
1518 * @oh: struct omap_hwmod *
1519 *
1520 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
1521 * already has been registered by the same name; -EINVAL if the
1522 * omap_hwmod is in the wrong state, if @oh is NULL, if the
1523 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1524 * name, or if the omap_hwmod's class is missing a name; or 0 upon
1525 * success.
1526 *
1527 * XXX The data should be copied into bootmem, so the original data
1528 * should be marked __initdata and freed after init. This would allow
1529 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
1530 * that the copy process would be relatively complex due to the large number
1531 * of substructures.
1532 */
1533 static int __init _register(struct omap_hwmod *oh)
1534 {
1535 int ms_id;
1536
1537 if (!oh || !oh->name || !oh->class || !oh->class->name ||
1538 (oh->_state != _HWMOD_STATE_UNKNOWN))
1539 return -EINVAL;
1540
1541 pr_debug("omap_hwmod: %s: registering\n", oh->name);
1542
1543 if (_lookup(oh->name))
1544 return -EEXIST;
1545
1546 ms_id = _find_mpu_port_index(oh);
1547 if (!IS_ERR_VALUE(ms_id))
1548 oh->_mpu_port_index = ms_id;
1549 else
1550 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1551
1552 list_add_tail(&oh->node, &omap_hwmod_list);
1553
1554 spin_lock_init(&oh->_lock);
1555
1556 oh->_state = _HWMOD_STATE_REGISTERED;
1557
1558 /*
1559 * XXX Rather than doing a strcmp(), this should test a flag
1560 * set in the hwmod data, inserted by the autogenerator code.
1561 */
1562 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
1563 mpu_oh = oh;
1564
1565 return 0;
1566 }
1567
1568
1569 /* Public functions */
1570
1571 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1572 {
1573 if (oh->flags & HWMOD_16BIT_REG)
1574 return __raw_readw(oh->_mpu_rt_va + reg_offs);
1575 else
1576 return __raw_readl(oh->_mpu_rt_va + reg_offs);
1577 }
1578
1579 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1580 {
1581 if (oh->flags & HWMOD_16BIT_REG)
1582 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
1583 else
1584 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
1585 }
1586
1587 /**
1588 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1589 * @oh: struct omap_hwmod *
1590 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1591 *
1592 * Sets the IP block's OCP slave idlemode in hardware, and updates our
1593 * local copy. Intended to be used by drivers that have some erratum
1594 * that requires direct manipulation of the SIDLEMODE bits. Returns
1595 * -EINVAL if @oh is null, or passes along the return value from
1596 * _set_slave_idlemode().
1597 *
1598 * XXX Does this function have any current users? If not, we should
1599 * remove it; it is better to let the rest of the hwmod code handle this.
1600 * Any users of this function should be scrutinized carefully.
1601 */
1602 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1603 {
1604 u32 v;
1605 int retval = 0;
1606
1607 if (!oh)
1608 return -EINVAL;
1609
1610 v = oh->_sysc_cache;
1611
1612 retval = _set_slave_idlemode(oh, idlemode, &v);
1613 if (!retval)
1614 _write_sysconfig(v, oh);
1615
1616 return retval;
1617 }
1618
1619 /**
1620 * omap_hwmod_lookup - look up a registered omap_hwmod by name
1621 * @name: name of the omap_hwmod to look up
1622 *
1623 * Given a @name of an omap_hwmod, return a pointer to the registered
1624 * struct omap_hwmod *, or NULL upon error.
1625 */
1626 struct omap_hwmod *omap_hwmod_lookup(const char *name)
1627 {
1628 struct omap_hwmod *oh;
1629
1630 if (!name)
1631 return NULL;
1632
1633 oh = _lookup(name);
1634
1635 return oh;
1636 }
1637
1638 /**
1639 * omap_hwmod_for_each - call function for each registered omap_hwmod
1640 * @fn: pointer to a callback function
1641 * @data: void * data to pass to callback function
1642 *
1643 * Call @fn for each registered omap_hwmod, passing @data to each
1644 * function. @fn must return 0 for success or any other value for
1645 * failure. If @fn returns non-zero, the iteration across omap_hwmods
1646 * will stop and the non-zero return value will be passed to the
1647 * caller of omap_hwmod_for_each(). @fn is called with
1648 * omap_hwmod_for_each() held.
1649 */
1650 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1651 void *data)
1652 {
1653 struct omap_hwmod *temp_oh;
1654 int ret = 0;
1655
1656 if (!fn)
1657 return -EINVAL;
1658
1659 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1660 ret = (*fn)(temp_oh, data);
1661 if (ret)
1662 break;
1663 }
1664
1665 return ret;
1666 }
1667
1668 /**
1669 * omap_hwmod_register - register an array of hwmods
1670 * @ohs: pointer to an array of omap_hwmods to register
1671 *
1672 * Intended to be called early in boot before the clock framework is
1673 * initialized. If @ohs is not null, will register all omap_hwmods
1674 * listed in @ohs that are valid for this chip. Returns 0.
1675 */
1676 int __init omap_hwmod_register(struct omap_hwmod **ohs)
1677 {
1678 int r, i;
1679
1680 if (!ohs)
1681 return 0;
1682
1683 i = 0;
1684 do {
1685 if (!omap_chip_is(ohs[i]->omap_chip))
1686 continue;
1687
1688 r = _register(ohs[i]);
1689 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
1690 r);
1691 } while (ohs[++i]);
1692
1693 return 0;
1694 }
1695
1696 /*
1697 * _populate_mpu_rt_base - populate the virtual address for a hwmod
1698 *
1699 * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
1700 * Assumes the caller takes care of locking if needed.
1701 */
1702 static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
1703 {
1704 if (oh->_state != _HWMOD_STATE_REGISTERED)
1705 return 0;
1706
1707 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1708 return 0;
1709
1710 oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
1711
1712 return 0;
1713 }
1714
1715 /**
1716 * omap_hwmod_setup_one - set up a single hwmod
1717 * @oh_name: const char * name of the already-registered hwmod to set up
1718 *
1719 * Must be called after omap2_clk_init(). Resolves the struct clk
1720 * names to struct clk pointers for each registered omap_hwmod. Also
1721 * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
1722 * success.
1723 */
1724 int __init omap_hwmod_setup_one(const char *oh_name)
1725 {
1726 struct omap_hwmod *oh;
1727 int r;
1728
1729 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
1730
1731 if (!mpu_oh) {
1732 pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
1733 oh_name, MPU_INITIATOR_NAME);
1734 return -EINVAL;
1735 }
1736
1737 oh = _lookup(oh_name);
1738 if (!oh) {
1739 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
1740 return -EINVAL;
1741 }
1742
1743 if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
1744 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
1745
1746 r = _populate_mpu_rt_base(oh, NULL);
1747 if (IS_ERR_VALUE(r)) {
1748 WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
1749 return -EINVAL;
1750 }
1751
1752 r = _init_clocks(oh, NULL);
1753 if (IS_ERR_VALUE(r)) {
1754 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
1755 return -EINVAL;
1756 }
1757
1758 _setup(oh, NULL);
1759
1760 return 0;
1761 }
1762
1763 /**
1764 * omap_hwmod_setup - do some post-clock framework initialization
1765 *
1766 * Must be called after omap2_clk_init(). Resolves the struct clk names
1767 * to struct clk pointers for each registered omap_hwmod. Also calls
1768 * _setup() on each hwmod. Returns 0 upon success.
1769 */
1770 static int __init omap_hwmod_setup_all(void)
1771 {
1772 int r;
1773
1774 if (!mpu_oh) {
1775 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
1776 __func__, MPU_INITIATOR_NAME);
1777 return -EINVAL;
1778 }
1779
1780 r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
1781
1782 r = omap_hwmod_for_each(_init_clocks, NULL);
1783 WARN(IS_ERR_VALUE(r),
1784 "omap_hwmod: %s: _init_clocks failed\n", __func__);
1785
1786 omap_hwmod_for_each(_setup, NULL);
1787
1788 return 0;
1789 }
1790 core_initcall(omap_hwmod_setup_all);
1791
1792 /**
1793 * omap_hwmod_enable - enable an omap_hwmod
1794 * @oh: struct omap_hwmod *
1795 *
1796 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
1797 * Returns -EINVAL on error or passes along the return value from _enable().
1798 */
1799 int omap_hwmod_enable(struct omap_hwmod *oh)
1800 {
1801 int r;
1802 unsigned long flags;
1803
1804 if (!oh)
1805 return -EINVAL;
1806
1807 spin_lock_irqsave(&oh->_lock, flags);
1808 r = _enable(oh);
1809 spin_unlock_irqrestore(&oh->_lock, flags);
1810
1811 return r;
1812 }
1813
1814 /**
1815 * omap_hwmod_idle - idle an omap_hwmod
1816 * @oh: struct omap_hwmod *
1817 *
1818 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
1819 * Returns -EINVAL on error or passes along the return value from _idle().
1820 */
1821 int omap_hwmod_idle(struct omap_hwmod *oh)
1822 {
1823 unsigned long flags;
1824
1825 if (!oh)
1826 return -EINVAL;
1827
1828 spin_lock_irqsave(&oh->_lock, flags);
1829 _idle(oh);
1830 spin_unlock_irqrestore(&oh->_lock, flags);
1831
1832 return 0;
1833 }
1834
1835 /**
1836 * omap_hwmod_shutdown - shutdown an omap_hwmod
1837 * @oh: struct omap_hwmod *
1838 *
1839 * Shutdown an omap_hwmod @oh. Intended to be called by
1840 * omap_device_shutdown(). Returns -EINVAL on error or passes along
1841 * the return value from _shutdown().
1842 */
1843 int omap_hwmod_shutdown(struct omap_hwmod *oh)
1844 {
1845 unsigned long flags;
1846
1847 if (!oh)
1848 return -EINVAL;
1849
1850 spin_lock_irqsave(&oh->_lock, flags);
1851 _shutdown(oh);
1852 spin_unlock_irqrestore(&oh->_lock, flags);
1853
1854 return 0;
1855 }
1856
1857 /**
1858 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1859 * @oh: struct omap_hwmod *oh
1860 *
1861 * Intended to be called by the omap_device code.
1862 */
1863 int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1864 {
1865 unsigned long flags;
1866
1867 spin_lock_irqsave(&oh->_lock, flags);
1868 _enable_clocks(oh);
1869 spin_unlock_irqrestore(&oh->_lock, flags);
1870
1871 return 0;
1872 }
1873
1874 /**
1875 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1876 * @oh: struct omap_hwmod *oh
1877 *
1878 * Intended to be called by the omap_device code.
1879 */
1880 int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1881 {
1882 unsigned long flags;
1883
1884 spin_lock_irqsave(&oh->_lock, flags);
1885 _disable_clocks(oh);
1886 spin_unlock_irqrestore(&oh->_lock, flags);
1887
1888 return 0;
1889 }
1890
1891 /**
1892 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1893 * @oh: struct omap_hwmod *oh
1894 *
1895 * Intended to be called by drivers and core code when all posted
1896 * writes to a device must complete before continuing further
1897 * execution (for example, after clearing some device IRQSTATUS
1898 * register bits)
1899 *
1900 * XXX what about targets with multiple OCP threads?
1901 */
1902 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1903 {
1904 BUG_ON(!oh);
1905
1906 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
1907 WARN(1, "omap_device: %s: OCP barrier impossible due to "
1908 "device configuration\n", oh->name);
1909 return;
1910 }
1911
1912 /*
1913 * Forces posted writes to complete on the OCP thread handling
1914 * register writes
1915 */
1916 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
1917 }
1918
1919 /**
1920 * omap_hwmod_reset - reset the hwmod
1921 * @oh: struct omap_hwmod *
1922 *
1923 * Under some conditions, a driver may wish to reset the entire device.
1924 * Called from omap_device code. Returns -EINVAL on error or passes along
1925 * the return value from _reset().
1926 */
1927 int omap_hwmod_reset(struct omap_hwmod *oh)
1928 {
1929 int r;
1930 unsigned long flags;
1931
1932 if (!oh)
1933 return -EINVAL;
1934
1935 spin_lock_irqsave(&oh->_lock, flags);
1936 r = _reset(oh);
1937 spin_unlock_irqrestore(&oh->_lock, flags);
1938
1939 return r;
1940 }
1941
1942 /**
1943 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1944 * @oh: struct omap_hwmod *
1945 * @res: pointer to the first element of an array of struct resource to fill
1946 *
1947 * Count the number of struct resource array elements necessary to
1948 * contain omap_hwmod @oh resources. Intended to be called by code
1949 * that registers omap_devices. Intended to be used to determine the
1950 * size of a dynamically-allocated struct resource array, before
1951 * calling omap_hwmod_fill_resources(). Returns the number of struct
1952 * resource array elements needed.
1953 *
1954 * XXX This code is not optimized. It could attempt to merge adjacent
1955 * resource IDs.
1956 *
1957 */
1958 int omap_hwmod_count_resources(struct omap_hwmod *oh)
1959 {
1960 int ret, i;
1961
1962 ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
1963
1964 for (i = 0; i < oh->slaves_cnt; i++)
1965 ret += oh->slaves[i]->addr_cnt;
1966
1967 return ret;
1968 }
1969
1970 /**
1971 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1972 * @oh: struct omap_hwmod *
1973 * @res: pointer to the first element of an array of struct resource to fill
1974 *
1975 * Fill the struct resource array @res with resource data from the
1976 * omap_hwmod @oh. Intended to be called by code that registers
1977 * omap_devices. See also omap_hwmod_count_resources(). Returns the
1978 * number of array elements filled.
1979 */
1980 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1981 {
1982 int i, j;
1983 int r = 0;
1984
1985 /* For each IRQ, DMA, memory area, fill in array.*/
1986
1987 for (i = 0; i < oh->mpu_irqs_cnt; i++) {
1988 (res + r)->name = (oh->mpu_irqs + i)->name;
1989 (res + r)->start = (oh->mpu_irqs + i)->irq;
1990 (res + r)->end = (oh->mpu_irqs + i)->irq;
1991 (res + r)->flags = IORESOURCE_IRQ;
1992 r++;
1993 }
1994
1995 for (i = 0; i < oh->sdma_reqs_cnt; i++) {
1996 (res + r)->name = (oh->sdma_reqs + i)->name;
1997 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
1998 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
1999 (res + r)->flags = IORESOURCE_DMA;
2000 r++;
2001 }
2002
2003 for (i = 0; i < oh->slaves_cnt; i++) {
2004 struct omap_hwmod_ocp_if *os;
2005
2006 os = oh->slaves[i];
2007
2008 for (j = 0; j < os->addr_cnt; j++) {
2009 (res + r)->name = (os->addr + j)->name;
2010 (res + r)->start = (os->addr + j)->pa_start;
2011 (res + r)->end = (os->addr + j)->pa_end;
2012 (res + r)->flags = IORESOURCE_MEM;
2013 r++;
2014 }
2015 }
2016
2017 return r;
2018 }
2019
2020 /**
2021 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2022 * @oh: struct omap_hwmod *
2023 *
2024 * Return the powerdomain pointer associated with the OMAP module
2025 * @oh's main clock. If @oh does not have a main clk, return the
2026 * powerdomain associated with the interface clock associated with the
2027 * module's MPU port. (XXX Perhaps this should use the SDMA port
2028 * instead?) Returns NULL on error, or a struct powerdomain * on
2029 * success.
2030 */
2031 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2032 {
2033 struct clk *c;
2034
2035 if (!oh)
2036 return NULL;
2037
2038 if (oh->_clk) {
2039 c = oh->_clk;
2040 } else {
2041 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2042 return NULL;
2043 c = oh->slaves[oh->_mpu_port_index]->_clk;
2044 }
2045
2046 if (!c->clkdm)
2047 return NULL;
2048
2049 return c->clkdm->pwrdm.ptr;
2050
2051 }
2052
2053 /**
2054 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2055 * @oh: struct omap_hwmod *
2056 *
2057 * Returns the virtual address corresponding to the beginning of the
2058 * module's register target, in the address range that is intended to
2059 * be used by the MPU. Returns the virtual address upon success or NULL
2060 * upon error.
2061 */
2062 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2063 {
2064 if (!oh)
2065 return NULL;
2066
2067 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2068 return NULL;
2069
2070 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2071 return NULL;
2072
2073 return oh->_mpu_rt_va;
2074 }
2075
2076 /**
2077 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2078 * @oh: struct omap_hwmod *
2079 * @init_oh: struct omap_hwmod * (initiator)
2080 *
2081 * Add a sleep dependency between the initiator @init_oh and @oh.
2082 * Intended to be called by DSP/Bridge code via platform_data for the
2083 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2084 * code needs to add/del initiator dependencies dynamically
2085 * before/after accessing a device. Returns the return value from
2086 * _add_initiator_dep().
2087 *
2088 * XXX Keep a usecount in the clockdomain code
2089 */
2090 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2091 struct omap_hwmod *init_oh)
2092 {
2093 return _add_initiator_dep(oh, init_oh);
2094 }
2095
2096 /*
2097 * XXX what about functions for drivers to save/restore ocp_sysconfig
2098 * for context save/restore operations?
2099 */
2100
2101 /**
2102 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2103 * @oh: struct omap_hwmod *
2104 * @init_oh: struct omap_hwmod * (initiator)
2105 *
2106 * Remove a sleep dependency between the initiator @init_oh and @oh.
2107 * Intended to be called by DSP/Bridge code via platform_data for the
2108 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2109 * code needs to add/del initiator dependencies dynamically
2110 * before/after accessing a device. Returns the return value from
2111 * _del_initiator_dep().
2112 *
2113 * XXX Keep a usecount in the clockdomain code
2114 */
2115 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2116 struct omap_hwmod *init_oh)
2117 {
2118 return _del_initiator_dep(oh, init_oh);
2119 }
2120
2121 /**
2122 * omap_hwmod_enable_wakeup - allow device to wake up the system
2123 * @oh: struct omap_hwmod *
2124 *
2125 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2126 * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
2127 * registers to cause the PRCM to receive wakeup events from the
2128 * module. Does not set any wakeup routing registers beyond this
2129 * point - if the module is to wake up any other module or subsystem,
2130 * that must be set separately. Called by omap_device code. Returns
2131 * -EINVAL on error or 0 upon success.
2132 */
2133 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2134 {
2135 unsigned long flags;
2136 u32 v;
2137
2138 if (!oh->class->sysc ||
2139 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2140 return -EINVAL;
2141
2142 spin_lock_irqsave(&oh->_lock, flags);
2143 v = oh->_sysc_cache;
2144 _enable_wakeup(oh, &v);
2145 _write_sysconfig(v, oh);
2146 spin_unlock_irqrestore(&oh->_lock, flags);
2147
2148 return 0;
2149 }
2150
2151 /**
2152 * omap_hwmod_disable_wakeup - prevent device from waking the system
2153 * @oh: struct omap_hwmod *
2154 *
2155 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2156 * from sending wakeups to the PRCM. Eventually this should clear
2157 * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2158 * from the module. Does not set any wakeup routing registers beyond
2159 * this point - if the module is to wake up any other module or
2160 * subsystem, that must be set separately. Called by omap_device
2161 * code. Returns -EINVAL on error or 0 upon success.
2162 */
2163 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2164 {
2165 unsigned long flags;
2166 u32 v;
2167
2168 if (!oh->class->sysc ||
2169 !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2170 return -EINVAL;
2171
2172 spin_lock_irqsave(&oh->_lock, flags);
2173 v = oh->_sysc_cache;
2174 _disable_wakeup(oh, &v);
2175 _write_sysconfig(v, oh);
2176 spin_unlock_irqrestore(&oh->_lock, flags);
2177
2178 return 0;
2179 }
2180
2181 /**
2182 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2183 * contained in the hwmod module.
2184 * @oh: struct omap_hwmod *
2185 * @name: name of the reset line to lookup and assert
2186 *
2187 * Some IP like dsp, ipu or iva contain processor that require
2188 * an HW reset line to be assert / deassert in order to enable fully
2189 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2190 * yet supported on this OMAP; otherwise, passes along the return value
2191 * from _assert_hardreset().
2192 */
2193 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2194 {
2195 int ret;
2196 unsigned long flags;
2197
2198 if (!oh)
2199 return -EINVAL;
2200
2201 spin_lock_irqsave(&oh->_lock, flags);
2202 ret = _assert_hardreset(oh, name);
2203 spin_unlock_irqrestore(&oh->_lock, flags);
2204
2205 return ret;
2206 }
2207
2208 /**
2209 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2210 * contained in the hwmod module.
2211 * @oh: struct omap_hwmod *
2212 * @name: name of the reset line to look up and deassert
2213 *
2214 * Some IP like dsp, ipu or iva contain processor that require
2215 * an HW reset line to be assert / deassert in order to enable fully
2216 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2217 * yet supported on this OMAP; otherwise, passes along the return value
2218 * from _deassert_hardreset().
2219 */
2220 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2221 {
2222 int ret;
2223 unsigned long flags;
2224
2225 if (!oh)
2226 return -EINVAL;
2227
2228 spin_lock_irqsave(&oh->_lock, flags);
2229 ret = _deassert_hardreset(oh, name);
2230 spin_unlock_irqrestore(&oh->_lock, flags);
2231
2232 return ret;
2233 }
2234
2235 /**
2236 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2237 * contained in the hwmod module
2238 * @oh: struct omap_hwmod *
2239 * @name: name of the reset line to look up and read
2240 *
2241 * Return the current state of the hwmod @oh's reset line named @name:
2242 * returns -EINVAL upon parameter error or if this operation
2243 * is unsupported on the current OMAP; otherwise, passes along the return
2244 * value from _read_hardreset().
2245 */
2246 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2247 {
2248 int ret;
2249 unsigned long flags;
2250
2251 if (!oh)
2252 return -EINVAL;
2253
2254 spin_lock_irqsave(&oh->_lock, flags);
2255 ret = _read_hardreset(oh, name);
2256 spin_unlock_irqrestore(&oh->_lock, flags);
2257
2258 return ret;
2259 }
2260
2261
2262 /**
2263 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2264 * @classname: struct omap_hwmod_class name to search for
2265 * @fn: callback function pointer to call for each hwmod in class @classname
2266 * @user: arbitrary context data to pass to the callback function
2267 *
2268 * For each omap_hwmod of class @classname, call @fn.
2269 * If the callback function returns something other than
2270 * zero, the iterator is terminated, and the callback function's return
2271 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2272 * if @classname or @fn are NULL, or passes back the error code from @fn.
2273 */
2274 int omap_hwmod_for_each_by_class(const char *classname,
2275 int (*fn)(struct omap_hwmod *oh,
2276 void *user),
2277 void *user)
2278 {
2279 struct omap_hwmod *temp_oh;
2280 int ret = 0;
2281
2282 if (!classname || !fn)
2283 return -EINVAL;
2284
2285 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2286 __func__, classname);
2287
2288 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2289 if (!strcmp(temp_oh->class->name, classname)) {
2290 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2291 __func__, temp_oh->name);
2292 ret = (*fn)(temp_oh, user);
2293 if (ret)
2294 break;
2295 }
2296 }
2297
2298 if (ret)
2299 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2300 __func__, ret);
2301
2302 return ret;
2303 }
2304
2305 /**
2306 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2307 * @oh: struct omap_hwmod *
2308 * @state: state that _setup() should leave the hwmod in
2309 *
2310 * Sets the hwmod state that @oh will enter at the end of _setup()
2311 * (called by omap_hwmod_setup_*()). Only valid to call between
2312 * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
2313 * 0 upon success or -EINVAL if there is a problem with the arguments
2314 * or if the hwmod is in the wrong state.
2315 */
2316 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2317 {
2318 int ret;
2319 unsigned long flags;
2320
2321 if (!oh)
2322 return -EINVAL;
2323
2324 if (state != _HWMOD_STATE_DISABLED &&
2325 state != _HWMOD_STATE_ENABLED &&
2326 state != _HWMOD_STATE_IDLE)
2327 return -EINVAL;
2328
2329 spin_lock_irqsave(&oh->_lock, flags);
2330
2331 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2332 ret = -EINVAL;
2333 goto ohsps_unlock;
2334 }
2335
2336 oh->_postsetup_state = state;
2337 ret = 0;
2338
2339 ohsps_unlock:
2340 spin_unlock_irqrestore(&oh->_lock, flags);
2341
2342 return ret;
2343 }
2344
2345 /**
2346 * omap_hwmod_get_context_loss_count - get lost context count
2347 * @oh: struct omap_hwmod *
2348 *
2349 * Query the powerdomain of of @oh to get the context loss
2350 * count for this device.
2351 *
2352 * Returns the context loss count of the powerdomain assocated with @oh
2353 * upon success, or zero if no powerdomain exists for @oh.
2354 */
2355 u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2356 {
2357 struct powerdomain *pwrdm;
2358 int ret = 0;
2359
2360 pwrdm = omap_hwmod_get_pwrdm(oh);
2361 if (pwrdm)
2362 ret = pwrdm_get_context_loss_count(pwrdm);
2363
2364 return ret;
2365 }
2366
2367 /**
2368 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
2369 * @oh: struct omap_hwmod *
2370 *
2371 * Prevent the hwmod @oh from being reset during the setup process.
2372 * Intended for use by board-*.c files on boards with devices that
2373 * cannot tolerate being reset. Must be called before the hwmod has
2374 * been set up. Returns 0 upon success or negative error code upon
2375 * failure.
2376 */
2377 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
2378 {
2379 if (!oh)
2380 return -EINVAL;
2381
2382 if (oh->_state != _HWMOD_STATE_REGISTERED) {
2383 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
2384 oh->name);
2385 return -EINVAL;
2386 }
2387
2388 oh->flags |= HWMOD_INIT_NO_RESET;
2389
2390 return 0;
2391 }
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