ARM: OMAP2+: hwmod: extend OCP_* register offsets from 16 to 32 bits
[deliverable/linux.git] / arch / arm / mach-omap2 / omap_hwmod.c
1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128 #undef DEBUG
129
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk.h>
134 #include <linux/delay.h>
135 #include <linux/err.h>
136 #include <linux/list.h>
137 #include <linux/mutex.h>
138 #include <linux/spinlock.h>
139 #include <linux/slab.h>
140
141 #include "common.h"
142 #include <plat/cpu.h>
143 #include "clockdomain.h"
144 #include "powerdomain.h"
145 #include <plat/clock.h>
146 #include <plat/omap_hwmod.h>
147 #include <plat/prcm.h>
148
149 #include "cm2xxx_3xxx.h"
150 #include "cminst44xx.h"
151 #include "prm2xxx_3xxx.h"
152 #include "prm44xx.h"
153 #include "prminst44xx.h"
154 #include "mux.h"
155
156 /* Maximum microseconds to wait for OMAP module to softreset */
157 #define MAX_MODULE_SOFTRESET_WAIT 10000
158
159 /* Name of the OMAP hwmod for the MPU */
160 #define MPU_INITIATOR_NAME "mpu"
161
162 /* omap_hwmod_list contains all registered struct omap_hwmods */
163 static LIST_HEAD(omap_hwmod_list);
164
165 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
166 static struct omap_hwmod *mpu_oh;
167
168
169 /* Private functions */
170
171 /**
172 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
173 * @oh: struct omap_hwmod *
174 *
175 * Load the current value of the hwmod OCP_SYSCONFIG register into the
176 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
177 * OCP_SYSCONFIG register or 0 upon success.
178 */
179 static int _update_sysc_cache(struct omap_hwmod *oh)
180 {
181 if (!oh->class->sysc) {
182 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
183 return -EINVAL;
184 }
185
186 /* XXX ensure module interface clock is up */
187
188 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
189
190 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
191 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
192
193 return 0;
194 }
195
196 /**
197 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
198 * @v: OCP_SYSCONFIG value to write
199 * @oh: struct omap_hwmod *
200 *
201 * Write @v into the module class' OCP_SYSCONFIG register, if it has
202 * one. No return value.
203 */
204 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
205 {
206 if (!oh->class->sysc) {
207 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
208 return;
209 }
210
211 /* XXX ensure module interface clock is up */
212
213 /* Module might have lost context, always update cache and register */
214 oh->_sysc_cache = v;
215 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
216 }
217
218 /**
219 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
220 * @oh: struct omap_hwmod *
221 * @standbymode: MIDLEMODE field bits
222 * @v: pointer to register contents to modify
223 *
224 * Update the master standby mode bits in @v to be @standbymode for
225 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
226 * upon error or 0 upon success.
227 */
228 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
229 u32 *v)
230 {
231 u32 mstandby_mask;
232 u8 mstandby_shift;
233
234 if (!oh->class->sysc ||
235 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
236 return -EINVAL;
237
238 if (!oh->class->sysc->sysc_fields) {
239 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
240 return -EINVAL;
241 }
242
243 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
244 mstandby_mask = (0x3 << mstandby_shift);
245
246 *v &= ~mstandby_mask;
247 *v |= __ffs(standbymode) << mstandby_shift;
248
249 return 0;
250 }
251
252 /**
253 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
254 * @oh: struct omap_hwmod *
255 * @idlemode: SIDLEMODE field bits
256 * @v: pointer to register contents to modify
257 *
258 * Update the slave idle mode bits in @v to be @idlemode for the @oh
259 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
260 * or 0 upon success.
261 */
262 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
263 {
264 u32 sidle_mask;
265 u8 sidle_shift;
266
267 if (!oh->class->sysc ||
268 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
269 return -EINVAL;
270
271 if (!oh->class->sysc->sysc_fields) {
272 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
273 return -EINVAL;
274 }
275
276 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
277 sidle_mask = (0x3 << sidle_shift);
278
279 *v &= ~sidle_mask;
280 *v |= __ffs(idlemode) << sidle_shift;
281
282 return 0;
283 }
284
285 /**
286 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
287 * @oh: struct omap_hwmod *
288 * @clockact: CLOCKACTIVITY field bits
289 * @v: pointer to register contents to modify
290 *
291 * Update the clockactivity mode bits in @v to be @clockact for the
292 * @oh hwmod. Used for additional powersaving on some modules. Does
293 * not write to the hardware. Returns -EINVAL upon error or 0 upon
294 * success.
295 */
296 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
297 {
298 u32 clkact_mask;
299 u8 clkact_shift;
300
301 if (!oh->class->sysc ||
302 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
303 return -EINVAL;
304
305 if (!oh->class->sysc->sysc_fields) {
306 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
307 return -EINVAL;
308 }
309
310 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
311 clkact_mask = (0x3 << clkact_shift);
312
313 *v &= ~clkact_mask;
314 *v |= clockact << clkact_shift;
315
316 return 0;
317 }
318
319 /**
320 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
321 * @oh: struct omap_hwmod *
322 * @v: pointer to register contents to modify
323 *
324 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
325 * error or 0 upon success.
326 */
327 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
328 {
329 u32 softrst_mask;
330
331 if (!oh->class->sysc ||
332 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
333 return -EINVAL;
334
335 if (!oh->class->sysc->sysc_fields) {
336 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
337 return -EINVAL;
338 }
339
340 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
341
342 *v |= softrst_mask;
343
344 return 0;
345 }
346
347 /**
348 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
349 * @oh: struct omap_hwmod *
350 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
351 * @v: pointer to register contents to modify
352 *
353 * Update the module autoidle bit in @v to be @autoidle for the @oh
354 * hwmod. The autoidle bit controls whether the module can gate
355 * internal clocks automatically when it isn't doing anything; the
356 * exact function of this bit varies on a per-module basis. This
357 * function does not write to the hardware. Returns -EINVAL upon
358 * error or 0 upon success.
359 */
360 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
361 u32 *v)
362 {
363 u32 autoidle_mask;
364 u8 autoidle_shift;
365
366 if (!oh->class->sysc ||
367 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
368 return -EINVAL;
369
370 if (!oh->class->sysc->sysc_fields) {
371 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
372 return -EINVAL;
373 }
374
375 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
376 autoidle_mask = (0x1 << autoidle_shift);
377
378 *v &= ~autoidle_mask;
379 *v |= autoidle << autoidle_shift;
380
381 return 0;
382 }
383
384 /**
385 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
386 * @oh: struct omap_hwmod *
387 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
388 *
389 * Set or clear the I/O pad wakeup flag in the mux entries for the
390 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
391 * in memory. If the hwmod is currently idled, and the new idle
392 * values don't match the previous ones, this function will also
393 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
394 * currently idled, this function won't touch the hardware: the new
395 * mux settings are written to the SCM PADCTRL registers when the
396 * hwmod is idled. No return value.
397 */
398 static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
399 {
400 struct omap_device_pad *pad;
401 bool change = false;
402 u16 prev_idle;
403 int j;
404
405 if (!oh->mux || !oh->mux->enabled)
406 return;
407
408 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
409 pad = oh->mux->pads_dynamic[j];
410
411 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
412 continue;
413
414 prev_idle = pad->idle;
415
416 if (set_wake)
417 pad->idle |= OMAP_WAKEUP_EN;
418 else
419 pad->idle &= ~OMAP_WAKEUP_EN;
420
421 if (prev_idle != pad->idle)
422 change = true;
423 }
424
425 if (change && oh->_state == _HWMOD_STATE_IDLE)
426 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
427 }
428
429 /**
430 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
431 * @oh: struct omap_hwmod *
432 *
433 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
434 * upon error or 0 upon success.
435 */
436 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
437 {
438 if (!oh->class->sysc ||
439 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
440 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
441 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
442 return -EINVAL;
443
444 if (!oh->class->sysc->sysc_fields) {
445 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
446 return -EINVAL;
447 }
448
449 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
450 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
451
452 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
453 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
454 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
455 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
456
457 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
458
459 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
460
461 return 0;
462 }
463
464 /**
465 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
466 * @oh: struct omap_hwmod *
467 *
468 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
469 * upon error or 0 upon success.
470 */
471 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
472 {
473 if (!oh->class->sysc ||
474 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
475 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
476 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
477 return -EINVAL;
478
479 if (!oh->class->sysc->sysc_fields) {
480 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
481 return -EINVAL;
482 }
483
484 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
485 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
486
487 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
488 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
489 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
490 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
491
492 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
493
494 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
495
496 return 0;
497 }
498
499 /**
500 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
501 * @oh: struct omap_hwmod *
502 *
503 * Prevent the hardware module @oh from entering idle while the
504 * hardare module initiator @init_oh is active. Useful when a module
505 * will be accessed by a particular initiator (e.g., if a module will
506 * be accessed by the IVA, there should be a sleepdep between the IVA
507 * initiator and the module). Only applies to modules in smart-idle
508 * mode. If the clockdomain is marked as not needing autodeps, return
509 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
510 * passes along clkdm_add_sleepdep() value upon success.
511 */
512 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
513 {
514 if (!oh->_clk)
515 return -EINVAL;
516
517 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
518 return 0;
519
520 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
521 }
522
523 /**
524 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
525 * @oh: struct omap_hwmod *
526 *
527 * Allow the hardware module @oh to enter idle while the hardare
528 * module initiator @init_oh is active. Useful when a module will not
529 * be accessed by a particular initiator (e.g., if a module will not
530 * be accessed by the IVA, there should be no sleepdep between the IVA
531 * initiator and the module). Only applies to modules in smart-idle
532 * mode. If the clockdomain is marked as not needing autodeps, return
533 * 0 without doing anything. Returns -EINVAL upon error or passes
534 * along clkdm_del_sleepdep() value upon success.
535 */
536 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
537 {
538 if (!oh->_clk)
539 return -EINVAL;
540
541 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
542 return 0;
543
544 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
545 }
546
547 /**
548 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
549 * @oh: struct omap_hwmod *
550 *
551 * Called from _init_clocks(). Populates the @oh _clk (main
552 * functional clock pointer) if a main_clk is present. Returns 0 on
553 * success or -EINVAL on error.
554 */
555 static int _init_main_clk(struct omap_hwmod *oh)
556 {
557 int ret = 0;
558
559 if (!oh->main_clk)
560 return 0;
561
562 oh->_clk = omap_clk_get_by_name(oh->main_clk);
563 if (!oh->_clk) {
564 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
565 oh->name, oh->main_clk);
566 return -EINVAL;
567 }
568
569 if (!oh->_clk->clkdm)
570 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
571 oh->main_clk, oh->_clk->name);
572
573 return ret;
574 }
575
576 /**
577 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
578 * @oh: struct omap_hwmod *
579 *
580 * Called from _init_clocks(). Populates the @oh OCP slave interface
581 * clock pointers. Returns 0 on success or -EINVAL on error.
582 */
583 static int _init_interface_clks(struct omap_hwmod *oh)
584 {
585 struct clk *c;
586 int i;
587 int ret = 0;
588
589 if (oh->slaves_cnt == 0)
590 return 0;
591
592 for (i = 0; i < oh->slaves_cnt; i++) {
593 struct omap_hwmod_ocp_if *os = oh->slaves[i];
594
595 if (!os->clk)
596 continue;
597
598 c = omap_clk_get_by_name(os->clk);
599 if (!c) {
600 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
601 oh->name, os->clk);
602 ret = -EINVAL;
603 }
604 os->_clk = c;
605 }
606
607 return ret;
608 }
609
610 /**
611 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
612 * @oh: struct omap_hwmod *
613 *
614 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
615 * clock pointers. Returns 0 on success or -EINVAL on error.
616 */
617 static int _init_opt_clks(struct omap_hwmod *oh)
618 {
619 struct omap_hwmod_opt_clk *oc;
620 struct clk *c;
621 int i;
622 int ret = 0;
623
624 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
625 c = omap_clk_get_by_name(oc->clk);
626 if (!c) {
627 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
628 oh->name, oc->clk);
629 ret = -EINVAL;
630 }
631 oc->_clk = c;
632 }
633
634 return ret;
635 }
636
637 /**
638 * _enable_clocks - enable hwmod main clock and interface clocks
639 * @oh: struct omap_hwmod *
640 *
641 * Enables all clocks necessary for register reads and writes to succeed
642 * on the hwmod @oh. Returns 0.
643 */
644 static int _enable_clocks(struct omap_hwmod *oh)
645 {
646 int i;
647
648 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
649
650 if (oh->_clk)
651 clk_enable(oh->_clk);
652
653 if (oh->slaves_cnt > 0) {
654 for (i = 0; i < oh->slaves_cnt; i++) {
655 struct omap_hwmod_ocp_if *os = oh->slaves[i];
656 struct clk *c = os->_clk;
657
658 if (c && (os->flags & OCPIF_SWSUP_IDLE))
659 clk_enable(c);
660 }
661 }
662
663 /* The opt clocks are controlled by the device driver. */
664
665 return 0;
666 }
667
668 /**
669 * _disable_clocks - disable hwmod main clock and interface clocks
670 * @oh: struct omap_hwmod *
671 *
672 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
673 */
674 static int _disable_clocks(struct omap_hwmod *oh)
675 {
676 int i;
677
678 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
679
680 if (oh->_clk)
681 clk_disable(oh->_clk);
682
683 if (oh->slaves_cnt > 0) {
684 for (i = 0; i < oh->slaves_cnt; i++) {
685 struct omap_hwmod_ocp_if *os = oh->slaves[i];
686 struct clk *c = os->_clk;
687
688 if (c && (os->flags & OCPIF_SWSUP_IDLE))
689 clk_disable(c);
690 }
691 }
692
693 /* The opt clocks are controlled by the device driver. */
694
695 return 0;
696 }
697
698 static void _enable_optional_clocks(struct omap_hwmod *oh)
699 {
700 struct omap_hwmod_opt_clk *oc;
701 int i;
702
703 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
704
705 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
706 if (oc->_clk) {
707 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
708 oc->_clk->name);
709 clk_enable(oc->_clk);
710 }
711 }
712
713 static void _disable_optional_clocks(struct omap_hwmod *oh)
714 {
715 struct omap_hwmod_opt_clk *oc;
716 int i;
717
718 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
719
720 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
721 if (oc->_clk) {
722 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
723 oc->_clk->name);
724 clk_disable(oc->_clk);
725 }
726 }
727
728 /**
729 * _enable_module - enable CLKCTRL modulemode on OMAP4
730 * @oh: struct omap_hwmod *
731 *
732 * Enables the PRCM module mode related to the hwmod @oh.
733 * No return value.
734 */
735 static void _enable_module(struct omap_hwmod *oh)
736 {
737 /* The module mode does not exist prior OMAP4 */
738 if (cpu_is_omap24xx() || cpu_is_omap34xx())
739 return;
740
741 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
742 return;
743
744 pr_debug("omap_hwmod: %s: _enable_module: %d\n",
745 oh->name, oh->prcm.omap4.modulemode);
746
747 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
748 oh->clkdm->prcm_partition,
749 oh->clkdm->cm_inst,
750 oh->clkdm->clkdm_offs,
751 oh->prcm.omap4.clkctrl_offs);
752 }
753
754 /**
755 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
756 * @oh: struct omap_hwmod *
757 *
758 * Wait for a module @oh to enter slave idle. Returns 0 if the module
759 * does not have an IDLEST bit or if the module successfully enters
760 * slave idle; otherwise, pass along the return value of the
761 * appropriate *_cm*_wait_module_idle() function.
762 */
763 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
764 {
765 if (!cpu_is_omap44xx())
766 return 0;
767
768 if (!oh)
769 return -EINVAL;
770
771 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
772 return 0;
773
774 if (oh->flags & HWMOD_NO_IDLEST)
775 return 0;
776
777 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
778 oh->clkdm->cm_inst,
779 oh->clkdm->clkdm_offs,
780 oh->prcm.omap4.clkctrl_offs);
781 }
782
783 /**
784 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
785 * @oh: struct omap_hwmod *oh
786 *
787 * Count and return the number of MPU IRQs associated with the hwmod
788 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
789 * NULL.
790 */
791 static int _count_mpu_irqs(struct omap_hwmod *oh)
792 {
793 struct omap_hwmod_irq_info *ohii;
794 int i = 0;
795
796 if (!oh || !oh->mpu_irqs)
797 return 0;
798
799 do {
800 ohii = &oh->mpu_irqs[i++];
801 } while (ohii->irq != -1);
802
803 return i-1;
804 }
805
806 /**
807 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
808 * @oh: struct omap_hwmod *oh
809 *
810 * Count and return the number of SDMA request lines associated with
811 * the hwmod @oh. Used to allocate struct resource data. Returns 0
812 * if @oh is NULL.
813 */
814 static int _count_sdma_reqs(struct omap_hwmod *oh)
815 {
816 struct omap_hwmod_dma_info *ohdi;
817 int i = 0;
818
819 if (!oh || !oh->sdma_reqs)
820 return 0;
821
822 do {
823 ohdi = &oh->sdma_reqs[i++];
824 } while (ohdi->dma_req != -1);
825
826 return i-1;
827 }
828
829 /**
830 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
831 * @oh: struct omap_hwmod *oh
832 *
833 * Count and return the number of address space ranges associated with
834 * the hwmod @oh. Used to allocate struct resource data. Returns 0
835 * if @oh is NULL.
836 */
837 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
838 {
839 struct omap_hwmod_addr_space *mem;
840 int i = 0;
841
842 if (!os || !os->addr)
843 return 0;
844
845 do {
846 mem = &os->addr[i++];
847 } while (mem->pa_start != mem->pa_end);
848
849 return i-1;
850 }
851
852 /**
853 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
854 * @oh: struct omap_hwmod * to operate on
855 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
856 * @irq: pointer to an unsigned int to store the MPU IRQ number to
857 *
858 * Retrieve a MPU hardware IRQ line number named by @name associated
859 * with the IP block pointed to by @oh. The IRQ number will be filled
860 * into the address pointed to by @dma. When @name is non-null, the
861 * IRQ line number associated with the named entry will be returned.
862 * If @name is null, the first matching entry will be returned. Data
863 * order is not meaningful in hwmod data, so callers are strongly
864 * encouraged to use a non-null @name whenever possible to avoid
865 * unpredictable effects if hwmod data is later added that causes data
866 * ordering to change. Returns 0 upon success or a negative error
867 * code upon error.
868 */
869 static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
870 unsigned int *irq)
871 {
872 int i;
873 bool found = false;
874
875 if (!oh->mpu_irqs)
876 return -ENOENT;
877
878 i = 0;
879 while (oh->mpu_irqs[i].irq != -1) {
880 if (name == oh->mpu_irqs[i].name ||
881 !strcmp(name, oh->mpu_irqs[i].name)) {
882 found = true;
883 break;
884 }
885 i++;
886 }
887
888 if (!found)
889 return -ENOENT;
890
891 *irq = oh->mpu_irqs[i].irq;
892
893 return 0;
894 }
895
896 /**
897 * _get_sdma_req_by_name - fetch SDMA request line ID by name
898 * @oh: struct omap_hwmod * to operate on
899 * @name: pointer to the name of the SDMA request line to fetch (optional)
900 * @dma: pointer to an unsigned int to store the request line ID to
901 *
902 * Retrieve an SDMA request line ID named by @name on the IP block
903 * pointed to by @oh. The ID will be filled into the address pointed
904 * to by @dma. When @name is non-null, the request line ID associated
905 * with the named entry will be returned. If @name is null, the first
906 * matching entry will be returned. Data order is not meaningful in
907 * hwmod data, so callers are strongly encouraged to use a non-null
908 * @name whenever possible to avoid unpredictable effects if hwmod
909 * data is later added that causes data ordering to change. Returns 0
910 * upon success or a negative error code upon error.
911 */
912 static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
913 unsigned int *dma)
914 {
915 int i;
916 bool found = false;
917
918 if (!oh->sdma_reqs)
919 return -ENOENT;
920
921 i = 0;
922 while (oh->sdma_reqs[i].dma_req != -1) {
923 if (name == oh->sdma_reqs[i].name ||
924 !strcmp(name, oh->sdma_reqs[i].name)) {
925 found = true;
926 break;
927 }
928 i++;
929 }
930
931 if (!found)
932 return -ENOENT;
933
934 *dma = oh->sdma_reqs[i].dma_req;
935
936 return 0;
937 }
938
939 /**
940 * _get_addr_space_by_name - fetch address space start & end by name
941 * @oh: struct omap_hwmod * to operate on
942 * @name: pointer to the name of the address space to fetch (optional)
943 * @pa_start: pointer to a u32 to store the starting address to
944 * @pa_end: pointer to a u32 to store the ending address to
945 *
946 * Retrieve address space start and end addresses for the IP block
947 * pointed to by @oh. The data will be filled into the addresses
948 * pointed to by @pa_start and @pa_end. When @name is non-null, the
949 * address space data associated with the named entry will be
950 * returned. If @name is null, the first matching entry will be
951 * returned. Data order is not meaningful in hwmod data, so callers
952 * are strongly encouraged to use a non-null @name whenever possible
953 * to avoid unpredictable effects if hwmod data is later added that
954 * causes data ordering to change. Returns 0 upon success or a
955 * negative error code upon error.
956 */
957 static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
958 u32 *pa_start, u32 *pa_end)
959 {
960 int i, j;
961 struct omap_hwmod_ocp_if *os;
962 bool found = false;
963
964 for (i = 0; i < oh->slaves_cnt; i++) {
965 os = oh->slaves[i];
966
967 if (!os->addr)
968 return -ENOENT;
969
970 j = 0;
971 while (os->addr[j].pa_start != os->addr[j].pa_end) {
972 if (name == os->addr[j].name ||
973 !strcmp(name, os->addr[j].name)) {
974 found = true;
975 break;
976 }
977 j++;
978 }
979
980 if (found)
981 break;
982 }
983
984 if (!found)
985 return -ENOENT;
986
987 *pa_start = os->addr[j].pa_start;
988 *pa_end = os->addr[j].pa_end;
989
990 return 0;
991 }
992
993 /**
994 * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
995 * @oh: struct omap_hwmod *
996 *
997 * Returns the array index of the OCP slave port that the MPU
998 * addresses the device on, or -EINVAL upon error or not found.
999 */
1000 static int __init _find_mpu_port_index(struct omap_hwmod *oh)
1001 {
1002 int i;
1003 int found = 0;
1004
1005 if (!oh || oh->slaves_cnt == 0)
1006 return -EINVAL;
1007
1008 for (i = 0; i < oh->slaves_cnt; i++) {
1009 struct omap_hwmod_ocp_if *os = oh->slaves[i];
1010
1011 if (os->user & OCP_USER_MPU) {
1012 found = 1;
1013 break;
1014 }
1015 }
1016
1017 if (found)
1018 pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
1019 oh->name, i);
1020 else
1021 pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
1022 oh->name);
1023
1024 return (found) ? i : -EINVAL;
1025 }
1026
1027 /**
1028 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
1029 * @oh: struct omap_hwmod *
1030 *
1031 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1032 * the register target MPU address space; or returns NULL upon error.
1033 */
1034 static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
1035 {
1036 struct omap_hwmod_ocp_if *os;
1037 struct omap_hwmod_addr_space *mem;
1038 int found = 0, i = 0;
1039
1040 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1041 return NULL;
1042
1043 os = oh->slaves[oh->_mpu_port_index];
1044 if (!os->addr)
1045 return NULL;
1046
1047 do {
1048 mem = &os->addr[i++];
1049 if (mem->flags & ADDR_TYPE_RT)
1050 found = 1;
1051 } while (!found && mem->pa_start != mem->pa_end);
1052
1053 return (found) ? mem : NULL;
1054 }
1055
1056 /**
1057 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1058 * @oh: struct omap_hwmod *
1059 *
1060 * If module is marked as SWSUP_SIDLE, force the module out of slave
1061 * idle; otherwise, configure it for smart-idle. If module is marked
1062 * as SWSUP_MSUSPEND, force the module out of master standby;
1063 * otherwise, configure it for smart-standby. No return value.
1064 */
1065 static void _enable_sysc(struct omap_hwmod *oh)
1066 {
1067 u8 idlemode, sf;
1068 u32 v;
1069
1070 if (!oh->class->sysc)
1071 return;
1072
1073 v = oh->_sysc_cache;
1074 sf = oh->class->sysc->sysc_flags;
1075
1076 if (sf & SYSC_HAS_SIDLEMODE) {
1077 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1078 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
1079 _set_slave_idlemode(oh, idlemode, &v);
1080 }
1081
1082 if (sf & SYSC_HAS_MIDLEMODE) {
1083 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1084 idlemode = HWMOD_IDLEMODE_NO;
1085 } else {
1086 if (sf & SYSC_HAS_ENAWAKEUP)
1087 _enable_wakeup(oh, &v);
1088 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1089 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1090 else
1091 idlemode = HWMOD_IDLEMODE_SMART;
1092 }
1093 _set_master_standbymode(oh, idlemode, &v);
1094 }
1095
1096 /*
1097 * XXX The clock framework should handle this, by
1098 * calling into this code. But this must wait until the
1099 * clock structures are tagged with omap_hwmod entries
1100 */
1101 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1102 (sf & SYSC_HAS_CLOCKACTIVITY))
1103 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
1104
1105 /* If slave is in SMARTIDLE, also enable wakeup */
1106 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1107 _enable_wakeup(oh, &v);
1108
1109 _write_sysconfig(v, oh);
1110
1111 /*
1112 * Set the autoidle bit only after setting the smartidle bit
1113 * Setting this will not have any impact on the other modules.
1114 */
1115 if (sf & SYSC_HAS_AUTOIDLE) {
1116 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1117 0 : 1;
1118 _set_module_autoidle(oh, idlemode, &v);
1119 _write_sysconfig(v, oh);
1120 }
1121 }
1122
1123 /**
1124 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1125 * @oh: struct omap_hwmod *
1126 *
1127 * If module is marked as SWSUP_SIDLE, force the module into slave
1128 * idle; otherwise, configure it for smart-idle. If module is marked
1129 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1130 * configure it for smart-standby. No return value.
1131 */
1132 static void _idle_sysc(struct omap_hwmod *oh)
1133 {
1134 u8 idlemode, sf;
1135 u32 v;
1136
1137 if (!oh->class->sysc)
1138 return;
1139
1140 v = oh->_sysc_cache;
1141 sf = oh->class->sysc->sysc_flags;
1142
1143 if (sf & SYSC_HAS_SIDLEMODE) {
1144 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1145 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
1146 _set_slave_idlemode(oh, idlemode, &v);
1147 }
1148
1149 if (sf & SYSC_HAS_MIDLEMODE) {
1150 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1151 idlemode = HWMOD_IDLEMODE_FORCE;
1152 } else {
1153 if (sf & SYSC_HAS_ENAWAKEUP)
1154 _enable_wakeup(oh, &v);
1155 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1156 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1157 else
1158 idlemode = HWMOD_IDLEMODE_SMART;
1159 }
1160 _set_master_standbymode(oh, idlemode, &v);
1161 }
1162
1163 /* If slave is in SMARTIDLE, also enable wakeup */
1164 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1165 _enable_wakeup(oh, &v);
1166
1167 _write_sysconfig(v, oh);
1168 }
1169
1170 /**
1171 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1172 * @oh: struct omap_hwmod *
1173 *
1174 * Force the module into slave idle and master suspend. No return
1175 * value.
1176 */
1177 static void _shutdown_sysc(struct omap_hwmod *oh)
1178 {
1179 u32 v;
1180 u8 sf;
1181
1182 if (!oh->class->sysc)
1183 return;
1184
1185 v = oh->_sysc_cache;
1186 sf = oh->class->sysc->sysc_flags;
1187
1188 if (sf & SYSC_HAS_SIDLEMODE)
1189 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1190
1191 if (sf & SYSC_HAS_MIDLEMODE)
1192 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1193
1194 if (sf & SYSC_HAS_AUTOIDLE)
1195 _set_module_autoidle(oh, 1, &v);
1196
1197 _write_sysconfig(v, oh);
1198 }
1199
1200 /**
1201 * _lookup - find an omap_hwmod by name
1202 * @name: find an omap_hwmod by name
1203 *
1204 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1205 */
1206 static struct omap_hwmod *_lookup(const char *name)
1207 {
1208 struct omap_hwmod *oh, *temp_oh;
1209
1210 oh = NULL;
1211
1212 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1213 if (!strcmp(name, temp_oh->name)) {
1214 oh = temp_oh;
1215 break;
1216 }
1217 }
1218
1219 return oh;
1220 }
1221 /**
1222 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1223 * @oh: struct omap_hwmod *
1224 *
1225 * Convert a clockdomain name stored in a struct omap_hwmod into a
1226 * clockdomain pointer, and save it into the struct omap_hwmod.
1227 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1228 */
1229 static int _init_clkdm(struct omap_hwmod *oh)
1230 {
1231 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1232 return 0;
1233
1234 if (!oh->clkdm_name) {
1235 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1236 return -EINVAL;
1237 }
1238
1239 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1240 if (!oh->clkdm) {
1241 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1242 oh->name, oh->clkdm_name);
1243 return -EINVAL;
1244 }
1245
1246 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1247 oh->name, oh->clkdm_name);
1248
1249 return 0;
1250 }
1251
1252 /**
1253 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1254 * well the clockdomain.
1255 * @oh: struct omap_hwmod *
1256 * @data: not used; pass NULL
1257 *
1258 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1259 * Resolves all clock names embedded in the hwmod. Returns 0 on
1260 * success, or a negative error code on failure.
1261 */
1262 static int _init_clocks(struct omap_hwmod *oh, void *data)
1263 {
1264 int ret = 0;
1265
1266 if (oh->_state != _HWMOD_STATE_REGISTERED)
1267 return 0;
1268
1269 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1270
1271 ret |= _init_main_clk(oh);
1272 ret |= _init_interface_clks(oh);
1273 ret |= _init_opt_clks(oh);
1274 ret |= _init_clkdm(oh);
1275
1276 if (!ret)
1277 oh->_state = _HWMOD_STATE_CLKS_INITED;
1278 else
1279 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1280
1281 return ret;
1282 }
1283
1284 /**
1285 * _wait_target_ready - wait for a module to leave slave idle
1286 * @oh: struct omap_hwmod *
1287 *
1288 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1289 * does not have an IDLEST bit or if the module successfully leaves
1290 * slave idle; otherwise, pass along the return value of the
1291 * appropriate *_cm*_wait_module_ready() function.
1292 */
1293 static int _wait_target_ready(struct omap_hwmod *oh)
1294 {
1295 struct omap_hwmod_ocp_if *os;
1296 int ret;
1297
1298 if (!oh)
1299 return -EINVAL;
1300
1301 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1302 return 0;
1303
1304 os = oh->slaves[oh->_mpu_port_index];
1305
1306 if (oh->flags & HWMOD_NO_IDLEST)
1307 return 0;
1308
1309 /* XXX check module SIDLEMODE */
1310
1311 /* XXX check clock enable states */
1312
1313 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1314 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1315 oh->prcm.omap2.idlest_reg_id,
1316 oh->prcm.omap2.idlest_idle_bit);
1317 } else if (cpu_is_omap44xx()) {
1318 if (!oh->clkdm)
1319 return -EINVAL;
1320
1321 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1322 oh->clkdm->cm_inst,
1323 oh->clkdm->clkdm_offs,
1324 oh->prcm.omap4.clkctrl_offs);
1325 } else {
1326 BUG();
1327 };
1328
1329 return ret;
1330 }
1331
1332 /**
1333 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1334 * @oh: struct omap_hwmod *
1335 * @name: name of the reset line in the context of this hwmod
1336 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1337 *
1338 * Return the bit position of the reset line that match the
1339 * input name. Return -ENOENT if not found.
1340 */
1341 static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1342 struct omap_hwmod_rst_info *ohri)
1343 {
1344 int i;
1345
1346 for (i = 0; i < oh->rst_lines_cnt; i++) {
1347 const char *rst_line = oh->rst_lines[i].name;
1348 if (!strcmp(rst_line, name)) {
1349 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1350 ohri->st_shift = oh->rst_lines[i].st_shift;
1351 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1352 oh->name, __func__, rst_line, ohri->rst_shift,
1353 ohri->st_shift);
1354
1355 return 0;
1356 }
1357 }
1358
1359 return -ENOENT;
1360 }
1361
1362 /**
1363 * _assert_hardreset - assert the HW reset line of submodules
1364 * contained in the hwmod module.
1365 * @oh: struct omap_hwmod *
1366 * @name: name of the reset line to lookup and assert
1367 *
1368 * Some IP like dsp, ipu or iva contain processor that require
1369 * an HW reset line to be assert / deassert in order to enable fully
1370 * the IP.
1371 */
1372 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1373 {
1374 struct omap_hwmod_rst_info ohri;
1375 u8 ret;
1376
1377 if (!oh)
1378 return -EINVAL;
1379
1380 ret = _lookup_hardreset(oh, name, &ohri);
1381 if (IS_ERR_VALUE(ret))
1382 return ret;
1383
1384 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1385 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
1386 ohri.rst_shift);
1387 else if (cpu_is_omap44xx())
1388 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1389 oh->clkdm->pwrdm.ptr->prcm_partition,
1390 oh->clkdm->pwrdm.ptr->prcm_offs,
1391 oh->prcm.omap4.rstctrl_offs);
1392 else
1393 return -EINVAL;
1394 }
1395
1396 /**
1397 * _deassert_hardreset - deassert the HW reset line of submodules contained
1398 * in the hwmod module.
1399 * @oh: struct omap_hwmod *
1400 * @name: name of the reset line to look up and deassert
1401 *
1402 * Some IP like dsp, ipu or iva contain processor that require
1403 * an HW reset line to be assert / deassert in order to enable fully
1404 * the IP.
1405 */
1406 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1407 {
1408 struct omap_hwmod_rst_info ohri;
1409 int ret;
1410
1411 if (!oh)
1412 return -EINVAL;
1413
1414 ret = _lookup_hardreset(oh, name, &ohri);
1415 if (IS_ERR_VALUE(ret))
1416 return ret;
1417
1418 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1419 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1420 ohri.rst_shift,
1421 ohri.st_shift);
1422 } else if (cpu_is_omap44xx()) {
1423 if (ohri.st_shift)
1424 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1425 oh->name, name);
1426 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1427 oh->clkdm->pwrdm.ptr->prcm_partition,
1428 oh->clkdm->pwrdm.ptr->prcm_offs,
1429 oh->prcm.omap4.rstctrl_offs);
1430 } else {
1431 return -EINVAL;
1432 }
1433
1434 if (ret == -EBUSY)
1435 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1436
1437 return ret;
1438 }
1439
1440 /**
1441 * _read_hardreset - read the HW reset line state of submodules
1442 * contained in the hwmod module
1443 * @oh: struct omap_hwmod *
1444 * @name: name of the reset line to look up and read
1445 *
1446 * Return the state of the reset line.
1447 */
1448 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1449 {
1450 struct omap_hwmod_rst_info ohri;
1451 u8 ret;
1452
1453 if (!oh)
1454 return -EINVAL;
1455
1456 ret = _lookup_hardreset(oh, name, &ohri);
1457 if (IS_ERR_VALUE(ret))
1458 return ret;
1459
1460 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1461 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1462 ohri.st_shift);
1463 } else if (cpu_is_omap44xx()) {
1464 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1465 oh->clkdm->pwrdm.ptr->prcm_partition,
1466 oh->clkdm->pwrdm.ptr->prcm_offs,
1467 oh->prcm.omap4.rstctrl_offs);
1468 } else {
1469 return -EINVAL;
1470 }
1471 }
1472
1473 /**
1474 * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
1475 * @oh: struct omap_hwmod *
1476 *
1477 * If any hardreset line associated with @oh is asserted, then return true.
1478 * Otherwise, if @oh has no hardreset lines associated with it, or if
1479 * no hardreset lines associated with @oh are asserted, then return false.
1480 * This function is used to avoid executing some parts of the IP block
1481 * enable/disable sequence if a hardreset line is set.
1482 */
1483 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1484 {
1485 int i;
1486
1487 if (oh->rst_lines_cnt == 0)
1488 return false;
1489
1490 for (i = 0; i < oh->rst_lines_cnt; i++)
1491 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1492 return true;
1493
1494 return false;
1495 }
1496
1497 /**
1498 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1499 * @oh: struct omap_hwmod *
1500 *
1501 * Disable the PRCM module mode related to the hwmod @oh.
1502 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1503 */
1504 static int _omap4_disable_module(struct omap_hwmod *oh)
1505 {
1506 int v;
1507
1508 /* The module mode does not exist prior OMAP4 */
1509 if (!cpu_is_omap44xx())
1510 return -EINVAL;
1511
1512 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1513 return -EINVAL;
1514
1515 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1516
1517 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1518 oh->clkdm->cm_inst,
1519 oh->clkdm->clkdm_offs,
1520 oh->prcm.omap4.clkctrl_offs);
1521
1522 if (_are_any_hardreset_lines_asserted(oh))
1523 return 0;
1524
1525 v = _omap4_wait_target_disable(oh);
1526 if (v)
1527 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1528 oh->name);
1529
1530 return 0;
1531 }
1532
1533 /**
1534 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1535 * @oh: struct omap_hwmod *
1536 *
1537 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1538 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1539 * reset this way, -EINVAL if the hwmod is in the wrong state,
1540 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1541 *
1542 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1543 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1544 * use the SYSCONFIG softreset bit to provide the status.
1545 *
1546 * Note that some IP like McBSP do have reset control but don't have
1547 * reset status.
1548 */
1549 static int _ocp_softreset(struct omap_hwmod *oh)
1550 {
1551 u32 v, softrst_mask;
1552 int c = 0;
1553 int ret = 0;
1554
1555 if (!oh->class->sysc ||
1556 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1557 return -ENOENT;
1558
1559 /* clocks must be on for this operation */
1560 if (oh->_state != _HWMOD_STATE_ENABLED) {
1561 pr_warning("omap_hwmod: %s: reset can only be entered from "
1562 "enabled state\n", oh->name);
1563 return -EINVAL;
1564 }
1565
1566 /* For some modules, all optionnal clocks need to be enabled as well */
1567 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1568 _enable_optional_clocks(oh);
1569
1570 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1571
1572 v = oh->_sysc_cache;
1573 ret = _set_softreset(oh, &v);
1574 if (ret)
1575 goto dis_opt_clks;
1576 _write_sysconfig(v, oh);
1577
1578 if (oh->class->sysc->srst_udelay)
1579 udelay(oh->class->sysc->srst_udelay);
1580
1581 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1582 omap_test_timeout((omap_hwmod_read(oh,
1583 oh->class->sysc->syss_offs)
1584 & SYSS_RESETDONE_MASK),
1585 MAX_MODULE_SOFTRESET_WAIT, c);
1586 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1587 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
1588 omap_test_timeout(!(omap_hwmod_read(oh,
1589 oh->class->sysc->sysc_offs)
1590 & softrst_mask),
1591 MAX_MODULE_SOFTRESET_WAIT, c);
1592 }
1593
1594 if (c == MAX_MODULE_SOFTRESET_WAIT)
1595 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1596 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1597 else
1598 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1599
1600 /*
1601 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1602 * _wait_target_ready() or _reset()
1603 */
1604
1605 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1606
1607 dis_opt_clks:
1608 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1609 _disable_optional_clocks(oh);
1610
1611 return ret;
1612 }
1613
1614 /**
1615 * _reset - reset an omap_hwmod
1616 * @oh: struct omap_hwmod *
1617 *
1618 * Resets an omap_hwmod @oh. If the module has a custom reset
1619 * function pointer defined, then call it to reset the IP block, and
1620 * pass along its return value to the caller. Otherwise, if the IP
1621 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1622 * associated with it, call a function to reset the IP block via that
1623 * method, and pass along the return value to the caller. Finally, if
1624 * the IP block has some hardreset lines associated with it, assert
1625 * all of those, but do _not_ deassert them. (This is because driver
1626 * authors have expressed an apparent requirement to control the
1627 * deassertion of the hardreset lines themselves.)
1628 *
1629 * The default software reset mechanism for most OMAP IP blocks is
1630 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1631 * hwmods cannot be reset via this method. Some are not targets and
1632 * therefore have no OCP header registers to access. Others (like the
1633 * IVA) have idiosyncratic reset sequences. So for these relatively
1634 * rare cases, custom reset code can be supplied in the struct
1635 * omap_hwmod_class .reset function pointer. Passes along the return
1636 * value from either _ocp_softreset() or the custom reset function -
1637 * these must return -EINVAL if the hwmod cannot be reset this way or
1638 * if the hwmod is in the wrong state, -ETIMEDOUT if the module did
1639 * not reset in time, or 0 upon success.
1640 */
1641 static int _reset(struct omap_hwmod *oh)
1642 {
1643 int i, r;
1644
1645 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1646
1647 if (oh->class->reset) {
1648 r = oh->class->reset(oh);
1649 } else {
1650 if (oh->rst_lines_cnt > 0) {
1651 for (i = 0; i < oh->rst_lines_cnt; i++)
1652 _assert_hardreset(oh, oh->rst_lines[i].name);
1653 return 0;
1654 } else {
1655 r = _ocp_softreset(oh);
1656 if (r == -ENOENT)
1657 r = 0;
1658 }
1659 }
1660
1661 /*
1662 * OCP_SYSCONFIG bits need to be reprogrammed after a
1663 * softreset. The _enable() function should be split to avoid
1664 * the rewrite of the OCP_SYSCONFIG register.
1665 */
1666 if (oh->class->sysc) {
1667 _update_sysc_cache(oh);
1668 _enable_sysc(oh);
1669 }
1670
1671 return r;
1672 }
1673
1674 /**
1675 * _enable - enable an omap_hwmod
1676 * @oh: struct omap_hwmod *
1677 *
1678 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1679 * register target. Returns -EINVAL if the hwmod is in the wrong
1680 * state or passes along the return value of _wait_target_ready().
1681 */
1682 static int _enable(struct omap_hwmod *oh)
1683 {
1684 int r;
1685 int hwsup = 0;
1686
1687 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1688
1689 /*
1690 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1691 * state at init. Now that someone is really trying to enable
1692 * them, just ensure that the hwmod mux is set.
1693 */
1694 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1695 /*
1696 * If the caller has mux data populated, do the mux'ing
1697 * which wouldn't have been done as part of the _enable()
1698 * done during setup.
1699 */
1700 if (oh->mux)
1701 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1702
1703 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1704 return 0;
1705 }
1706
1707 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1708 oh->_state != _HWMOD_STATE_IDLE &&
1709 oh->_state != _HWMOD_STATE_DISABLED) {
1710 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1711 oh->name);
1712 return -EINVAL;
1713 }
1714
1715 /*
1716 * If an IP block contains HW reset lines and any of them are
1717 * asserted, we let integration code associated with that
1718 * block handle the enable. We've received very little
1719 * information on what those driver authors need, and until
1720 * detailed information is provided and the driver code is
1721 * posted to the public lists, this is probably the best we
1722 * can do.
1723 */
1724 if (_are_any_hardreset_lines_asserted(oh))
1725 return 0;
1726
1727 /* Mux pins for device runtime if populated */
1728 if (oh->mux && (!oh->mux->enabled ||
1729 ((oh->_state == _HWMOD_STATE_IDLE) &&
1730 oh->mux->pads_dynamic)))
1731 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1732
1733 _add_initiator_dep(oh, mpu_oh);
1734
1735 if (oh->clkdm) {
1736 /*
1737 * A clockdomain must be in SW_SUP before enabling
1738 * completely the module. The clockdomain can be set
1739 * in HW_AUTO only when the module become ready.
1740 */
1741 hwsup = clkdm_in_hwsup(oh->clkdm);
1742 r = clkdm_hwmod_enable(oh->clkdm, oh);
1743 if (r) {
1744 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1745 oh->name, oh->clkdm->name, r);
1746 return r;
1747 }
1748 }
1749
1750 _enable_clocks(oh);
1751 _enable_module(oh);
1752
1753 r = _wait_target_ready(oh);
1754 if (!r) {
1755 /*
1756 * Set the clockdomain to HW_AUTO only if the target is ready,
1757 * assuming that the previous state was HW_AUTO
1758 */
1759 if (oh->clkdm && hwsup)
1760 clkdm_allow_idle(oh->clkdm);
1761
1762 oh->_state = _HWMOD_STATE_ENABLED;
1763
1764 /* Access the sysconfig only if the target is ready */
1765 if (oh->class->sysc) {
1766 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1767 _update_sysc_cache(oh);
1768 _enable_sysc(oh);
1769 }
1770 } else {
1771 _disable_clocks(oh);
1772 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1773 oh->name, r);
1774
1775 if (oh->clkdm)
1776 clkdm_hwmod_disable(oh->clkdm, oh);
1777 }
1778
1779 return r;
1780 }
1781
1782 /**
1783 * _idle - idle an omap_hwmod
1784 * @oh: struct omap_hwmod *
1785 *
1786 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1787 * no further work. Returns -EINVAL if the hwmod is in the wrong
1788 * state or returns 0.
1789 */
1790 static int _idle(struct omap_hwmod *oh)
1791 {
1792 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1793
1794 if (oh->_state != _HWMOD_STATE_ENABLED) {
1795 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1796 oh->name);
1797 return -EINVAL;
1798 }
1799
1800 if (_are_any_hardreset_lines_asserted(oh))
1801 return 0;
1802
1803 if (oh->class->sysc)
1804 _idle_sysc(oh);
1805 _del_initiator_dep(oh, mpu_oh);
1806
1807 _omap4_disable_module(oh);
1808
1809 /*
1810 * The module must be in idle mode before disabling any parents
1811 * clocks. Otherwise, the parent clock might be disabled before
1812 * the module transition is done, and thus will prevent the
1813 * transition to complete properly.
1814 */
1815 _disable_clocks(oh);
1816 if (oh->clkdm)
1817 clkdm_hwmod_disable(oh->clkdm, oh);
1818
1819 /* Mux pins for device idle if populated */
1820 if (oh->mux && oh->mux->pads_dynamic)
1821 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1822
1823 oh->_state = _HWMOD_STATE_IDLE;
1824
1825 return 0;
1826 }
1827
1828 /**
1829 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1830 * @oh: struct omap_hwmod *
1831 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1832 *
1833 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1834 * local copy. Intended to be used by drivers that require
1835 * direct manipulation of the AUTOIDLE bits.
1836 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1837 * along the return value from _set_module_autoidle().
1838 *
1839 * Any users of this function should be scrutinized carefully.
1840 */
1841 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1842 {
1843 u32 v;
1844 int retval = 0;
1845 unsigned long flags;
1846
1847 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1848 return -EINVAL;
1849
1850 spin_lock_irqsave(&oh->_lock, flags);
1851
1852 v = oh->_sysc_cache;
1853
1854 retval = _set_module_autoidle(oh, autoidle, &v);
1855
1856 if (!retval)
1857 _write_sysconfig(v, oh);
1858
1859 spin_unlock_irqrestore(&oh->_lock, flags);
1860
1861 return retval;
1862 }
1863
1864 /**
1865 * _shutdown - shutdown an omap_hwmod
1866 * @oh: struct omap_hwmod *
1867 *
1868 * Shut down an omap_hwmod @oh. This should be called when the driver
1869 * used for the hwmod is removed or unloaded or if the driver is not
1870 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1871 * state or returns 0.
1872 */
1873 static int _shutdown(struct omap_hwmod *oh)
1874 {
1875 int ret, i;
1876 u8 prev_state;
1877
1878 if (oh->_state != _HWMOD_STATE_IDLE &&
1879 oh->_state != _HWMOD_STATE_ENABLED) {
1880 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
1881 oh->name);
1882 return -EINVAL;
1883 }
1884
1885 if (_are_any_hardreset_lines_asserted(oh))
1886 return 0;
1887
1888 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1889
1890 if (oh->class->pre_shutdown) {
1891 prev_state = oh->_state;
1892 if (oh->_state == _HWMOD_STATE_IDLE)
1893 _enable(oh);
1894 ret = oh->class->pre_shutdown(oh);
1895 if (ret) {
1896 if (prev_state == _HWMOD_STATE_IDLE)
1897 _idle(oh);
1898 return ret;
1899 }
1900 }
1901
1902 if (oh->class->sysc) {
1903 if (oh->_state == _HWMOD_STATE_IDLE)
1904 _enable(oh);
1905 _shutdown_sysc(oh);
1906 }
1907
1908 /* clocks and deps are already disabled in idle */
1909 if (oh->_state == _HWMOD_STATE_ENABLED) {
1910 _del_initiator_dep(oh, mpu_oh);
1911 /* XXX what about the other system initiators here? dma, dsp */
1912 _omap4_disable_module(oh);
1913 _disable_clocks(oh);
1914 if (oh->clkdm)
1915 clkdm_hwmod_disable(oh->clkdm, oh);
1916 }
1917 /* XXX Should this code also force-disable the optional clocks? */
1918
1919 for (i = 0; i < oh->rst_lines_cnt; i++)
1920 _assert_hardreset(oh, oh->rst_lines[i].name);
1921
1922 /* Mux pins to safe mode or use populated off mode values */
1923 if (oh->mux)
1924 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
1925
1926 oh->_state = _HWMOD_STATE_DISABLED;
1927
1928 return 0;
1929 }
1930
1931 /**
1932 * _init_mpu_rt_base - populate the virtual address for a hwmod
1933 * @oh: struct omap_hwmod * to locate the virtual address
1934 *
1935 * Cache the virtual address used by the MPU to access this IP block's
1936 * registers. This address is needed early so the OCP registers that
1937 * are part of the device's address space can be ioremapped properly.
1938 * No return value.
1939 */
1940 static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
1941 {
1942 struct omap_hwmod_addr_space *mem;
1943 void __iomem *va_start;
1944
1945 if (!oh)
1946 return;
1947
1948 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1949 return;
1950
1951 mem = _find_mpu_rt_addr_space(oh);
1952 if (!mem) {
1953 pr_debug("omap_hwmod: %s: no MPU register target found\n",
1954 oh->name);
1955 return;
1956 }
1957
1958 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
1959 if (!va_start) {
1960 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
1961 return;
1962 }
1963
1964 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
1965 oh->name, va_start);
1966
1967 oh->_mpu_rt_va = va_start;
1968 }
1969
1970 /**
1971 * _init - initialize internal data for the hwmod @oh
1972 * @oh: struct omap_hwmod *
1973 * @n: (unused)
1974 *
1975 * Look up the clocks and the address space used by the MPU to access
1976 * registers belonging to the hwmod @oh. @oh must already be
1977 * registered at this point. This is the first of two phases for
1978 * hwmod initialization. Code called here does not touch any hardware
1979 * registers, it simply prepares internal data structures. Returns 0
1980 * upon success or if the hwmod isn't registered, or -EINVAL upon
1981 * failure.
1982 */
1983 static int __init _init(struct omap_hwmod *oh, void *data)
1984 {
1985 int r;
1986
1987 if (oh->_state != _HWMOD_STATE_REGISTERED)
1988 return 0;
1989
1990 _init_mpu_rt_base(oh, NULL);
1991
1992 r = _init_clocks(oh, NULL);
1993 if (IS_ERR_VALUE(r)) {
1994 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
1995 return -EINVAL;
1996 }
1997
1998 oh->_state = _HWMOD_STATE_INITIALIZED;
1999
2000 return 0;
2001 }
2002
2003 /**
2004 * _setup_iclk_autoidle - configure an IP block's interface clocks
2005 * @oh: struct omap_hwmod *
2006 *
2007 * Set up the module's interface clocks. XXX This function is still mostly
2008 * a stub; implementing this properly requires iclk autoidle usecounting in
2009 * the clock code. No return value.
2010 */
2011 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2012 {
2013 int i;
2014
2015 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2016 return;
2017
2018 for (i = 0; i < oh->slaves_cnt; i++) {
2019 struct omap_hwmod_ocp_if *os = oh->slaves[i];
2020 struct clk *c = os->_clk;
2021
2022 if (!c)
2023 continue;
2024
2025 if (os->flags & OCPIF_SWSUP_IDLE) {
2026 /* XXX omap_iclk_deny_idle(c); */
2027 } else {
2028 /* XXX omap_iclk_allow_idle(c); */
2029 clk_enable(c);
2030 }
2031 }
2032
2033 return;
2034 }
2035
2036 /**
2037 * _setup_reset - reset an IP block during the setup process
2038 * @oh: struct omap_hwmod *
2039 *
2040 * Reset the IP block corresponding to the hwmod @oh during the setup
2041 * process. The IP block is first enabled so it can be successfully
2042 * reset. Returns 0 upon success or a negative error code upon
2043 * failure.
2044 */
2045 static int __init _setup_reset(struct omap_hwmod *oh)
2046 {
2047 int r;
2048
2049 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2050 return -EINVAL;
2051
2052 if (oh->rst_lines_cnt == 0) {
2053 r = _enable(oh);
2054 if (r) {
2055 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2056 oh->name, oh->_state);
2057 return -EINVAL;
2058 }
2059 }
2060
2061 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2062 r = _reset(oh);
2063
2064 return r;
2065 }
2066
2067 /**
2068 * _setup_postsetup - transition to the appropriate state after _setup
2069 * @oh: struct omap_hwmod *
2070 *
2071 * Place an IP block represented by @oh into a "post-setup" state --
2072 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2073 * this function is called at the end of _setup().) The postsetup
2074 * state for an IP block can be changed by calling
2075 * omap_hwmod_enter_postsetup_state() early in the boot process,
2076 * before one of the omap_hwmod_setup*() functions are called for the
2077 * IP block.
2078 *
2079 * The IP block stays in this state until a PM runtime-based driver is
2080 * loaded for that IP block. A post-setup state of IDLE is
2081 * appropriate for almost all IP blocks with runtime PM-enabled
2082 * drivers, since those drivers are able to enable the IP block. A
2083 * post-setup state of ENABLED is appropriate for kernels with PM
2084 * runtime disabled. The DISABLED state is appropriate for unusual IP
2085 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2086 * included, since the WDTIMER starts running on reset and will reset
2087 * the MPU if left active.
2088 *
2089 * This post-setup mechanism is deprecated. Once all of the OMAP
2090 * drivers have been converted to use PM runtime, and all of the IP
2091 * block data and interconnect data is available to the hwmod code, it
2092 * should be possible to replace this mechanism with a "lazy reset"
2093 * arrangement. In a "lazy reset" setup, each IP block is enabled
2094 * when the driver first probes, then all remaining IP blocks without
2095 * drivers are either shut down or enabled after the drivers have
2096 * loaded. However, this cannot take place until the above
2097 * preconditions have been met, since otherwise the late reset code
2098 * has no way of knowing which IP blocks are in use by drivers, and
2099 * which ones are unused.
2100 *
2101 * No return value.
2102 */
2103 static void __init _setup_postsetup(struct omap_hwmod *oh)
2104 {
2105 u8 postsetup_state;
2106
2107 if (oh->rst_lines_cnt > 0)
2108 return;
2109
2110 postsetup_state = oh->_postsetup_state;
2111 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2112 postsetup_state = _HWMOD_STATE_ENABLED;
2113
2114 /*
2115 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2116 * it should be set by the core code as a runtime flag during startup
2117 */
2118 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
2119 (postsetup_state == _HWMOD_STATE_IDLE)) {
2120 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2121 postsetup_state = _HWMOD_STATE_ENABLED;
2122 }
2123
2124 if (postsetup_state == _HWMOD_STATE_IDLE)
2125 _idle(oh);
2126 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2127 _shutdown(oh);
2128 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2129 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2130 oh->name, postsetup_state);
2131
2132 return;
2133 }
2134
2135 /**
2136 * _setup - prepare IP block hardware for use
2137 * @oh: struct omap_hwmod *
2138 * @n: (unused, pass NULL)
2139 *
2140 * Configure the IP block represented by @oh. This may include
2141 * enabling the IP block, resetting it, and placing it into a
2142 * post-setup state, depending on the type of IP block and applicable
2143 * flags. IP blocks are reset to prevent any previous configuration
2144 * by the bootloader or previous operating system from interfering
2145 * with power management or other parts of the system. The reset can
2146 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2147 * two phases for hwmod initialization. Code called here generally
2148 * affects the IP block hardware, or system integration hardware
2149 * associated with the IP block. Returns 0.
2150 */
2151 static int __init _setup(struct omap_hwmod *oh, void *data)
2152 {
2153 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2154 return 0;
2155
2156 _setup_iclk_autoidle(oh);
2157
2158 if (!_setup_reset(oh))
2159 _setup_postsetup(oh);
2160
2161 return 0;
2162 }
2163
2164 /**
2165 * _register - register a struct omap_hwmod
2166 * @oh: struct omap_hwmod *
2167 *
2168 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2169 * already has been registered by the same name; -EINVAL if the
2170 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2171 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2172 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2173 * success.
2174 *
2175 * XXX The data should be copied into bootmem, so the original data
2176 * should be marked __initdata and freed after init. This would allow
2177 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2178 * that the copy process would be relatively complex due to the large number
2179 * of substructures.
2180 */
2181 static int __init _register(struct omap_hwmod *oh)
2182 {
2183 int ms_id;
2184
2185 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2186 (oh->_state != _HWMOD_STATE_UNKNOWN))
2187 return -EINVAL;
2188
2189 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2190
2191 if (_lookup(oh->name))
2192 return -EEXIST;
2193
2194 ms_id = _find_mpu_port_index(oh);
2195 if (!IS_ERR_VALUE(ms_id))
2196 oh->_mpu_port_index = ms_id;
2197 else
2198 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
2199
2200 list_add_tail(&oh->node, &omap_hwmod_list);
2201
2202 spin_lock_init(&oh->_lock);
2203
2204 oh->_state = _HWMOD_STATE_REGISTERED;
2205
2206 /*
2207 * XXX Rather than doing a strcmp(), this should test a flag
2208 * set in the hwmod data, inserted by the autogenerator code.
2209 */
2210 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2211 mpu_oh = oh;
2212
2213 return 0;
2214 }
2215
2216
2217 /* Public functions */
2218
2219 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2220 {
2221 if (oh->flags & HWMOD_16BIT_REG)
2222 return __raw_readw(oh->_mpu_rt_va + reg_offs);
2223 else
2224 return __raw_readl(oh->_mpu_rt_va + reg_offs);
2225 }
2226
2227 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2228 {
2229 if (oh->flags & HWMOD_16BIT_REG)
2230 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
2231 else
2232 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
2233 }
2234
2235 /**
2236 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2237 * @oh: struct omap_hwmod *
2238 *
2239 * This is a public function exposed to drivers. Some drivers may need to do
2240 * some settings before and after resetting the device. Those drivers after
2241 * doing the necessary settings could use this function to start a reset by
2242 * setting the SYSCONFIG.SOFTRESET bit.
2243 */
2244 int omap_hwmod_softreset(struct omap_hwmod *oh)
2245 {
2246 u32 v;
2247 int ret;
2248
2249 if (!oh || !(oh->_sysc_cache))
2250 return -EINVAL;
2251
2252 v = oh->_sysc_cache;
2253 ret = _set_softreset(oh, &v);
2254 if (ret)
2255 goto error;
2256 _write_sysconfig(v, oh);
2257
2258 error:
2259 return ret;
2260 }
2261
2262 /**
2263 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
2264 * @oh: struct omap_hwmod *
2265 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
2266 *
2267 * Sets the IP block's OCP slave idlemode in hardware, and updates our
2268 * local copy. Intended to be used by drivers that have some erratum
2269 * that requires direct manipulation of the SIDLEMODE bits. Returns
2270 * -EINVAL if @oh is null, or passes along the return value from
2271 * _set_slave_idlemode().
2272 *
2273 * XXX Does this function have any current users? If not, we should
2274 * remove it; it is better to let the rest of the hwmod code handle this.
2275 * Any users of this function should be scrutinized carefully.
2276 */
2277 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
2278 {
2279 u32 v;
2280 int retval = 0;
2281
2282 if (!oh)
2283 return -EINVAL;
2284
2285 v = oh->_sysc_cache;
2286
2287 retval = _set_slave_idlemode(oh, idlemode, &v);
2288 if (!retval)
2289 _write_sysconfig(v, oh);
2290
2291 return retval;
2292 }
2293
2294 /**
2295 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2296 * @name: name of the omap_hwmod to look up
2297 *
2298 * Given a @name of an omap_hwmod, return a pointer to the registered
2299 * struct omap_hwmod *, or NULL upon error.
2300 */
2301 struct omap_hwmod *omap_hwmod_lookup(const char *name)
2302 {
2303 struct omap_hwmod *oh;
2304
2305 if (!name)
2306 return NULL;
2307
2308 oh = _lookup(name);
2309
2310 return oh;
2311 }
2312
2313 /**
2314 * omap_hwmod_for_each - call function for each registered omap_hwmod
2315 * @fn: pointer to a callback function
2316 * @data: void * data to pass to callback function
2317 *
2318 * Call @fn for each registered omap_hwmod, passing @data to each
2319 * function. @fn must return 0 for success or any other value for
2320 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2321 * will stop and the non-zero return value will be passed to the
2322 * caller of omap_hwmod_for_each(). @fn is called with
2323 * omap_hwmod_for_each() held.
2324 */
2325 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2326 void *data)
2327 {
2328 struct omap_hwmod *temp_oh;
2329 int ret = 0;
2330
2331 if (!fn)
2332 return -EINVAL;
2333
2334 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2335 ret = (*fn)(temp_oh, data);
2336 if (ret)
2337 break;
2338 }
2339
2340 return ret;
2341 }
2342
2343 /**
2344 * omap_hwmod_register - register an array of hwmods
2345 * @ohs: pointer to an array of omap_hwmods to register
2346 *
2347 * Intended to be called early in boot before the clock framework is
2348 * initialized. If @ohs is not null, will register all omap_hwmods
2349 * listed in @ohs that are valid for this chip. Returns 0.
2350 */
2351 int __init omap_hwmod_register(struct omap_hwmod **ohs)
2352 {
2353 int r, i;
2354
2355 if (!ohs)
2356 return 0;
2357
2358 i = 0;
2359 do {
2360 r = _register(ohs[i]);
2361 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
2362 r);
2363 } while (ohs[++i]);
2364
2365 return 0;
2366 }
2367
2368 /**
2369 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
2370 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
2371 *
2372 * If the hwmod data corresponding to the MPU subsystem IP block
2373 * hasn't been initialized and set up yet, do so now. This must be
2374 * done first since sleep dependencies may be added from other hwmods
2375 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
2376 * return value.
2377 */
2378 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
2379 {
2380 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
2381 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
2382 __func__, MPU_INITIATOR_NAME);
2383 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
2384 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
2385 }
2386
2387 /**
2388 * omap_hwmod_setup_one - set up a single hwmod
2389 * @oh_name: const char * name of the already-registered hwmod to set up
2390 *
2391 * Initialize and set up a single hwmod. Intended to be used for a
2392 * small number of early devices, such as the timer IP blocks used for
2393 * the scheduler clock. Must be called after omap2_clk_init().
2394 * Resolves the struct clk names to struct clk pointers for each
2395 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
2396 * -EINVAL upon error or 0 upon success.
2397 */
2398 int __init omap_hwmod_setup_one(const char *oh_name)
2399 {
2400 struct omap_hwmod *oh;
2401
2402 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
2403
2404 oh = _lookup(oh_name);
2405 if (!oh) {
2406 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
2407 return -EINVAL;
2408 }
2409
2410 _ensure_mpu_hwmod_is_setup(oh);
2411
2412 _init(oh, NULL);
2413 _setup(oh, NULL);
2414
2415 return 0;
2416 }
2417
2418 /**
2419 * omap_hwmod_setup_all - set up all registered IP blocks
2420 *
2421 * Initialize and set up all IP blocks registered with the hwmod code.
2422 * Must be called after omap2_clk_init(). Resolves the struct clk
2423 * names to struct clk pointers for each registered omap_hwmod. Also
2424 * calls _setup() on each hwmod. Returns 0 upon success.
2425 */
2426 static int __init omap_hwmod_setup_all(void)
2427 {
2428 _ensure_mpu_hwmod_is_setup(NULL);
2429
2430 omap_hwmod_for_each(_init, NULL);
2431 omap_hwmod_for_each(_setup, NULL);
2432
2433 return 0;
2434 }
2435 core_initcall(omap_hwmod_setup_all);
2436
2437 /**
2438 * omap_hwmod_enable - enable an omap_hwmod
2439 * @oh: struct omap_hwmod *
2440 *
2441 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
2442 * Returns -EINVAL on error or passes along the return value from _enable().
2443 */
2444 int omap_hwmod_enable(struct omap_hwmod *oh)
2445 {
2446 int r;
2447 unsigned long flags;
2448
2449 if (!oh)
2450 return -EINVAL;
2451
2452 spin_lock_irqsave(&oh->_lock, flags);
2453 r = _enable(oh);
2454 spin_unlock_irqrestore(&oh->_lock, flags);
2455
2456 return r;
2457 }
2458
2459 /**
2460 * omap_hwmod_idle - idle an omap_hwmod
2461 * @oh: struct omap_hwmod *
2462 *
2463 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
2464 * Returns -EINVAL on error or passes along the return value from _idle().
2465 */
2466 int omap_hwmod_idle(struct omap_hwmod *oh)
2467 {
2468 unsigned long flags;
2469
2470 if (!oh)
2471 return -EINVAL;
2472
2473 spin_lock_irqsave(&oh->_lock, flags);
2474 _idle(oh);
2475 spin_unlock_irqrestore(&oh->_lock, flags);
2476
2477 return 0;
2478 }
2479
2480 /**
2481 * omap_hwmod_shutdown - shutdown an omap_hwmod
2482 * @oh: struct omap_hwmod *
2483 *
2484 * Shutdown an omap_hwmod @oh. Intended to be called by
2485 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2486 * the return value from _shutdown().
2487 */
2488 int omap_hwmod_shutdown(struct omap_hwmod *oh)
2489 {
2490 unsigned long flags;
2491
2492 if (!oh)
2493 return -EINVAL;
2494
2495 spin_lock_irqsave(&oh->_lock, flags);
2496 _shutdown(oh);
2497 spin_unlock_irqrestore(&oh->_lock, flags);
2498
2499 return 0;
2500 }
2501
2502 /**
2503 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2504 * @oh: struct omap_hwmod *oh
2505 *
2506 * Intended to be called by the omap_device code.
2507 */
2508 int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2509 {
2510 unsigned long flags;
2511
2512 spin_lock_irqsave(&oh->_lock, flags);
2513 _enable_clocks(oh);
2514 spin_unlock_irqrestore(&oh->_lock, flags);
2515
2516 return 0;
2517 }
2518
2519 /**
2520 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2521 * @oh: struct omap_hwmod *oh
2522 *
2523 * Intended to be called by the omap_device code.
2524 */
2525 int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2526 {
2527 unsigned long flags;
2528
2529 spin_lock_irqsave(&oh->_lock, flags);
2530 _disable_clocks(oh);
2531 spin_unlock_irqrestore(&oh->_lock, flags);
2532
2533 return 0;
2534 }
2535
2536 /**
2537 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2538 * @oh: struct omap_hwmod *oh
2539 *
2540 * Intended to be called by drivers and core code when all posted
2541 * writes to a device must complete before continuing further
2542 * execution (for example, after clearing some device IRQSTATUS
2543 * register bits)
2544 *
2545 * XXX what about targets with multiple OCP threads?
2546 */
2547 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2548 {
2549 BUG_ON(!oh);
2550
2551 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
2552 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
2553 oh->name);
2554 return;
2555 }
2556
2557 /*
2558 * Forces posted writes to complete on the OCP thread handling
2559 * register writes
2560 */
2561 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
2562 }
2563
2564 /**
2565 * omap_hwmod_reset - reset the hwmod
2566 * @oh: struct omap_hwmod *
2567 *
2568 * Under some conditions, a driver may wish to reset the entire device.
2569 * Called from omap_device code. Returns -EINVAL on error or passes along
2570 * the return value from _reset().
2571 */
2572 int omap_hwmod_reset(struct omap_hwmod *oh)
2573 {
2574 int r;
2575 unsigned long flags;
2576
2577 if (!oh)
2578 return -EINVAL;
2579
2580 spin_lock_irqsave(&oh->_lock, flags);
2581 r = _reset(oh);
2582 spin_unlock_irqrestore(&oh->_lock, flags);
2583
2584 return r;
2585 }
2586
2587 /*
2588 * IP block data retrieval functions
2589 */
2590
2591 /**
2592 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2593 * @oh: struct omap_hwmod *
2594 * @res: pointer to the first element of an array of struct resource to fill
2595 *
2596 * Count the number of struct resource array elements necessary to
2597 * contain omap_hwmod @oh resources. Intended to be called by code
2598 * that registers omap_devices. Intended to be used to determine the
2599 * size of a dynamically-allocated struct resource array, before
2600 * calling omap_hwmod_fill_resources(). Returns the number of struct
2601 * resource array elements needed.
2602 *
2603 * XXX This code is not optimized. It could attempt to merge adjacent
2604 * resource IDs.
2605 *
2606 */
2607 int omap_hwmod_count_resources(struct omap_hwmod *oh)
2608 {
2609 int ret, i;
2610
2611 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
2612
2613 for (i = 0; i < oh->slaves_cnt; i++)
2614 ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
2615
2616 return ret;
2617 }
2618
2619 /**
2620 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2621 * @oh: struct omap_hwmod *
2622 * @res: pointer to the first element of an array of struct resource to fill
2623 *
2624 * Fill the struct resource array @res with resource data from the
2625 * omap_hwmod @oh. Intended to be called by code that registers
2626 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2627 * number of array elements filled.
2628 */
2629 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2630 {
2631 int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
2632 int r = 0;
2633
2634 /* For each IRQ, DMA, memory area, fill in array.*/
2635
2636 mpu_irqs_cnt = _count_mpu_irqs(oh);
2637 for (i = 0; i < mpu_irqs_cnt; i++) {
2638 (res + r)->name = (oh->mpu_irqs + i)->name;
2639 (res + r)->start = (oh->mpu_irqs + i)->irq;
2640 (res + r)->end = (oh->mpu_irqs + i)->irq;
2641 (res + r)->flags = IORESOURCE_IRQ;
2642 r++;
2643 }
2644
2645 sdma_reqs_cnt = _count_sdma_reqs(oh);
2646 for (i = 0; i < sdma_reqs_cnt; i++) {
2647 (res + r)->name = (oh->sdma_reqs + i)->name;
2648 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2649 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
2650 (res + r)->flags = IORESOURCE_DMA;
2651 r++;
2652 }
2653
2654 for (i = 0; i < oh->slaves_cnt; i++) {
2655 struct omap_hwmod_ocp_if *os;
2656 int addr_cnt;
2657
2658 os = oh->slaves[i];
2659 addr_cnt = _count_ocp_if_addr_spaces(os);
2660
2661 for (j = 0; j < addr_cnt; j++) {
2662 (res + r)->name = (os->addr + j)->name;
2663 (res + r)->start = (os->addr + j)->pa_start;
2664 (res + r)->end = (os->addr + j)->pa_end;
2665 (res + r)->flags = IORESOURCE_MEM;
2666 r++;
2667 }
2668 }
2669
2670 return r;
2671 }
2672
2673 /**
2674 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
2675 * @oh: struct omap_hwmod * to operate on
2676 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
2677 * @name: pointer to the name of the data to fetch (optional)
2678 * @rsrc: pointer to a struct resource, allocated by the caller
2679 *
2680 * Retrieve MPU IRQ, SDMA request line, or address space start/end
2681 * data for the IP block pointed to by @oh. The data will be filled
2682 * into a struct resource record pointed to by @rsrc. The struct
2683 * resource must be allocated by the caller. When @name is non-null,
2684 * the data associated with the matching entry in the IRQ/SDMA/address
2685 * space hwmod data arrays will be returned. If @name is null, the
2686 * first array entry will be returned. Data order is not meaningful
2687 * in hwmod data, so callers are strongly encouraged to use a non-null
2688 * @name whenever possible to avoid unpredictable effects if hwmod
2689 * data is later added that causes data ordering to change. This
2690 * function is only intended for use by OMAP core code. Device
2691 * drivers should not call this function - the appropriate bus-related
2692 * data accessor functions should be used instead. Returns 0 upon
2693 * success or a negative error code upon error.
2694 */
2695 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
2696 const char *name, struct resource *rsrc)
2697 {
2698 int r;
2699 unsigned int irq, dma;
2700 u32 pa_start, pa_end;
2701
2702 if (!oh || !rsrc)
2703 return -EINVAL;
2704
2705 if (type == IORESOURCE_IRQ) {
2706 r = _get_mpu_irq_by_name(oh, name, &irq);
2707 if (r)
2708 return r;
2709
2710 rsrc->start = irq;
2711 rsrc->end = irq;
2712 } else if (type == IORESOURCE_DMA) {
2713 r = _get_sdma_req_by_name(oh, name, &dma);
2714 if (r)
2715 return r;
2716
2717 rsrc->start = dma;
2718 rsrc->end = dma;
2719 } else if (type == IORESOURCE_MEM) {
2720 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
2721 if (r)
2722 return r;
2723
2724 rsrc->start = pa_start;
2725 rsrc->end = pa_end;
2726 } else {
2727 return -EINVAL;
2728 }
2729
2730 rsrc->flags = type;
2731 rsrc->name = name;
2732
2733 return 0;
2734 }
2735
2736 /**
2737 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2738 * @oh: struct omap_hwmod *
2739 *
2740 * Return the powerdomain pointer associated with the OMAP module
2741 * @oh's main clock. If @oh does not have a main clk, return the
2742 * powerdomain associated with the interface clock associated with the
2743 * module's MPU port. (XXX Perhaps this should use the SDMA port
2744 * instead?) Returns NULL on error, or a struct powerdomain * on
2745 * success.
2746 */
2747 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2748 {
2749 struct clk *c;
2750
2751 if (!oh)
2752 return NULL;
2753
2754 if (oh->_clk) {
2755 c = oh->_clk;
2756 } else {
2757 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2758 return NULL;
2759 c = oh->slaves[oh->_mpu_port_index]->_clk;
2760 }
2761
2762 if (!c->clkdm)
2763 return NULL;
2764
2765 return c->clkdm->pwrdm.ptr;
2766
2767 }
2768
2769 /**
2770 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
2771 * @oh: struct omap_hwmod *
2772 *
2773 * Returns the virtual address corresponding to the beginning of the
2774 * module's register target, in the address range that is intended to
2775 * be used by the MPU. Returns the virtual address upon success or NULL
2776 * upon error.
2777 */
2778 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
2779 {
2780 if (!oh)
2781 return NULL;
2782
2783 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2784 return NULL;
2785
2786 if (oh->_state == _HWMOD_STATE_UNKNOWN)
2787 return NULL;
2788
2789 return oh->_mpu_rt_va;
2790 }
2791
2792 /**
2793 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
2794 * @oh: struct omap_hwmod *
2795 * @init_oh: struct omap_hwmod * (initiator)
2796 *
2797 * Add a sleep dependency between the initiator @init_oh and @oh.
2798 * Intended to be called by DSP/Bridge code via platform_data for the
2799 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2800 * code needs to add/del initiator dependencies dynamically
2801 * before/after accessing a device. Returns the return value from
2802 * _add_initiator_dep().
2803 *
2804 * XXX Keep a usecount in the clockdomain code
2805 */
2806 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
2807 struct omap_hwmod *init_oh)
2808 {
2809 return _add_initiator_dep(oh, init_oh);
2810 }
2811
2812 /*
2813 * XXX what about functions for drivers to save/restore ocp_sysconfig
2814 * for context save/restore operations?
2815 */
2816
2817 /**
2818 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
2819 * @oh: struct omap_hwmod *
2820 * @init_oh: struct omap_hwmod * (initiator)
2821 *
2822 * Remove a sleep dependency between the initiator @init_oh and @oh.
2823 * Intended to be called by DSP/Bridge code via platform_data for the
2824 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
2825 * code needs to add/del initiator dependencies dynamically
2826 * before/after accessing a device. Returns the return value from
2827 * _del_initiator_dep().
2828 *
2829 * XXX Keep a usecount in the clockdomain code
2830 */
2831 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
2832 struct omap_hwmod *init_oh)
2833 {
2834 return _del_initiator_dep(oh, init_oh);
2835 }
2836
2837 /**
2838 * omap_hwmod_enable_wakeup - allow device to wake up the system
2839 * @oh: struct omap_hwmod *
2840 *
2841 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2842 * send wakeups to the PRCM, and enable I/O ring wakeup events for
2843 * this IP block if it has dynamic mux entries. Eventually this
2844 * should set PRCM wakeup registers to cause the PRCM to receive
2845 * wakeup events from the module. Does not set any wakeup routing
2846 * registers beyond this point - if the module is to wake up any other
2847 * module or subsystem, that must be set separately. Called by
2848 * omap_device code. Returns -EINVAL on error or 0 upon success.
2849 */
2850 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
2851 {
2852 unsigned long flags;
2853 u32 v;
2854
2855 spin_lock_irqsave(&oh->_lock, flags);
2856
2857 if (oh->class->sysc &&
2858 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2859 v = oh->_sysc_cache;
2860 _enable_wakeup(oh, &v);
2861 _write_sysconfig(v, oh);
2862 }
2863
2864 _set_idle_ioring_wakeup(oh, true);
2865 spin_unlock_irqrestore(&oh->_lock, flags);
2866
2867 return 0;
2868 }
2869
2870 /**
2871 * omap_hwmod_disable_wakeup - prevent device from waking the system
2872 * @oh: struct omap_hwmod *
2873 *
2874 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2875 * from sending wakeups to the PRCM, and disable I/O ring wakeup
2876 * events for this IP block if it has dynamic mux entries. Eventually
2877 * this should clear PRCM wakeup registers to cause the PRCM to ignore
2878 * wakeup events from the module. Does not set any wakeup routing
2879 * registers beyond this point - if the module is to wake up any other
2880 * module or subsystem, that must be set separately. Called by
2881 * omap_device code. Returns -EINVAL on error or 0 upon success.
2882 */
2883 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2884 {
2885 unsigned long flags;
2886 u32 v;
2887
2888 spin_lock_irqsave(&oh->_lock, flags);
2889
2890 if (oh->class->sysc &&
2891 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
2892 v = oh->_sysc_cache;
2893 _disable_wakeup(oh, &v);
2894 _write_sysconfig(v, oh);
2895 }
2896
2897 _set_idle_ioring_wakeup(oh, false);
2898 spin_unlock_irqrestore(&oh->_lock, flags);
2899
2900 return 0;
2901 }
2902
2903 /**
2904 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2905 * contained in the hwmod module.
2906 * @oh: struct omap_hwmod *
2907 * @name: name of the reset line to lookup and assert
2908 *
2909 * Some IP like dsp, ipu or iva contain processor that require
2910 * an HW reset line to be assert / deassert in order to enable fully
2911 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2912 * yet supported on this OMAP; otherwise, passes along the return value
2913 * from _assert_hardreset().
2914 */
2915 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2916 {
2917 int ret;
2918 unsigned long flags;
2919
2920 if (!oh)
2921 return -EINVAL;
2922
2923 spin_lock_irqsave(&oh->_lock, flags);
2924 ret = _assert_hardreset(oh, name);
2925 spin_unlock_irqrestore(&oh->_lock, flags);
2926
2927 return ret;
2928 }
2929
2930 /**
2931 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2932 * contained in the hwmod module.
2933 * @oh: struct omap_hwmod *
2934 * @name: name of the reset line to look up and deassert
2935 *
2936 * Some IP like dsp, ipu or iva contain processor that require
2937 * an HW reset line to be assert / deassert in order to enable fully
2938 * the IP. Returns -EINVAL if @oh is null or if the operation is not
2939 * yet supported on this OMAP; otherwise, passes along the return value
2940 * from _deassert_hardreset().
2941 */
2942 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2943 {
2944 int ret;
2945 unsigned long flags;
2946
2947 if (!oh)
2948 return -EINVAL;
2949
2950 spin_lock_irqsave(&oh->_lock, flags);
2951 ret = _deassert_hardreset(oh, name);
2952 spin_unlock_irqrestore(&oh->_lock, flags);
2953
2954 return ret;
2955 }
2956
2957 /**
2958 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2959 * contained in the hwmod module
2960 * @oh: struct omap_hwmod *
2961 * @name: name of the reset line to look up and read
2962 *
2963 * Return the current state of the hwmod @oh's reset line named @name:
2964 * returns -EINVAL upon parameter error or if this operation
2965 * is unsupported on the current OMAP; otherwise, passes along the return
2966 * value from _read_hardreset().
2967 */
2968 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2969 {
2970 int ret;
2971 unsigned long flags;
2972
2973 if (!oh)
2974 return -EINVAL;
2975
2976 spin_lock_irqsave(&oh->_lock, flags);
2977 ret = _read_hardreset(oh, name);
2978 spin_unlock_irqrestore(&oh->_lock, flags);
2979
2980 return ret;
2981 }
2982
2983
2984 /**
2985 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2986 * @classname: struct omap_hwmod_class name to search for
2987 * @fn: callback function pointer to call for each hwmod in class @classname
2988 * @user: arbitrary context data to pass to the callback function
2989 *
2990 * For each omap_hwmod of class @classname, call @fn.
2991 * If the callback function returns something other than
2992 * zero, the iterator is terminated, and the callback function's return
2993 * value is passed back to the caller. Returns 0 upon success, -EINVAL
2994 * if @classname or @fn are NULL, or passes back the error code from @fn.
2995 */
2996 int omap_hwmod_for_each_by_class(const char *classname,
2997 int (*fn)(struct omap_hwmod *oh,
2998 void *user),
2999 void *user)
3000 {
3001 struct omap_hwmod *temp_oh;
3002 int ret = 0;
3003
3004 if (!classname || !fn)
3005 return -EINVAL;
3006
3007 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3008 __func__, classname);
3009
3010 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3011 if (!strcmp(temp_oh->class->name, classname)) {
3012 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3013 __func__, temp_oh->name);
3014 ret = (*fn)(temp_oh, user);
3015 if (ret)
3016 break;
3017 }
3018 }
3019
3020 if (ret)
3021 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3022 __func__, ret);
3023
3024 return ret;
3025 }
3026
3027 /**
3028 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3029 * @oh: struct omap_hwmod *
3030 * @state: state that _setup() should leave the hwmod in
3031 *
3032 * Sets the hwmod state that @oh will enter at the end of _setup()
3033 * (called by omap_hwmod_setup_*()). See also the documentation
3034 * for _setup_postsetup(), above. Returns 0 upon success or
3035 * -EINVAL if there is a problem with the arguments or if the hwmod is
3036 * in the wrong state.
3037 */
3038 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3039 {
3040 int ret;
3041 unsigned long flags;
3042
3043 if (!oh)
3044 return -EINVAL;
3045
3046 if (state != _HWMOD_STATE_DISABLED &&
3047 state != _HWMOD_STATE_ENABLED &&
3048 state != _HWMOD_STATE_IDLE)
3049 return -EINVAL;
3050
3051 spin_lock_irqsave(&oh->_lock, flags);
3052
3053 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3054 ret = -EINVAL;
3055 goto ohsps_unlock;
3056 }
3057
3058 oh->_postsetup_state = state;
3059 ret = 0;
3060
3061 ohsps_unlock:
3062 spin_unlock_irqrestore(&oh->_lock, flags);
3063
3064 return ret;
3065 }
3066
3067 /**
3068 * omap_hwmod_get_context_loss_count - get lost context count
3069 * @oh: struct omap_hwmod *
3070 *
3071 * Query the powerdomain of of @oh to get the context loss
3072 * count for this device.
3073 *
3074 * Returns the context loss count of the powerdomain assocated with @oh
3075 * upon success, or zero if no powerdomain exists for @oh.
3076 */
3077 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3078 {
3079 struct powerdomain *pwrdm;
3080 int ret = 0;
3081
3082 pwrdm = omap_hwmod_get_pwrdm(oh);
3083 if (pwrdm)
3084 ret = pwrdm_get_context_loss_count(pwrdm);
3085
3086 return ret;
3087 }
3088
3089 /**
3090 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3091 * @oh: struct omap_hwmod *
3092 *
3093 * Prevent the hwmod @oh from being reset during the setup process.
3094 * Intended for use by board-*.c files on boards with devices that
3095 * cannot tolerate being reset. Must be called before the hwmod has
3096 * been set up. Returns 0 upon success or negative error code upon
3097 * failure.
3098 */
3099 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3100 {
3101 if (!oh)
3102 return -EINVAL;
3103
3104 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3105 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3106 oh->name);
3107 return -EINVAL;
3108 }
3109
3110 oh->flags |= HWMOD_INIT_NO_RESET;
3111
3112 return 0;
3113 }
3114
3115 /**
3116 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3117 * @oh: struct omap_hwmod * containing hwmod mux entries
3118 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3119 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3120 *
3121 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3122 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3123 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3124 * this function is not called for a given pad_idx, then the ISR
3125 * associated with @oh's first MPU IRQ will be triggered when an I/O
3126 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3127 * the _dynamic or wakeup_ entry: if there are other entries not
3128 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3129 * entries are NOT COUNTED in the dynamic pad index. This function
3130 * must be called separately for each pad that requires its interrupt
3131 * to be re-routed this way. Returns -EINVAL if there is an argument
3132 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3133 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3134 *
3135 * XXX This function interface is fragile. Rather than using array
3136 * indexes, which are subject to unpredictable change, it should be
3137 * using hwmod IRQ names, and some other stable key for the hwmod mux
3138 * pad records.
3139 */
3140 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3141 {
3142 int nr_irqs;
3143
3144 might_sleep();
3145
3146 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3147 pad_idx >= oh->mux->nr_pads_dynamic)
3148 return -EINVAL;
3149
3150 /* Check the number of available mpu_irqs */
3151 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
3152 ;
3153
3154 if (irq_idx >= nr_irqs)
3155 return -EINVAL;
3156
3157 if (!oh->mux->irqs) {
3158 /* XXX What frees this? */
3159 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
3160 GFP_KERNEL);
3161 if (!oh->mux->irqs)
3162 return -ENOMEM;
3163 }
3164 oh->mux->irqs[pad_idx] = irq_idx;
3165
3166 return 0;
3167 }
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