Merge tag 'writeback-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/wfg...
[deliverable/linux.git] / arch / arm / mach-omap2 / omap_hwmod.c
1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128 #undef DEBUG
129
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk-provider.h>
134 #include <linux/delay.h>
135 #include <linux/err.h>
136 #include <linux/list.h>
137 #include <linux/mutex.h>
138 #include <linux/spinlock.h>
139 #include <linux/slab.h>
140 #include <linux/bootmem.h>
141
142 #include <asm/system_misc.h>
143
144 #include "clock.h"
145 #include "omap_hwmod.h"
146
147 #include "soc.h"
148 #include "common.h"
149 #include "clockdomain.h"
150 #include "powerdomain.h"
151 #include "cm2xxx.h"
152 #include "cm3xxx.h"
153 #include "cminst44xx.h"
154 #include "cm33xx.h"
155 #include "prm.h"
156 #include "prm3xxx.h"
157 #include "prm44xx.h"
158 #include "prm33xx.h"
159 #include "prminst44xx.h"
160 #include "mux.h"
161 #include "pm.h"
162
163 /* Name of the OMAP hwmod for the MPU */
164 #define MPU_INITIATOR_NAME "mpu"
165
166 /*
167 * Number of struct omap_hwmod_link records per struct
168 * omap_hwmod_ocp_if record (master->slave and slave->master)
169 */
170 #define LINKS_PER_OCP_IF 2
171
172 /**
173 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
174 * @enable_module: function to enable a module (via MODULEMODE)
175 * @disable_module: function to disable a module (via MODULEMODE)
176 *
177 * XXX Eventually this functionality will be hidden inside the PRM/CM
178 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
179 * conditionals in this code.
180 */
181 struct omap_hwmod_soc_ops {
182 void (*enable_module)(struct omap_hwmod *oh);
183 int (*disable_module)(struct omap_hwmod *oh);
184 int (*wait_target_ready)(struct omap_hwmod *oh);
185 int (*assert_hardreset)(struct omap_hwmod *oh,
186 struct omap_hwmod_rst_info *ohri);
187 int (*deassert_hardreset)(struct omap_hwmod *oh,
188 struct omap_hwmod_rst_info *ohri);
189 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
190 struct omap_hwmod_rst_info *ohri);
191 int (*init_clkdm)(struct omap_hwmod *oh);
192 void (*update_context_lost)(struct omap_hwmod *oh);
193 int (*get_context_lost)(struct omap_hwmod *oh);
194 };
195
196 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
197 static struct omap_hwmod_soc_ops soc_ops;
198
199 /* omap_hwmod_list contains all registered struct omap_hwmods */
200 static LIST_HEAD(omap_hwmod_list);
201
202 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
203 static struct omap_hwmod *mpu_oh;
204
205 /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
206 static DEFINE_SPINLOCK(io_chain_lock);
207
208 /*
209 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
210 * allocated from - used to reduce the number of small memory
211 * allocations, which has a significant impact on performance
212 */
213 static struct omap_hwmod_link *linkspace;
214
215 /*
216 * free_ls, max_ls: array indexes into linkspace; representing the
217 * next free struct omap_hwmod_link index, and the maximum number of
218 * struct omap_hwmod_link records allocated (respectively)
219 */
220 static unsigned short free_ls, max_ls, ls_supp;
221
222 /* inited: set to true once the hwmod code is initialized */
223 static bool inited;
224
225 /* Private functions */
226
227 /**
228 * _fetch_next_ocp_if - return the next OCP interface in a list
229 * @p: ptr to a ptr to the list_head inside the ocp_if to return
230 * @i: pointer to the index of the element pointed to by @p in the list
231 *
232 * Return a pointer to the struct omap_hwmod_ocp_if record
233 * containing the struct list_head pointed to by @p, and increment
234 * @p such that a future call to this routine will return the next
235 * record.
236 */
237 static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
238 int *i)
239 {
240 struct omap_hwmod_ocp_if *oi;
241
242 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
243 *p = (*p)->next;
244
245 *i = *i + 1;
246
247 return oi;
248 }
249
250 /**
251 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
252 * @oh: struct omap_hwmod *
253 *
254 * Load the current value of the hwmod OCP_SYSCONFIG register into the
255 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
256 * OCP_SYSCONFIG register or 0 upon success.
257 */
258 static int _update_sysc_cache(struct omap_hwmod *oh)
259 {
260 if (!oh->class->sysc) {
261 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
262 return -EINVAL;
263 }
264
265 /* XXX ensure module interface clock is up */
266
267 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
268
269 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
270 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
271
272 return 0;
273 }
274
275 /**
276 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
277 * @v: OCP_SYSCONFIG value to write
278 * @oh: struct omap_hwmod *
279 *
280 * Write @v into the module class' OCP_SYSCONFIG register, if it has
281 * one. No return value.
282 */
283 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
284 {
285 if (!oh->class->sysc) {
286 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
287 return;
288 }
289
290 /* XXX ensure module interface clock is up */
291
292 /* Module might have lost context, always update cache and register */
293 oh->_sysc_cache = v;
294 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
295 }
296
297 /**
298 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
299 * @oh: struct omap_hwmod *
300 * @standbymode: MIDLEMODE field bits
301 * @v: pointer to register contents to modify
302 *
303 * Update the master standby mode bits in @v to be @standbymode for
304 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
305 * upon error or 0 upon success.
306 */
307 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
308 u32 *v)
309 {
310 u32 mstandby_mask;
311 u8 mstandby_shift;
312
313 if (!oh->class->sysc ||
314 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
315 return -EINVAL;
316
317 if (!oh->class->sysc->sysc_fields) {
318 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
319 return -EINVAL;
320 }
321
322 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
323 mstandby_mask = (0x3 << mstandby_shift);
324
325 *v &= ~mstandby_mask;
326 *v |= __ffs(standbymode) << mstandby_shift;
327
328 return 0;
329 }
330
331 /**
332 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
333 * @oh: struct omap_hwmod *
334 * @idlemode: SIDLEMODE field bits
335 * @v: pointer to register contents to modify
336 *
337 * Update the slave idle mode bits in @v to be @idlemode for the @oh
338 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
339 * or 0 upon success.
340 */
341 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
342 {
343 u32 sidle_mask;
344 u8 sidle_shift;
345
346 if (!oh->class->sysc ||
347 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
348 return -EINVAL;
349
350 if (!oh->class->sysc->sysc_fields) {
351 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
352 return -EINVAL;
353 }
354
355 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
356 sidle_mask = (0x3 << sidle_shift);
357
358 *v &= ~sidle_mask;
359 *v |= __ffs(idlemode) << sidle_shift;
360
361 return 0;
362 }
363
364 /**
365 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
366 * @oh: struct omap_hwmod *
367 * @clockact: CLOCKACTIVITY field bits
368 * @v: pointer to register contents to modify
369 *
370 * Update the clockactivity mode bits in @v to be @clockact for the
371 * @oh hwmod. Used for additional powersaving on some modules. Does
372 * not write to the hardware. Returns -EINVAL upon error or 0 upon
373 * success.
374 */
375 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
376 {
377 u32 clkact_mask;
378 u8 clkact_shift;
379
380 if (!oh->class->sysc ||
381 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
382 return -EINVAL;
383
384 if (!oh->class->sysc->sysc_fields) {
385 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
386 return -EINVAL;
387 }
388
389 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
390 clkact_mask = (0x3 << clkact_shift);
391
392 *v &= ~clkact_mask;
393 *v |= clockact << clkact_shift;
394
395 return 0;
396 }
397
398 /**
399 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
400 * @oh: struct omap_hwmod *
401 * @v: pointer to register contents to modify
402 *
403 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
404 * error or 0 upon success.
405 */
406 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
407 {
408 u32 softrst_mask;
409
410 if (!oh->class->sysc ||
411 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
412 return -EINVAL;
413
414 if (!oh->class->sysc->sysc_fields) {
415 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
416 return -EINVAL;
417 }
418
419 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
420
421 *v |= softrst_mask;
422
423 return 0;
424 }
425
426 /**
427 * _wait_softreset_complete - wait for an OCP softreset to complete
428 * @oh: struct omap_hwmod * to wait on
429 *
430 * Wait until the IP block represented by @oh reports that its OCP
431 * softreset is complete. This can be triggered by software (see
432 * _ocp_softreset()) or by hardware upon returning from off-mode (one
433 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
434 * microseconds. Returns the number of microseconds waited.
435 */
436 static int _wait_softreset_complete(struct omap_hwmod *oh)
437 {
438 struct omap_hwmod_class_sysconfig *sysc;
439 u32 softrst_mask;
440 int c = 0;
441
442 sysc = oh->class->sysc;
443
444 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
445 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
446 & SYSS_RESETDONE_MASK),
447 MAX_MODULE_SOFTRESET_WAIT, c);
448 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
449 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
450 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
451 & softrst_mask),
452 MAX_MODULE_SOFTRESET_WAIT, c);
453 }
454
455 return c;
456 }
457
458 /**
459 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
460 * @oh: struct omap_hwmod *
461 *
462 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
463 * of some modules. When the DMA must perform read/write accesses, the
464 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
465 * for power management, software must set the DMADISABLE bit back to 1.
466 *
467 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
468 * error or 0 upon success.
469 */
470 static int _set_dmadisable(struct omap_hwmod *oh)
471 {
472 u32 v;
473 u32 dmadisable_mask;
474
475 if (!oh->class->sysc ||
476 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
477 return -EINVAL;
478
479 if (!oh->class->sysc->sysc_fields) {
480 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
481 return -EINVAL;
482 }
483
484 /* clocks must be on for this operation */
485 if (oh->_state != _HWMOD_STATE_ENABLED) {
486 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
487 return -EINVAL;
488 }
489
490 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
491
492 v = oh->_sysc_cache;
493 dmadisable_mask =
494 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
495 v |= dmadisable_mask;
496 _write_sysconfig(v, oh);
497
498 return 0;
499 }
500
501 /**
502 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
503 * @oh: struct omap_hwmod *
504 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
505 * @v: pointer to register contents to modify
506 *
507 * Update the module autoidle bit in @v to be @autoidle for the @oh
508 * hwmod. The autoidle bit controls whether the module can gate
509 * internal clocks automatically when it isn't doing anything; the
510 * exact function of this bit varies on a per-module basis. This
511 * function does not write to the hardware. Returns -EINVAL upon
512 * error or 0 upon success.
513 */
514 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
515 u32 *v)
516 {
517 u32 autoidle_mask;
518 u8 autoidle_shift;
519
520 if (!oh->class->sysc ||
521 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
522 return -EINVAL;
523
524 if (!oh->class->sysc->sysc_fields) {
525 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
526 return -EINVAL;
527 }
528
529 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
530 autoidle_mask = (0x1 << autoidle_shift);
531
532 *v &= ~autoidle_mask;
533 *v |= autoidle << autoidle_shift;
534
535 return 0;
536 }
537
538 /**
539 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
540 * @oh: struct omap_hwmod *
541 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
542 *
543 * Set or clear the I/O pad wakeup flag in the mux entries for the
544 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
545 * in memory. If the hwmod is currently idled, and the new idle
546 * values don't match the previous ones, this function will also
547 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
548 * currently idled, this function won't touch the hardware: the new
549 * mux settings are written to the SCM PADCTRL registers when the
550 * hwmod is idled. No return value.
551 */
552 static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
553 {
554 struct omap_device_pad *pad;
555 bool change = false;
556 u16 prev_idle;
557 int j;
558
559 if (!oh->mux || !oh->mux->enabled)
560 return;
561
562 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
563 pad = oh->mux->pads_dynamic[j];
564
565 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
566 continue;
567
568 prev_idle = pad->idle;
569
570 if (set_wake)
571 pad->idle |= OMAP_WAKEUP_EN;
572 else
573 pad->idle &= ~OMAP_WAKEUP_EN;
574
575 if (prev_idle != pad->idle)
576 change = true;
577 }
578
579 if (change && oh->_state == _HWMOD_STATE_IDLE)
580 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
581 }
582
583 /**
584 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
585 * @oh: struct omap_hwmod *
586 *
587 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
588 * upon error or 0 upon success.
589 */
590 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
591 {
592 if (!oh->class->sysc ||
593 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
594 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
595 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
596 return -EINVAL;
597
598 if (!oh->class->sysc->sysc_fields) {
599 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
600 return -EINVAL;
601 }
602
603 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
604 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
605
606 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
607 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
608 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
609 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
610
611 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
612
613 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
614
615 return 0;
616 }
617
618 /**
619 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
620 * @oh: struct omap_hwmod *
621 *
622 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
623 * upon error or 0 upon success.
624 */
625 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
626 {
627 if (!oh->class->sysc ||
628 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
629 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
630 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
631 return -EINVAL;
632
633 if (!oh->class->sysc->sysc_fields) {
634 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
635 return -EINVAL;
636 }
637
638 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
639 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
640
641 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
642 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
643 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
644 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
645
646 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
647
648 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
649
650 return 0;
651 }
652
653 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
654 {
655 struct clk_hw_omap *clk;
656
657 if (oh->clkdm) {
658 return oh->clkdm;
659 } else if (oh->_clk) {
660 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
661 return clk->clkdm;
662 }
663 return NULL;
664 }
665
666 /**
667 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
668 * @oh: struct omap_hwmod *
669 *
670 * Prevent the hardware module @oh from entering idle while the
671 * hardare module initiator @init_oh is active. Useful when a module
672 * will be accessed by a particular initiator (e.g., if a module will
673 * be accessed by the IVA, there should be a sleepdep between the IVA
674 * initiator and the module). Only applies to modules in smart-idle
675 * mode. If the clockdomain is marked as not needing autodeps, return
676 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
677 * passes along clkdm_add_sleepdep() value upon success.
678 */
679 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
680 {
681 struct clockdomain *clkdm, *init_clkdm;
682
683 clkdm = _get_clkdm(oh);
684 init_clkdm = _get_clkdm(init_oh);
685
686 if (!clkdm || !init_clkdm)
687 return -EINVAL;
688
689 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
690 return 0;
691
692 return clkdm_add_sleepdep(clkdm, init_clkdm);
693 }
694
695 /**
696 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
697 * @oh: struct omap_hwmod *
698 *
699 * Allow the hardware module @oh to enter idle while the hardare
700 * module initiator @init_oh is active. Useful when a module will not
701 * be accessed by a particular initiator (e.g., if a module will not
702 * be accessed by the IVA, there should be no sleepdep between the IVA
703 * initiator and the module). Only applies to modules in smart-idle
704 * mode. If the clockdomain is marked as not needing autodeps, return
705 * 0 without doing anything. Returns -EINVAL upon error or passes
706 * along clkdm_del_sleepdep() value upon success.
707 */
708 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
709 {
710 struct clockdomain *clkdm, *init_clkdm;
711
712 clkdm = _get_clkdm(oh);
713 init_clkdm = _get_clkdm(init_oh);
714
715 if (!clkdm || !init_clkdm)
716 return -EINVAL;
717
718 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
719 return 0;
720
721 return clkdm_del_sleepdep(clkdm, init_clkdm);
722 }
723
724 /**
725 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
726 * @oh: struct omap_hwmod *
727 *
728 * Called from _init_clocks(). Populates the @oh _clk (main
729 * functional clock pointer) if a main_clk is present. Returns 0 on
730 * success or -EINVAL on error.
731 */
732 static int _init_main_clk(struct omap_hwmod *oh)
733 {
734 int ret = 0;
735
736 if (!oh->main_clk)
737 return 0;
738
739 oh->_clk = clk_get(NULL, oh->main_clk);
740 if (IS_ERR(oh->_clk)) {
741 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
742 oh->name, oh->main_clk);
743 return -EINVAL;
744 }
745 /*
746 * HACK: This needs a re-visit once clk_prepare() is implemented
747 * to do something meaningful. Today its just a no-op.
748 * If clk_prepare() is used at some point to do things like
749 * voltage scaling etc, then this would have to be moved to
750 * some point where subsystems like i2c and pmic become
751 * available.
752 */
753 clk_prepare(oh->_clk);
754
755 if (!_get_clkdm(oh))
756 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
757 oh->name, oh->main_clk);
758
759 return ret;
760 }
761
762 /**
763 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
764 * @oh: struct omap_hwmod *
765 *
766 * Called from _init_clocks(). Populates the @oh OCP slave interface
767 * clock pointers. Returns 0 on success or -EINVAL on error.
768 */
769 static int _init_interface_clks(struct omap_hwmod *oh)
770 {
771 struct omap_hwmod_ocp_if *os;
772 struct list_head *p;
773 struct clk *c;
774 int i = 0;
775 int ret = 0;
776
777 p = oh->slave_ports.next;
778
779 while (i < oh->slaves_cnt) {
780 os = _fetch_next_ocp_if(&p, &i);
781 if (!os->clk)
782 continue;
783
784 c = clk_get(NULL, os->clk);
785 if (IS_ERR(c)) {
786 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
787 oh->name, os->clk);
788 ret = -EINVAL;
789 }
790 os->_clk = c;
791 /*
792 * HACK: This needs a re-visit once clk_prepare() is implemented
793 * to do something meaningful. Today its just a no-op.
794 * If clk_prepare() is used at some point to do things like
795 * voltage scaling etc, then this would have to be moved to
796 * some point where subsystems like i2c and pmic become
797 * available.
798 */
799 clk_prepare(os->_clk);
800 }
801
802 return ret;
803 }
804
805 /**
806 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
807 * @oh: struct omap_hwmod *
808 *
809 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
810 * clock pointers. Returns 0 on success or -EINVAL on error.
811 */
812 static int _init_opt_clks(struct omap_hwmod *oh)
813 {
814 struct omap_hwmod_opt_clk *oc;
815 struct clk *c;
816 int i;
817 int ret = 0;
818
819 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
820 c = clk_get(NULL, oc->clk);
821 if (IS_ERR(c)) {
822 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
823 oh->name, oc->clk);
824 ret = -EINVAL;
825 }
826 oc->_clk = c;
827 /*
828 * HACK: This needs a re-visit once clk_prepare() is implemented
829 * to do something meaningful. Today its just a no-op.
830 * If clk_prepare() is used at some point to do things like
831 * voltage scaling etc, then this would have to be moved to
832 * some point where subsystems like i2c and pmic become
833 * available.
834 */
835 clk_prepare(oc->_clk);
836 }
837
838 return ret;
839 }
840
841 /**
842 * _enable_clocks - enable hwmod main clock and interface clocks
843 * @oh: struct omap_hwmod *
844 *
845 * Enables all clocks necessary for register reads and writes to succeed
846 * on the hwmod @oh. Returns 0.
847 */
848 static int _enable_clocks(struct omap_hwmod *oh)
849 {
850 struct omap_hwmod_ocp_if *os;
851 struct list_head *p;
852 int i = 0;
853
854 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
855
856 if (oh->_clk)
857 clk_enable(oh->_clk);
858
859 p = oh->slave_ports.next;
860
861 while (i < oh->slaves_cnt) {
862 os = _fetch_next_ocp_if(&p, &i);
863
864 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
865 clk_enable(os->_clk);
866 }
867
868 /* The opt clocks are controlled by the device driver. */
869
870 return 0;
871 }
872
873 /**
874 * _disable_clocks - disable hwmod main clock and interface clocks
875 * @oh: struct omap_hwmod *
876 *
877 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
878 */
879 static int _disable_clocks(struct omap_hwmod *oh)
880 {
881 struct omap_hwmod_ocp_if *os;
882 struct list_head *p;
883 int i = 0;
884
885 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
886
887 if (oh->_clk)
888 clk_disable(oh->_clk);
889
890 p = oh->slave_ports.next;
891
892 while (i < oh->slaves_cnt) {
893 os = _fetch_next_ocp_if(&p, &i);
894
895 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
896 clk_disable(os->_clk);
897 }
898
899 /* The opt clocks are controlled by the device driver. */
900
901 return 0;
902 }
903
904 static void _enable_optional_clocks(struct omap_hwmod *oh)
905 {
906 struct omap_hwmod_opt_clk *oc;
907 int i;
908
909 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
910
911 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
912 if (oc->_clk) {
913 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
914 __clk_get_name(oc->_clk));
915 clk_enable(oc->_clk);
916 }
917 }
918
919 static void _disable_optional_clocks(struct omap_hwmod *oh)
920 {
921 struct omap_hwmod_opt_clk *oc;
922 int i;
923
924 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
925
926 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
927 if (oc->_clk) {
928 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
929 __clk_get_name(oc->_clk));
930 clk_disable(oc->_clk);
931 }
932 }
933
934 /**
935 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
936 * @oh: struct omap_hwmod *
937 *
938 * Enables the PRCM module mode related to the hwmod @oh.
939 * No return value.
940 */
941 static void _omap4_enable_module(struct omap_hwmod *oh)
942 {
943 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
944 return;
945
946 pr_debug("omap_hwmod: %s: %s: %d\n",
947 oh->name, __func__, oh->prcm.omap4.modulemode);
948
949 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
950 oh->clkdm->prcm_partition,
951 oh->clkdm->cm_inst,
952 oh->clkdm->clkdm_offs,
953 oh->prcm.omap4.clkctrl_offs);
954 }
955
956 /**
957 * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
958 * @oh: struct omap_hwmod *
959 *
960 * Enables the PRCM module mode related to the hwmod @oh.
961 * No return value.
962 */
963 static void _am33xx_enable_module(struct omap_hwmod *oh)
964 {
965 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
966 return;
967
968 pr_debug("omap_hwmod: %s: %s: %d\n",
969 oh->name, __func__, oh->prcm.omap4.modulemode);
970
971 am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
972 oh->clkdm->clkdm_offs,
973 oh->prcm.omap4.clkctrl_offs);
974 }
975
976 /**
977 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
978 * @oh: struct omap_hwmod *
979 *
980 * Wait for a module @oh to enter slave idle. Returns 0 if the module
981 * does not have an IDLEST bit or if the module successfully enters
982 * slave idle; otherwise, pass along the return value of the
983 * appropriate *_cm*_wait_module_idle() function.
984 */
985 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
986 {
987 if (!oh)
988 return -EINVAL;
989
990 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
991 return 0;
992
993 if (oh->flags & HWMOD_NO_IDLEST)
994 return 0;
995
996 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
997 oh->clkdm->cm_inst,
998 oh->clkdm->clkdm_offs,
999 oh->prcm.omap4.clkctrl_offs);
1000 }
1001
1002 /**
1003 * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
1004 * @oh: struct omap_hwmod *
1005 *
1006 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1007 * does not have an IDLEST bit or if the module successfully enters
1008 * slave idle; otherwise, pass along the return value of the
1009 * appropriate *_cm*_wait_module_idle() function.
1010 */
1011 static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
1012 {
1013 if (!oh)
1014 return -EINVAL;
1015
1016 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1017 return 0;
1018
1019 if (oh->flags & HWMOD_NO_IDLEST)
1020 return 0;
1021
1022 return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
1023 oh->clkdm->clkdm_offs,
1024 oh->prcm.omap4.clkctrl_offs);
1025 }
1026
1027 /**
1028 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
1029 * @oh: struct omap_hwmod *oh
1030 *
1031 * Count and return the number of MPU IRQs associated with the hwmod
1032 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
1033 * NULL.
1034 */
1035 static int _count_mpu_irqs(struct omap_hwmod *oh)
1036 {
1037 struct omap_hwmod_irq_info *ohii;
1038 int i = 0;
1039
1040 if (!oh || !oh->mpu_irqs)
1041 return 0;
1042
1043 do {
1044 ohii = &oh->mpu_irqs[i++];
1045 } while (ohii->irq != -1);
1046
1047 return i-1;
1048 }
1049
1050 /**
1051 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
1052 * @oh: struct omap_hwmod *oh
1053 *
1054 * Count and return the number of SDMA request lines associated with
1055 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1056 * if @oh is NULL.
1057 */
1058 static int _count_sdma_reqs(struct omap_hwmod *oh)
1059 {
1060 struct omap_hwmod_dma_info *ohdi;
1061 int i = 0;
1062
1063 if (!oh || !oh->sdma_reqs)
1064 return 0;
1065
1066 do {
1067 ohdi = &oh->sdma_reqs[i++];
1068 } while (ohdi->dma_req != -1);
1069
1070 return i-1;
1071 }
1072
1073 /**
1074 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1075 * @oh: struct omap_hwmod *oh
1076 *
1077 * Count and return the number of address space ranges associated with
1078 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1079 * if @oh is NULL.
1080 */
1081 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1082 {
1083 struct omap_hwmod_addr_space *mem;
1084 int i = 0;
1085
1086 if (!os || !os->addr)
1087 return 0;
1088
1089 do {
1090 mem = &os->addr[i++];
1091 } while (mem->pa_start != mem->pa_end);
1092
1093 return i-1;
1094 }
1095
1096 /**
1097 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1098 * @oh: struct omap_hwmod * to operate on
1099 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1100 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1101 *
1102 * Retrieve a MPU hardware IRQ line number named by @name associated
1103 * with the IP block pointed to by @oh. The IRQ number will be filled
1104 * into the address pointed to by @dma. When @name is non-null, the
1105 * IRQ line number associated with the named entry will be returned.
1106 * If @name is null, the first matching entry will be returned. Data
1107 * order is not meaningful in hwmod data, so callers are strongly
1108 * encouraged to use a non-null @name whenever possible to avoid
1109 * unpredictable effects if hwmod data is later added that causes data
1110 * ordering to change. Returns 0 upon success or a negative error
1111 * code upon error.
1112 */
1113 static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1114 unsigned int *irq)
1115 {
1116 int i;
1117 bool found = false;
1118
1119 if (!oh->mpu_irqs)
1120 return -ENOENT;
1121
1122 i = 0;
1123 while (oh->mpu_irqs[i].irq != -1) {
1124 if (name == oh->mpu_irqs[i].name ||
1125 !strcmp(name, oh->mpu_irqs[i].name)) {
1126 found = true;
1127 break;
1128 }
1129 i++;
1130 }
1131
1132 if (!found)
1133 return -ENOENT;
1134
1135 *irq = oh->mpu_irqs[i].irq;
1136
1137 return 0;
1138 }
1139
1140 /**
1141 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1142 * @oh: struct omap_hwmod * to operate on
1143 * @name: pointer to the name of the SDMA request line to fetch (optional)
1144 * @dma: pointer to an unsigned int to store the request line ID to
1145 *
1146 * Retrieve an SDMA request line ID named by @name on the IP block
1147 * pointed to by @oh. The ID will be filled into the address pointed
1148 * to by @dma. When @name is non-null, the request line ID associated
1149 * with the named entry will be returned. If @name is null, the first
1150 * matching entry will be returned. Data order is not meaningful in
1151 * hwmod data, so callers are strongly encouraged to use a non-null
1152 * @name whenever possible to avoid unpredictable effects if hwmod
1153 * data is later added that causes data ordering to change. Returns 0
1154 * upon success or a negative error code upon error.
1155 */
1156 static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1157 unsigned int *dma)
1158 {
1159 int i;
1160 bool found = false;
1161
1162 if (!oh->sdma_reqs)
1163 return -ENOENT;
1164
1165 i = 0;
1166 while (oh->sdma_reqs[i].dma_req != -1) {
1167 if (name == oh->sdma_reqs[i].name ||
1168 !strcmp(name, oh->sdma_reqs[i].name)) {
1169 found = true;
1170 break;
1171 }
1172 i++;
1173 }
1174
1175 if (!found)
1176 return -ENOENT;
1177
1178 *dma = oh->sdma_reqs[i].dma_req;
1179
1180 return 0;
1181 }
1182
1183 /**
1184 * _get_addr_space_by_name - fetch address space start & end by name
1185 * @oh: struct omap_hwmod * to operate on
1186 * @name: pointer to the name of the address space to fetch (optional)
1187 * @pa_start: pointer to a u32 to store the starting address to
1188 * @pa_end: pointer to a u32 to store the ending address to
1189 *
1190 * Retrieve address space start and end addresses for the IP block
1191 * pointed to by @oh. The data will be filled into the addresses
1192 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1193 * address space data associated with the named entry will be
1194 * returned. If @name is null, the first matching entry will be
1195 * returned. Data order is not meaningful in hwmod data, so callers
1196 * are strongly encouraged to use a non-null @name whenever possible
1197 * to avoid unpredictable effects if hwmod data is later added that
1198 * causes data ordering to change. Returns 0 upon success or a
1199 * negative error code upon error.
1200 */
1201 static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1202 u32 *pa_start, u32 *pa_end)
1203 {
1204 int i, j;
1205 struct omap_hwmod_ocp_if *os;
1206 struct list_head *p = NULL;
1207 bool found = false;
1208
1209 p = oh->slave_ports.next;
1210
1211 i = 0;
1212 while (i < oh->slaves_cnt) {
1213 os = _fetch_next_ocp_if(&p, &i);
1214
1215 if (!os->addr)
1216 return -ENOENT;
1217
1218 j = 0;
1219 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1220 if (name == os->addr[j].name ||
1221 !strcmp(name, os->addr[j].name)) {
1222 found = true;
1223 break;
1224 }
1225 j++;
1226 }
1227
1228 if (found)
1229 break;
1230 }
1231
1232 if (!found)
1233 return -ENOENT;
1234
1235 *pa_start = os->addr[j].pa_start;
1236 *pa_end = os->addr[j].pa_end;
1237
1238 return 0;
1239 }
1240
1241 /**
1242 * _save_mpu_port_index - find and save the index to @oh's MPU port
1243 * @oh: struct omap_hwmod *
1244 *
1245 * Determines the array index of the OCP slave port that the MPU uses
1246 * to address the device, and saves it into the struct omap_hwmod.
1247 * Intended to be called during hwmod registration only. No return
1248 * value.
1249 */
1250 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1251 {
1252 struct omap_hwmod_ocp_if *os = NULL;
1253 struct list_head *p;
1254 int i = 0;
1255
1256 if (!oh)
1257 return;
1258
1259 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1260
1261 p = oh->slave_ports.next;
1262
1263 while (i < oh->slaves_cnt) {
1264 os = _fetch_next_ocp_if(&p, &i);
1265 if (os->user & OCP_USER_MPU) {
1266 oh->_mpu_port = os;
1267 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1268 break;
1269 }
1270 }
1271
1272 return;
1273 }
1274
1275 /**
1276 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1277 * @oh: struct omap_hwmod *
1278 *
1279 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1280 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1281 * communicate with the IP block. This interface need not be directly
1282 * connected to the MPU (and almost certainly is not), but is directly
1283 * connected to the IP block represented by @oh. Returns a pointer
1284 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1285 * error or if there does not appear to be a path from the MPU to this
1286 * IP block.
1287 */
1288 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1289 {
1290 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1291 return NULL;
1292
1293 return oh->_mpu_port;
1294 };
1295
1296 /**
1297 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
1298 * @oh: struct omap_hwmod *
1299 *
1300 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1301 * the register target MPU address space; or returns NULL upon error.
1302 */
1303 static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
1304 {
1305 struct omap_hwmod_ocp_if *os;
1306 struct omap_hwmod_addr_space *mem;
1307 int found = 0, i = 0;
1308
1309 os = _find_mpu_rt_port(oh);
1310 if (!os || !os->addr)
1311 return NULL;
1312
1313 do {
1314 mem = &os->addr[i++];
1315 if (mem->flags & ADDR_TYPE_RT)
1316 found = 1;
1317 } while (!found && mem->pa_start != mem->pa_end);
1318
1319 return (found) ? mem : NULL;
1320 }
1321
1322 /**
1323 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1324 * @oh: struct omap_hwmod *
1325 *
1326 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1327 * by @oh is set to indicate to the PRCM that the IP block is active.
1328 * Usually this means placing the module into smart-idle mode and
1329 * smart-standby, but if there is a bug in the automatic idle handling
1330 * for the IP block, it may need to be placed into the force-idle or
1331 * no-idle variants of these modes. No return value.
1332 */
1333 static void _enable_sysc(struct omap_hwmod *oh)
1334 {
1335 u8 idlemode, sf;
1336 u32 v;
1337 bool clkdm_act;
1338 struct clockdomain *clkdm;
1339
1340 if (!oh->class->sysc)
1341 return;
1342
1343 /*
1344 * Wait until reset has completed, this is needed as the IP
1345 * block is reset automatically by hardware in some cases
1346 * (off-mode for example), and the drivers require the
1347 * IP to be ready when they access it
1348 */
1349 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1350 _enable_optional_clocks(oh);
1351 _wait_softreset_complete(oh);
1352 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1353 _disable_optional_clocks(oh);
1354
1355 v = oh->_sysc_cache;
1356 sf = oh->class->sysc->sysc_flags;
1357
1358 clkdm = _get_clkdm(oh);
1359 if (sf & SYSC_HAS_SIDLEMODE) {
1360 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1361 if (clkdm_act && !(oh->class->sysc->idlemodes &
1362 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1363 idlemode = HWMOD_IDLEMODE_FORCE;
1364 else
1365 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1366 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
1367 _set_slave_idlemode(oh, idlemode, &v);
1368 }
1369
1370 if (sf & SYSC_HAS_MIDLEMODE) {
1371 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1372 idlemode = HWMOD_IDLEMODE_NO;
1373 } else {
1374 if (sf & SYSC_HAS_ENAWAKEUP)
1375 _enable_wakeup(oh, &v);
1376 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1377 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1378 else
1379 idlemode = HWMOD_IDLEMODE_SMART;
1380 }
1381 _set_master_standbymode(oh, idlemode, &v);
1382 }
1383
1384 /*
1385 * XXX The clock framework should handle this, by
1386 * calling into this code. But this must wait until the
1387 * clock structures are tagged with omap_hwmod entries
1388 */
1389 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1390 (sf & SYSC_HAS_CLOCKACTIVITY))
1391 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
1392
1393 /* If slave is in SMARTIDLE, also enable wakeup */
1394 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1395 _enable_wakeup(oh, &v);
1396
1397 _write_sysconfig(v, oh);
1398
1399 /*
1400 * Set the autoidle bit only after setting the smartidle bit
1401 * Setting this will not have any impact on the other modules.
1402 */
1403 if (sf & SYSC_HAS_AUTOIDLE) {
1404 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1405 0 : 1;
1406 _set_module_autoidle(oh, idlemode, &v);
1407 _write_sysconfig(v, oh);
1408 }
1409 }
1410
1411 /**
1412 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1413 * @oh: struct omap_hwmod *
1414 *
1415 * If module is marked as SWSUP_SIDLE, force the module into slave
1416 * idle; otherwise, configure it for smart-idle. If module is marked
1417 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1418 * configure it for smart-standby. No return value.
1419 */
1420 static void _idle_sysc(struct omap_hwmod *oh)
1421 {
1422 u8 idlemode, sf;
1423 u32 v;
1424
1425 if (!oh->class->sysc)
1426 return;
1427
1428 v = oh->_sysc_cache;
1429 sf = oh->class->sysc->sysc_flags;
1430
1431 if (sf & SYSC_HAS_SIDLEMODE) {
1432 /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
1433 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1434 !(oh->class->sysc->idlemodes &
1435 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1436 idlemode = HWMOD_IDLEMODE_FORCE;
1437 else
1438 idlemode = HWMOD_IDLEMODE_SMART;
1439 _set_slave_idlemode(oh, idlemode, &v);
1440 }
1441
1442 if (sf & SYSC_HAS_MIDLEMODE) {
1443 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1444 idlemode = HWMOD_IDLEMODE_FORCE;
1445 } else {
1446 if (sf & SYSC_HAS_ENAWAKEUP)
1447 _enable_wakeup(oh, &v);
1448 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1449 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1450 else
1451 idlemode = HWMOD_IDLEMODE_SMART;
1452 }
1453 _set_master_standbymode(oh, idlemode, &v);
1454 }
1455
1456 /* If slave is in SMARTIDLE, also enable wakeup */
1457 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1458 _enable_wakeup(oh, &v);
1459
1460 _write_sysconfig(v, oh);
1461 }
1462
1463 /**
1464 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1465 * @oh: struct omap_hwmod *
1466 *
1467 * Force the module into slave idle and master suspend. No return
1468 * value.
1469 */
1470 static void _shutdown_sysc(struct omap_hwmod *oh)
1471 {
1472 u32 v;
1473 u8 sf;
1474
1475 if (!oh->class->sysc)
1476 return;
1477
1478 v = oh->_sysc_cache;
1479 sf = oh->class->sysc->sysc_flags;
1480
1481 if (sf & SYSC_HAS_SIDLEMODE)
1482 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1483
1484 if (sf & SYSC_HAS_MIDLEMODE)
1485 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1486
1487 if (sf & SYSC_HAS_AUTOIDLE)
1488 _set_module_autoidle(oh, 1, &v);
1489
1490 _write_sysconfig(v, oh);
1491 }
1492
1493 /**
1494 * _lookup - find an omap_hwmod by name
1495 * @name: find an omap_hwmod by name
1496 *
1497 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1498 */
1499 static struct omap_hwmod *_lookup(const char *name)
1500 {
1501 struct omap_hwmod *oh, *temp_oh;
1502
1503 oh = NULL;
1504
1505 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1506 if (!strcmp(name, temp_oh->name)) {
1507 oh = temp_oh;
1508 break;
1509 }
1510 }
1511
1512 return oh;
1513 }
1514
1515 /**
1516 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1517 * @oh: struct omap_hwmod *
1518 *
1519 * Convert a clockdomain name stored in a struct omap_hwmod into a
1520 * clockdomain pointer, and save it into the struct omap_hwmod.
1521 * Return -EINVAL if the clkdm_name lookup failed.
1522 */
1523 static int _init_clkdm(struct omap_hwmod *oh)
1524 {
1525 if (!oh->clkdm_name) {
1526 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1527 return 0;
1528 }
1529
1530 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1531 if (!oh->clkdm) {
1532 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1533 oh->name, oh->clkdm_name);
1534 return -EINVAL;
1535 }
1536
1537 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1538 oh->name, oh->clkdm_name);
1539
1540 return 0;
1541 }
1542
1543 /**
1544 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1545 * well the clockdomain.
1546 * @oh: struct omap_hwmod *
1547 * @data: not used; pass NULL
1548 *
1549 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1550 * Resolves all clock names embedded in the hwmod. Returns 0 on
1551 * success, or a negative error code on failure.
1552 */
1553 static int _init_clocks(struct omap_hwmod *oh, void *data)
1554 {
1555 int ret = 0;
1556
1557 if (oh->_state != _HWMOD_STATE_REGISTERED)
1558 return 0;
1559
1560 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1561
1562 if (soc_ops.init_clkdm)
1563 ret |= soc_ops.init_clkdm(oh);
1564
1565 ret |= _init_main_clk(oh);
1566 ret |= _init_interface_clks(oh);
1567 ret |= _init_opt_clks(oh);
1568
1569 if (!ret)
1570 oh->_state = _HWMOD_STATE_CLKS_INITED;
1571 else
1572 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1573
1574 return ret;
1575 }
1576
1577 /**
1578 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1579 * @oh: struct omap_hwmod *
1580 * @name: name of the reset line in the context of this hwmod
1581 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1582 *
1583 * Return the bit position of the reset line that match the
1584 * input name. Return -ENOENT if not found.
1585 */
1586 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1587 struct omap_hwmod_rst_info *ohri)
1588 {
1589 int i;
1590
1591 for (i = 0; i < oh->rst_lines_cnt; i++) {
1592 const char *rst_line = oh->rst_lines[i].name;
1593 if (!strcmp(rst_line, name)) {
1594 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1595 ohri->st_shift = oh->rst_lines[i].st_shift;
1596 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1597 oh->name, __func__, rst_line, ohri->rst_shift,
1598 ohri->st_shift);
1599
1600 return 0;
1601 }
1602 }
1603
1604 return -ENOENT;
1605 }
1606
1607 /**
1608 * _assert_hardreset - assert the HW reset line of submodules
1609 * contained in the hwmod module.
1610 * @oh: struct omap_hwmod *
1611 * @name: name of the reset line to lookup and assert
1612 *
1613 * Some IP like dsp, ipu or iva contain processor that require an HW
1614 * reset line to be assert / deassert in order to enable fully the IP.
1615 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1616 * asserting the hardreset line on the currently-booted SoC, or passes
1617 * along the return value from _lookup_hardreset() or the SoC's
1618 * assert_hardreset code.
1619 */
1620 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1621 {
1622 struct omap_hwmod_rst_info ohri;
1623 int ret = -EINVAL;
1624
1625 if (!oh)
1626 return -EINVAL;
1627
1628 if (!soc_ops.assert_hardreset)
1629 return -ENOSYS;
1630
1631 ret = _lookup_hardreset(oh, name, &ohri);
1632 if (ret < 0)
1633 return ret;
1634
1635 ret = soc_ops.assert_hardreset(oh, &ohri);
1636
1637 return ret;
1638 }
1639
1640 /**
1641 * _deassert_hardreset - deassert the HW reset line of submodules contained
1642 * in the hwmod module.
1643 * @oh: struct omap_hwmod *
1644 * @name: name of the reset line to look up and deassert
1645 *
1646 * Some IP like dsp, ipu or iva contain processor that require an HW
1647 * reset line to be assert / deassert in order to enable fully the IP.
1648 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1649 * deasserting the hardreset line on the currently-booted SoC, or passes
1650 * along the return value from _lookup_hardreset() or the SoC's
1651 * deassert_hardreset code.
1652 */
1653 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1654 {
1655 struct omap_hwmod_rst_info ohri;
1656 int ret = -EINVAL;
1657 int hwsup = 0;
1658
1659 if (!oh)
1660 return -EINVAL;
1661
1662 if (!soc_ops.deassert_hardreset)
1663 return -ENOSYS;
1664
1665 ret = _lookup_hardreset(oh, name, &ohri);
1666 if (IS_ERR_VALUE(ret))
1667 return ret;
1668
1669 if (oh->clkdm) {
1670 /*
1671 * A clockdomain must be in SW_SUP otherwise reset
1672 * might not be completed. The clockdomain can be set
1673 * in HW_AUTO only when the module become ready.
1674 */
1675 hwsup = clkdm_in_hwsup(oh->clkdm);
1676 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1677 if (ret) {
1678 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1679 oh->name, oh->clkdm->name, ret);
1680 return ret;
1681 }
1682 }
1683
1684 _enable_clocks(oh);
1685 if (soc_ops.enable_module)
1686 soc_ops.enable_module(oh);
1687
1688 ret = soc_ops.deassert_hardreset(oh, &ohri);
1689
1690 if (soc_ops.disable_module)
1691 soc_ops.disable_module(oh);
1692 _disable_clocks(oh);
1693
1694 if (ret == -EBUSY)
1695 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1696
1697 if (!ret) {
1698 /*
1699 * Set the clockdomain to HW_AUTO, assuming that the
1700 * previous state was HW_AUTO.
1701 */
1702 if (oh->clkdm && hwsup)
1703 clkdm_allow_idle(oh->clkdm);
1704 } else {
1705 if (oh->clkdm)
1706 clkdm_hwmod_disable(oh->clkdm, oh);
1707 }
1708
1709 return ret;
1710 }
1711
1712 /**
1713 * _read_hardreset - read the HW reset line state of submodules
1714 * contained in the hwmod module
1715 * @oh: struct omap_hwmod *
1716 * @name: name of the reset line to look up and read
1717 *
1718 * Return the state of the reset line. Returns -EINVAL if @oh is
1719 * null, -ENOSYS if we have no way of reading the hardreset line
1720 * status on the currently-booted SoC, or passes along the return
1721 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1722 * code.
1723 */
1724 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1725 {
1726 struct omap_hwmod_rst_info ohri;
1727 int ret = -EINVAL;
1728
1729 if (!oh)
1730 return -EINVAL;
1731
1732 if (!soc_ops.is_hardreset_asserted)
1733 return -ENOSYS;
1734
1735 ret = _lookup_hardreset(oh, name, &ohri);
1736 if (ret < 0)
1737 return ret;
1738
1739 return soc_ops.is_hardreset_asserted(oh, &ohri);
1740 }
1741
1742 /**
1743 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1744 * @oh: struct omap_hwmod *
1745 *
1746 * If all hardreset lines associated with @oh are asserted, then return true.
1747 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1748 * associated with @oh are asserted, then return false.
1749 * This function is used to avoid executing some parts of the IP block
1750 * enable/disable sequence if its hardreset line is set.
1751 */
1752 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1753 {
1754 int i, rst_cnt = 0;
1755
1756 if (oh->rst_lines_cnt == 0)
1757 return false;
1758
1759 for (i = 0; i < oh->rst_lines_cnt; i++)
1760 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1761 rst_cnt++;
1762
1763 if (oh->rst_lines_cnt == rst_cnt)
1764 return true;
1765
1766 return false;
1767 }
1768
1769 /**
1770 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1771 * hard-reset
1772 * @oh: struct omap_hwmod *
1773 *
1774 * If any hardreset lines associated with @oh are asserted, then
1775 * return true. Otherwise, if no hardreset lines associated with @oh
1776 * are asserted, or if @oh has no hardreset lines, then return false.
1777 * This function is used to avoid executing some parts of the IP block
1778 * enable/disable sequence if any hardreset line is set.
1779 */
1780 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1781 {
1782 int rst_cnt = 0;
1783 int i;
1784
1785 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1786 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1787 rst_cnt++;
1788
1789 return (rst_cnt) ? true : false;
1790 }
1791
1792 /**
1793 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1794 * @oh: struct omap_hwmod *
1795 *
1796 * Disable the PRCM module mode related to the hwmod @oh.
1797 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1798 */
1799 static int _omap4_disable_module(struct omap_hwmod *oh)
1800 {
1801 int v;
1802
1803 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1804 return -EINVAL;
1805
1806 /*
1807 * Since integration code might still be doing something, only
1808 * disable if all lines are under hardreset.
1809 */
1810 if (_are_any_hardreset_lines_asserted(oh))
1811 return 0;
1812
1813 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1814
1815 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1816 oh->clkdm->cm_inst,
1817 oh->clkdm->clkdm_offs,
1818 oh->prcm.omap4.clkctrl_offs);
1819
1820 v = _omap4_wait_target_disable(oh);
1821 if (v)
1822 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1823 oh->name);
1824
1825 return 0;
1826 }
1827
1828 /**
1829 * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
1830 * @oh: struct omap_hwmod *
1831 *
1832 * Disable the PRCM module mode related to the hwmod @oh.
1833 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1834 */
1835 static int _am33xx_disable_module(struct omap_hwmod *oh)
1836 {
1837 int v;
1838
1839 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1840 return -EINVAL;
1841
1842 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1843
1844 if (_are_any_hardreset_lines_asserted(oh))
1845 return 0;
1846
1847 am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
1848 oh->prcm.omap4.clkctrl_offs);
1849
1850 v = _am33xx_wait_target_disable(oh);
1851 if (v)
1852 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1853 oh->name);
1854
1855 return 0;
1856 }
1857
1858 /**
1859 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1860 * @oh: struct omap_hwmod *
1861 *
1862 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1863 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1864 * reset this way, -EINVAL if the hwmod is in the wrong state,
1865 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1866 *
1867 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1868 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1869 * use the SYSCONFIG softreset bit to provide the status.
1870 *
1871 * Note that some IP like McBSP do have reset control but don't have
1872 * reset status.
1873 */
1874 static int _ocp_softreset(struct omap_hwmod *oh)
1875 {
1876 u32 v;
1877 int c = 0;
1878 int ret = 0;
1879
1880 if (!oh->class->sysc ||
1881 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1882 return -ENOENT;
1883
1884 /* clocks must be on for this operation */
1885 if (oh->_state != _HWMOD_STATE_ENABLED) {
1886 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1887 oh->name);
1888 return -EINVAL;
1889 }
1890
1891 /* For some modules, all optionnal clocks need to be enabled as well */
1892 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1893 _enable_optional_clocks(oh);
1894
1895 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1896
1897 v = oh->_sysc_cache;
1898 ret = _set_softreset(oh, &v);
1899 if (ret)
1900 goto dis_opt_clks;
1901 _write_sysconfig(v, oh);
1902
1903 if (oh->class->sysc->srst_udelay)
1904 udelay(oh->class->sysc->srst_udelay);
1905
1906 c = _wait_softreset_complete(oh);
1907 if (c == MAX_MODULE_SOFTRESET_WAIT)
1908 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1909 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1910 else
1911 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1912
1913 /*
1914 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1915 * _wait_target_ready() or _reset()
1916 */
1917
1918 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1919
1920 dis_opt_clks:
1921 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1922 _disable_optional_clocks(oh);
1923
1924 return ret;
1925 }
1926
1927 /**
1928 * _reset - reset an omap_hwmod
1929 * @oh: struct omap_hwmod *
1930 *
1931 * Resets an omap_hwmod @oh. If the module has a custom reset
1932 * function pointer defined, then call it to reset the IP block, and
1933 * pass along its return value to the caller. Otherwise, if the IP
1934 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1935 * associated with it, call a function to reset the IP block via that
1936 * method, and pass along the return value to the caller. Finally, if
1937 * the IP block has some hardreset lines associated with it, assert
1938 * all of those, but do _not_ deassert them. (This is because driver
1939 * authors have expressed an apparent requirement to control the
1940 * deassertion of the hardreset lines themselves.)
1941 *
1942 * The default software reset mechanism for most OMAP IP blocks is
1943 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1944 * hwmods cannot be reset via this method. Some are not targets and
1945 * therefore have no OCP header registers to access. Others (like the
1946 * IVA) have idiosyncratic reset sequences. So for these relatively
1947 * rare cases, custom reset code can be supplied in the struct
1948 * omap_hwmod_class .reset function pointer.
1949 *
1950 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1951 * does not prevent idling of the system. This is necessary for cases
1952 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1953 * kernel without disabling dma.
1954 *
1955 * Passes along the return value from either _ocp_softreset() or the
1956 * custom reset function - these must return -EINVAL if the hwmod
1957 * cannot be reset this way or if the hwmod is in the wrong state,
1958 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1959 */
1960 static int _reset(struct omap_hwmod *oh)
1961 {
1962 int i, r;
1963
1964 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1965
1966 if (oh->class->reset) {
1967 r = oh->class->reset(oh);
1968 } else {
1969 if (oh->rst_lines_cnt > 0) {
1970 for (i = 0; i < oh->rst_lines_cnt; i++)
1971 _assert_hardreset(oh, oh->rst_lines[i].name);
1972 return 0;
1973 } else {
1974 r = _ocp_softreset(oh);
1975 if (r == -ENOENT)
1976 r = 0;
1977 }
1978 }
1979
1980 _set_dmadisable(oh);
1981
1982 /*
1983 * OCP_SYSCONFIG bits need to be reprogrammed after a
1984 * softreset. The _enable() function should be split to avoid
1985 * the rewrite of the OCP_SYSCONFIG register.
1986 */
1987 if (oh->class->sysc) {
1988 _update_sysc_cache(oh);
1989 _enable_sysc(oh);
1990 }
1991
1992 return r;
1993 }
1994
1995 /**
1996 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
1997 *
1998 * Call the appropriate PRM function to clear any logged I/O chain
1999 * wakeups and to reconfigure the chain. This apparently needs to be
2000 * done upon every mux change. Since hwmods can be concurrently
2001 * enabled and idled, hold a spinlock around the I/O chain
2002 * reconfiguration sequence. No return value.
2003 *
2004 * XXX When the PRM code is moved to drivers, this function can be removed,
2005 * as the PRM infrastructure should abstract this.
2006 */
2007 static void _reconfigure_io_chain(void)
2008 {
2009 unsigned long flags;
2010
2011 spin_lock_irqsave(&io_chain_lock, flags);
2012
2013 if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
2014 omap3xxx_prm_reconfigure_io_chain();
2015 else if (cpu_is_omap44xx())
2016 omap44xx_prm_reconfigure_io_chain();
2017
2018 spin_unlock_irqrestore(&io_chain_lock, flags);
2019 }
2020
2021 /**
2022 * _omap4_update_context_lost - increment hwmod context loss counter if
2023 * hwmod context was lost, and clear hardware context loss reg
2024 * @oh: hwmod to check for context loss
2025 *
2026 * If the PRCM indicates that the hwmod @oh lost context, increment
2027 * our in-memory context loss counter, and clear the RM_*_CONTEXT
2028 * bits. No return value.
2029 */
2030 static void _omap4_update_context_lost(struct omap_hwmod *oh)
2031 {
2032 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
2033 return;
2034
2035 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2036 oh->clkdm->pwrdm.ptr->prcm_offs,
2037 oh->prcm.omap4.context_offs))
2038 return;
2039
2040 oh->prcm.omap4.context_lost_counter++;
2041 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2042 oh->clkdm->pwrdm.ptr->prcm_offs,
2043 oh->prcm.omap4.context_offs);
2044 }
2045
2046 /**
2047 * _omap4_get_context_lost - get context loss counter for a hwmod
2048 * @oh: hwmod to get context loss counter for
2049 *
2050 * Returns the in-memory context loss counter for a hwmod.
2051 */
2052 static int _omap4_get_context_lost(struct omap_hwmod *oh)
2053 {
2054 return oh->prcm.omap4.context_lost_counter;
2055 }
2056
2057 /**
2058 * _enable - enable an omap_hwmod
2059 * @oh: struct omap_hwmod *
2060 *
2061 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
2062 * register target. Returns -EINVAL if the hwmod is in the wrong
2063 * state or passes along the return value of _wait_target_ready().
2064 */
2065 static int _enable(struct omap_hwmod *oh)
2066 {
2067 int r;
2068 int hwsup = 0;
2069
2070 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
2071
2072 /*
2073 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
2074 * state at init. Now that someone is really trying to enable
2075 * them, just ensure that the hwmod mux is set.
2076 */
2077 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
2078 /*
2079 * If the caller has mux data populated, do the mux'ing
2080 * which wouldn't have been done as part of the _enable()
2081 * done during setup.
2082 */
2083 if (oh->mux)
2084 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2085
2086 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
2087 return 0;
2088 }
2089
2090 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
2091 oh->_state != _HWMOD_STATE_IDLE &&
2092 oh->_state != _HWMOD_STATE_DISABLED) {
2093 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
2094 oh->name);
2095 return -EINVAL;
2096 }
2097
2098 /*
2099 * If an IP block contains HW reset lines and all of them are
2100 * asserted, we let integration code associated with that
2101 * block handle the enable. We've received very little
2102 * information on what those driver authors need, and until
2103 * detailed information is provided and the driver code is
2104 * posted to the public lists, this is probably the best we
2105 * can do.
2106 */
2107 if (_are_all_hardreset_lines_asserted(oh))
2108 return 0;
2109
2110 /* Mux pins for device runtime if populated */
2111 if (oh->mux && (!oh->mux->enabled ||
2112 ((oh->_state == _HWMOD_STATE_IDLE) &&
2113 oh->mux->pads_dynamic))) {
2114 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2115 _reconfigure_io_chain();
2116 }
2117
2118 _add_initiator_dep(oh, mpu_oh);
2119
2120 if (oh->clkdm) {
2121 /*
2122 * A clockdomain must be in SW_SUP before enabling
2123 * completely the module. The clockdomain can be set
2124 * in HW_AUTO only when the module become ready.
2125 */
2126 hwsup = clkdm_in_hwsup(oh->clkdm) &&
2127 !clkdm_missing_idle_reporting(oh->clkdm);
2128 r = clkdm_hwmod_enable(oh->clkdm, oh);
2129 if (r) {
2130 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
2131 oh->name, oh->clkdm->name, r);
2132 return r;
2133 }
2134 }
2135
2136 _enable_clocks(oh);
2137 if (soc_ops.enable_module)
2138 soc_ops.enable_module(oh);
2139 if (oh->flags & HWMOD_BLOCK_WFI)
2140 disable_hlt();
2141
2142 if (soc_ops.update_context_lost)
2143 soc_ops.update_context_lost(oh);
2144
2145 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
2146 -EINVAL;
2147 if (!r) {
2148 /*
2149 * Set the clockdomain to HW_AUTO only if the target is ready,
2150 * assuming that the previous state was HW_AUTO
2151 */
2152 if (oh->clkdm && hwsup)
2153 clkdm_allow_idle(oh->clkdm);
2154
2155 oh->_state = _HWMOD_STATE_ENABLED;
2156
2157 /* Access the sysconfig only if the target is ready */
2158 if (oh->class->sysc) {
2159 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
2160 _update_sysc_cache(oh);
2161 _enable_sysc(oh);
2162 }
2163 } else {
2164 if (soc_ops.disable_module)
2165 soc_ops.disable_module(oh);
2166 _disable_clocks(oh);
2167 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
2168 oh->name, r);
2169
2170 if (oh->clkdm)
2171 clkdm_hwmod_disable(oh->clkdm, oh);
2172 }
2173
2174 return r;
2175 }
2176
2177 /**
2178 * _idle - idle an omap_hwmod
2179 * @oh: struct omap_hwmod *
2180 *
2181 * Idles an omap_hwmod @oh. This should be called once the hwmod has
2182 * no further work. Returns -EINVAL if the hwmod is in the wrong
2183 * state or returns 0.
2184 */
2185 static int _idle(struct omap_hwmod *oh)
2186 {
2187 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2188
2189 if (oh->_state != _HWMOD_STATE_ENABLED) {
2190 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2191 oh->name);
2192 return -EINVAL;
2193 }
2194
2195 if (_are_all_hardreset_lines_asserted(oh))
2196 return 0;
2197
2198 if (oh->class->sysc)
2199 _idle_sysc(oh);
2200 _del_initiator_dep(oh, mpu_oh);
2201
2202 if (oh->flags & HWMOD_BLOCK_WFI)
2203 enable_hlt();
2204 if (soc_ops.disable_module)
2205 soc_ops.disable_module(oh);
2206
2207 /*
2208 * The module must be in idle mode before disabling any parents
2209 * clocks. Otherwise, the parent clock might be disabled before
2210 * the module transition is done, and thus will prevent the
2211 * transition to complete properly.
2212 */
2213 _disable_clocks(oh);
2214 if (oh->clkdm)
2215 clkdm_hwmod_disable(oh->clkdm, oh);
2216
2217 /* Mux pins for device idle if populated */
2218 if (oh->mux && oh->mux->pads_dynamic) {
2219 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
2220 _reconfigure_io_chain();
2221 }
2222
2223 oh->_state = _HWMOD_STATE_IDLE;
2224
2225 return 0;
2226 }
2227
2228 /**
2229 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
2230 * @oh: struct omap_hwmod *
2231 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
2232 *
2233 * Sets the IP block's OCP autoidle bit in hardware, and updates our
2234 * local copy. Intended to be used by drivers that require
2235 * direct manipulation of the AUTOIDLE bits.
2236 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
2237 * along the return value from _set_module_autoidle().
2238 *
2239 * Any users of this function should be scrutinized carefully.
2240 */
2241 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
2242 {
2243 u32 v;
2244 int retval = 0;
2245 unsigned long flags;
2246
2247 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
2248 return -EINVAL;
2249
2250 spin_lock_irqsave(&oh->_lock, flags);
2251
2252 v = oh->_sysc_cache;
2253
2254 retval = _set_module_autoidle(oh, autoidle, &v);
2255
2256 if (!retval)
2257 _write_sysconfig(v, oh);
2258
2259 spin_unlock_irqrestore(&oh->_lock, flags);
2260
2261 return retval;
2262 }
2263
2264 /**
2265 * _shutdown - shutdown an omap_hwmod
2266 * @oh: struct omap_hwmod *
2267 *
2268 * Shut down an omap_hwmod @oh. This should be called when the driver
2269 * used for the hwmod is removed or unloaded or if the driver is not
2270 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2271 * state or returns 0.
2272 */
2273 static int _shutdown(struct omap_hwmod *oh)
2274 {
2275 int ret, i;
2276 u8 prev_state;
2277
2278 if (oh->_state != _HWMOD_STATE_IDLE &&
2279 oh->_state != _HWMOD_STATE_ENABLED) {
2280 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2281 oh->name);
2282 return -EINVAL;
2283 }
2284
2285 if (_are_all_hardreset_lines_asserted(oh))
2286 return 0;
2287
2288 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2289
2290 if (oh->class->pre_shutdown) {
2291 prev_state = oh->_state;
2292 if (oh->_state == _HWMOD_STATE_IDLE)
2293 _enable(oh);
2294 ret = oh->class->pre_shutdown(oh);
2295 if (ret) {
2296 if (prev_state == _HWMOD_STATE_IDLE)
2297 _idle(oh);
2298 return ret;
2299 }
2300 }
2301
2302 if (oh->class->sysc) {
2303 if (oh->_state == _HWMOD_STATE_IDLE)
2304 _enable(oh);
2305 _shutdown_sysc(oh);
2306 }
2307
2308 /* clocks and deps are already disabled in idle */
2309 if (oh->_state == _HWMOD_STATE_ENABLED) {
2310 _del_initiator_dep(oh, mpu_oh);
2311 /* XXX what about the other system initiators here? dma, dsp */
2312 if (oh->flags & HWMOD_BLOCK_WFI)
2313 enable_hlt();
2314 if (soc_ops.disable_module)
2315 soc_ops.disable_module(oh);
2316 _disable_clocks(oh);
2317 if (oh->clkdm)
2318 clkdm_hwmod_disable(oh->clkdm, oh);
2319 }
2320 /* XXX Should this code also force-disable the optional clocks? */
2321
2322 for (i = 0; i < oh->rst_lines_cnt; i++)
2323 _assert_hardreset(oh, oh->rst_lines[i].name);
2324
2325 /* Mux pins to safe mode or use populated off mode values */
2326 if (oh->mux)
2327 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
2328
2329 oh->_state = _HWMOD_STATE_DISABLED;
2330
2331 return 0;
2332 }
2333
2334 /**
2335 * _init_mpu_rt_base - populate the virtual address for a hwmod
2336 * @oh: struct omap_hwmod * to locate the virtual address
2337 *
2338 * Cache the virtual address used by the MPU to access this IP block's
2339 * registers. This address is needed early so the OCP registers that
2340 * are part of the device's address space can be ioremapped properly.
2341 * No return value.
2342 */
2343 static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2344 {
2345 struct omap_hwmod_addr_space *mem;
2346 void __iomem *va_start;
2347
2348 if (!oh)
2349 return;
2350
2351 _save_mpu_port_index(oh);
2352
2353 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2354 return;
2355
2356 mem = _find_mpu_rt_addr_space(oh);
2357 if (!mem) {
2358 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2359 oh->name);
2360 return;
2361 }
2362
2363 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2364 if (!va_start) {
2365 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2366 return;
2367 }
2368
2369 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2370 oh->name, va_start);
2371
2372 oh->_mpu_rt_va = va_start;
2373 }
2374
2375 /**
2376 * _init - initialize internal data for the hwmod @oh
2377 * @oh: struct omap_hwmod *
2378 * @n: (unused)
2379 *
2380 * Look up the clocks and the address space used by the MPU to access
2381 * registers belonging to the hwmod @oh. @oh must already be
2382 * registered at this point. This is the first of two phases for
2383 * hwmod initialization. Code called here does not touch any hardware
2384 * registers, it simply prepares internal data structures. Returns 0
2385 * upon success or if the hwmod isn't registered, or -EINVAL upon
2386 * failure.
2387 */
2388 static int __init _init(struct omap_hwmod *oh, void *data)
2389 {
2390 int r;
2391
2392 if (oh->_state != _HWMOD_STATE_REGISTERED)
2393 return 0;
2394
2395 _init_mpu_rt_base(oh, NULL);
2396
2397 r = _init_clocks(oh, NULL);
2398 if (IS_ERR_VALUE(r)) {
2399 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2400 return -EINVAL;
2401 }
2402
2403 oh->_state = _HWMOD_STATE_INITIALIZED;
2404
2405 return 0;
2406 }
2407
2408 /**
2409 * _setup_iclk_autoidle - configure an IP block's interface clocks
2410 * @oh: struct omap_hwmod *
2411 *
2412 * Set up the module's interface clocks. XXX This function is still mostly
2413 * a stub; implementing this properly requires iclk autoidle usecounting in
2414 * the clock code. No return value.
2415 */
2416 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2417 {
2418 struct omap_hwmod_ocp_if *os;
2419 struct list_head *p;
2420 int i = 0;
2421 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2422 return;
2423
2424 p = oh->slave_ports.next;
2425
2426 while (i < oh->slaves_cnt) {
2427 os = _fetch_next_ocp_if(&p, &i);
2428 if (!os->_clk)
2429 continue;
2430
2431 if (os->flags & OCPIF_SWSUP_IDLE) {
2432 /* XXX omap_iclk_deny_idle(c); */
2433 } else {
2434 /* XXX omap_iclk_allow_idle(c); */
2435 clk_enable(os->_clk);
2436 }
2437 }
2438
2439 return;
2440 }
2441
2442 /**
2443 * _setup_reset - reset an IP block during the setup process
2444 * @oh: struct omap_hwmod *
2445 *
2446 * Reset the IP block corresponding to the hwmod @oh during the setup
2447 * process. The IP block is first enabled so it can be successfully
2448 * reset. Returns 0 upon success or a negative error code upon
2449 * failure.
2450 */
2451 static int __init _setup_reset(struct omap_hwmod *oh)
2452 {
2453 int r;
2454
2455 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2456 return -EINVAL;
2457
2458 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2459 return -EPERM;
2460
2461 if (oh->rst_lines_cnt == 0) {
2462 r = _enable(oh);
2463 if (r) {
2464 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2465 oh->name, oh->_state);
2466 return -EINVAL;
2467 }
2468 }
2469
2470 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2471 r = _reset(oh);
2472
2473 return r;
2474 }
2475
2476 /**
2477 * _setup_postsetup - transition to the appropriate state after _setup
2478 * @oh: struct omap_hwmod *
2479 *
2480 * Place an IP block represented by @oh into a "post-setup" state --
2481 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2482 * this function is called at the end of _setup().) The postsetup
2483 * state for an IP block can be changed by calling
2484 * omap_hwmod_enter_postsetup_state() early in the boot process,
2485 * before one of the omap_hwmod_setup*() functions are called for the
2486 * IP block.
2487 *
2488 * The IP block stays in this state until a PM runtime-based driver is
2489 * loaded for that IP block. A post-setup state of IDLE is
2490 * appropriate for almost all IP blocks with runtime PM-enabled
2491 * drivers, since those drivers are able to enable the IP block. A
2492 * post-setup state of ENABLED is appropriate for kernels with PM
2493 * runtime disabled. The DISABLED state is appropriate for unusual IP
2494 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2495 * included, since the WDTIMER starts running on reset and will reset
2496 * the MPU if left active.
2497 *
2498 * This post-setup mechanism is deprecated. Once all of the OMAP
2499 * drivers have been converted to use PM runtime, and all of the IP
2500 * block data and interconnect data is available to the hwmod code, it
2501 * should be possible to replace this mechanism with a "lazy reset"
2502 * arrangement. In a "lazy reset" setup, each IP block is enabled
2503 * when the driver first probes, then all remaining IP blocks without
2504 * drivers are either shut down or enabled after the drivers have
2505 * loaded. However, this cannot take place until the above
2506 * preconditions have been met, since otherwise the late reset code
2507 * has no way of knowing which IP blocks are in use by drivers, and
2508 * which ones are unused.
2509 *
2510 * No return value.
2511 */
2512 static void __init _setup_postsetup(struct omap_hwmod *oh)
2513 {
2514 u8 postsetup_state;
2515
2516 if (oh->rst_lines_cnt > 0)
2517 return;
2518
2519 postsetup_state = oh->_postsetup_state;
2520 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2521 postsetup_state = _HWMOD_STATE_ENABLED;
2522
2523 /*
2524 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2525 * it should be set by the core code as a runtime flag during startup
2526 */
2527 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
2528 (postsetup_state == _HWMOD_STATE_IDLE)) {
2529 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2530 postsetup_state = _HWMOD_STATE_ENABLED;
2531 }
2532
2533 if (postsetup_state == _HWMOD_STATE_IDLE)
2534 _idle(oh);
2535 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2536 _shutdown(oh);
2537 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2538 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2539 oh->name, postsetup_state);
2540
2541 return;
2542 }
2543
2544 /**
2545 * _setup - prepare IP block hardware for use
2546 * @oh: struct omap_hwmod *
2547 * @n: (unused, pass NULL)
2548 *
2549 * Configure the IP block represented by @oh. This may include
2550 * enabling the IP block, resetting it, and placing it into a
2551 * post-setup state, depending on the type of IP block and applicable
2552 * flags. IP blocks are reset to prevent any previous configuration
2553 * by the bootloader or previous operating system from interfering
2554 * with power management or other parts of the system. The reset can
2555 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2556 * two phases for hwmod initialization. Code called here generally
2557 * affects the IP block hardware, or system integration hardware
2558 * associated with the IP block. Returns 0.
2559 */
2560 static int __init _setup(struct omap_hwmod *oh, void *data)
2561 {
2562 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2563 return 0;
2564
2565 _setup_iclk_autoidle(oh);
2566
2567 if (!_setup_reset(oh))
2568 _setup_postsetup(oh);
2569
2570 return 0;
2571 }
2572
2573 /**
2574 * _register - register a struct omap_hwmod
2575 * @oh: struct omap_hwmod *
2576 *
2577 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2578 * already has been registered by the same name; -EINVAL if the
2579 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2580 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2581 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2582 * success.
2583 *
2584 * XXX The data should be copied into bootmem, so the original data
2585 * should be marked __initdata and freed after init. This would allow
2586 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2587 * that the copy process would be relatively complex due to the large number
2588 * of substructures.
2589 */
2590 static int __init _register(struct omap_hwmod *oh)
2591 {
2592 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2593 (oh->_state != _HWMOD_STATE_UNKNOWN))
2594 return -EINVAL;
2595
2596 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2597
2598 if (_lookup(oh->name))
2599 return -EEXIST;
2600
2601 list_add_tail(&oh->node, &omap_hwmod_list);
2602
2603 INIT_LIST_HEAD(&oh->master_ports);
2604 INIT_LIST_HEAD(&oh->slave_ports);
2605 spin_lock_init(&oh->_lock);
2606
2607 oh->_state = _HWMOD_STATE_REGISTERED;
2608
2609 /*
2610 * XXX Rather than doing a strcmp(), this should test a flag
2611 * set in the hwmod data, inserted by the autogenerator code.
2612 */
2613 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2614 mpu_oh = oh;
2615
2616 return 0;
2617 }
2618
2619 /**
2620 * _alloc_links - return allocated memory for hwmod links
2621 * @ml: pointer to a struct omap_hwmod_link * for the master link
2622 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2623 *
2624 * Return pointers to two struct omap_hwmod_link records, via the
2625 * addresses pointed to by @ml and @sl. Will first attempt to return
2626 * memory allocated as part of a large initial block, but if that has
2627 * been exhausted, will allocate memory itself. Since ideally this
2628 * second allocation path will never occur, the number of these
2629 * 'supplemental' allocations will be logged when debugging is
2630 * enabled. Returns 0.
2631 */
2632 static int __init _alloc_links(struct omap_hwmod_link **ml,
2633 struct omap_hwmod_link **sl)
2634 {
2635 unsigned int sz;
2636
2637 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2638 *ml = &linkspace[free_ls++];
2639 *sl = &linkspace[free_ls++];
2640 return 0;
2641 }
2642
2643 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2644
2645 *sl = NULL;
2646 *ml = alloc_bootmem(sz);
2647
2648 memset(*ml, 0, sz);
2649
2650 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2651
2652 ls_supp++;
2653 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2654 ls_supp * LINKS_PER_OCP_IF);
2655
2656 return 0;
2657 };
2658
2659 /**
2660 * _add_link - add an interconnect between two IP blocks
2661 * @oi: pointer to a struct omap_hwmod_ocp_if record
2662 *
2663 * Add struct omap_hwmod_link records connecting the master IP block
2664 * specified in @oi->master to @oi, and connecting the slave IP block
2665 * specified in @oi->slave to @oi. This code is assumed to run before
2666 * preemption or SMP has been enabled, thus avoiding the need for
2667 * locking in this code. Changes to this assumption will require
2668 * additional locking. Returns 0.
2669 */
2670 static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2671 {
2672 struct omap_hwmod_link *ml, *sl;
2673
2674 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2675 oi->slave->name);
2676
2677 _alloc_links(&ml, &sl);
2678
2679 ml->ocp_if = oi;
2680 INIT_LIST_HEAD(&ml->node);
2681 list_add(&ml->node, &oi->master->master_ports);
2682 oi->master->masters_cnt++;
2683
2684 sl->ocp_if = oi;
2685 INIT_LIST_HEAD(&sl->node);
2686 list_add(&sl->node, &oi->slave->slave_ports);
2687 oi->slave->slaves_cnt++;
2688
2689 return 0;
2690 }
2691
2692 /**
2693 * _register_link - register a struct omap_hwmod_ocp_if
2694 * @oi: struct omap_hwmod_ocp_if *
2695 *
2696 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2697 * has already been registered; -EINVAL if @oi is NULL or if the
2698 * record pointed to by @oi is missing required fields; or 0 upon
2699 * success.
2700 *
2701 * XXX The data should be copied into bootmem, so the original data
2702 * should be marked __initdata and freed after init. This would allow
2703 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2704 */
2705 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2706 {
2707 if (!oi || !oi->master || !oi->slave || !oi->user)
2708 return -EINVAL;
2709
2710 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2711 return -EEXIST;
2712
2713 pr_debug("omap_hwmod: registering link from %s to %s\n",
2714 oi->master->name, oi->slave->name);
2715
2716 /*
2717 * Register the connected hwmods, if they haven't been
2718 * registered already
2719 */
2720 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2721 _register(oi->master);
2722
2723 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2724 _register(oi->slave);
2725
2726 _add_link(oi);
2727
2728 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2729
2730 return 0;
2731 }
2732
2733 /**
2734 * _alloc_linkspace - allocate large block of hwmod links
2735 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2736 *
2737 * Allocate a large block of struct omap_hwmod_link records. This
2738 * improves boot time significantly by avoiding the need to allocate
2739 * individual records one by one. If the number of records to
2740 * allocate in the block hasn't been manually specified, this function
2741 * will count the number of struct omap_hwmod_ocp_if records in @ois
2742 * and use that to determine the allocation size. For SoC families
2743 * that require multiple list registrations, such as OMAP3xxx, this
2744 * estimation process isn't optimal, so manual estimation is advised
2745 * in those cases. Returns -EEXIST if the allocation has already occurred
2746 * or 0 upon success.
2747 */
2748 static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2749 {
2750 unsigned int i = 0;
2751 unsigned int sz;
2752
2753 if (linkspace) {
2754 WARN(1, "linkspace already allocated\n");
2755 return -EEXIST;
2756 }
2757
2758 if (max_ls == 0)
2759 while (ois[i++])
2760 max_ls += LINKS_PER_OCP_IF;
2761
2762 sz = sizeof(struct omap_hwmod_link) * max_ls;
2763
2764 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2765 __func__, sz, max_ls);
2766
2767 linkspace = alloc_bootmem(sz);
2768
2769 memset(linkspace, 0, sz);
2770
2771 return 0;
2772 }
2773
2774 /* Static functions intended only for use in soc_ops field function pointers */
2775
2776 /**
2777 * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
2778 * @oh: struct omap_hwmod *
2779 *
2780 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2781 * does not have an IDLEST bit or if the module successfully leaves
2782 * slave idle; otherwise, pass along the return value of the
2783 * appropriate *_cm*_wait_module_ready() function.
2784 */
2785 static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
2786 {
2787 if (!oh)
2788 return -EINVAL;
2789
2790 if (oh->flags & HWMOD_NO_IDLEST)
2791 return 0;
2792
2793 if (!_find_mpu_rt_port(oh))
2794 return 0;
2795
2796 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2797
2798 return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2799 oh->prcm.omap2.idlest_reg_id,
2800 oh->prcm.omap2.idlest_idle_bit);
2801 }
2802
2803 /**
2804 * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
2805 * @oh: struct omap_hwmod *
2806 *
2807 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2808 * does not have an IDLEST bit or if the module successfully leaves
2809 * slave idle; otherwise, pass along the return value of the
2810 * appropriate *_cm*_wait_module_ready() function.
2811 */
2812 static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
2813 {
2814 if (!oh)
2815 return -EINVAL;
2816
2817 if (oh->flags & HWMOD_NO_IDLEST)
2818 return 0;
2819
2820 if (!_find_mpu_rt_port(oh))
2821 return 0;
2822
2823 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2824
2825 return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2826 oh->prcm.omap2.idlest_reg_id,
2827 oh->prcm.omap2.idlest_idle_bit);
2828 }
2829
2830 /**
2831 * _omap4_wait_target_ready - wait for a module to leave slave idle
2832 * @oh: struct omap_hwmod *
2833 *
2834 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2835 * does not have an IDLEST bit or if the module successfully leaves
2836 * slave idle; otherwise, pass along the return value of the
2837 * appropriate *_cm*_wait_module_ready() function.
2838 */
2839 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2840 {
2841 if (!oh)
2842 return -EINVAL;
2843
2844 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2845 return 0;
2846
2847 if (!_find_mpu_rt_port(oh))
2848 return 0;
2849
2850 /* XXX check module SIDLEMODE, hardreset status */
2851
2852 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
2853 oh->clkdm->cm_inst,
2854 oh->clkdm->clkdm_offs,
2855 oh->prcm.omap4.clkctrl_offs);
2856 }
2857
2858 /**
2859 * _am33xx_wait_target_ready - wait for a module to leave slave idle
2860 * @oh: struct omap_hwmod *
2861 *
2862 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2863 * does not have an IDLEST bit or if the module successfully leaves
2864 * slave idle; otherwise, pass along the return value of the
2865 * appropriate *_cm*_wait_module_ready() function.
2866 */
2867 static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
2868 {
2869 if (!oh || !oh->clkdm)
2870 return -EINVAL;
2871
2872 if (oh->flags & HWMOD_NO_IDLEST)
2873 return 0;
2874
2875 if (!_find_mpu_rt_port(oh))
2876 return 0;
2877
2878 /* XXX check module SIDLEMODE, hardreset status */
2879
2880 return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
2881 oh->clkdm->clkdm_offs,
2882 oh->prcm.omap4.clkctrl_offs);
2883 }
2884
2885 /**
2886 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2887 * @oh: struct omap_hwmod * to assert hardreset
2888 * @ohri: hardreset line data
2889 *
2890 * Call omap2_prm_assert_hardreset() with parameters extracted from
2891 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2892 * use as an soc_ops function pointer. Passes along the return value
2893 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2894 * for removal when the PRM code is moved into drivers/.
2895 */
2896 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2897 struct omap_hwmod_rst_info *ohri)
2898 {
2899 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
2900 ohri->rst_shift);
2901 }
2902
2903 /**
2904 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2905 * @oh: struct omap_hwmod * to deassert hardreset
2906 * @ohri: hardreset line data
2907 *
2908 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2909 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2910 * use as an soc_ops function pointer. Passes along the return value
2911 * from omap2_prm_deassert_hardreset(). XXX This function is
2912 * scheduled for removal when the PRM code is moved into drivers/.
2913 */
2914 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2915 struct omap_hwmod_rst_info *ohri)
2916 {
2917 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
2918 ohri->rst_shift,
2919 ohri->st_shift);
2920 }
2921
2922 /**
2923 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2924 * @oh: struct omap_hwmod * to test hardreset
2925 * @ohri: hardreset line data
2926 *
2927 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2928 * from the hwmod @oh and the hardreset line data @ohri. Only
2929 * intended for use as an soc_ops function pointer. Passes along the
2930 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2931 * function is scheduled for removal when the PRM code is moved into
2932 * drivers/.
2933 */
2934 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2935 struct omap_hwmod_rst_info *ohri)
2936 {
2937 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
2938 ohri->st_shift);
2939 }
2940
2941 /**
2942 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2943 * @oh: struct omap_hwmod * to assert hardreset
2944 * @ohri: hardreset line data
2945 *
2946 * Call omap4_prminst_assert_hardreset() with parameters extracted
2947 * from the hwmod @oh and the hardreset line data @ohri. Only
2948 * intended for use as an soc_ops function pointer. Passes along the
2949 * return value from omap4_prminst_assert_hardreset(). XXX This
2950 * function is scheduled for removal when the PRM code is moved into
2951 * drivers/.
2952 */
2953 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2954 struct omap_hwmod_rst_info *ohri)
2955 {
2956 if (!oh->clkdm)
2957 return -EINVAL;
2958
2959 return omap4_prminst_assert_hardreset(ohri->rst_shift,
2960 oh->clkdm->pwrdm.ptr->prcm_partition,
2961 oh->clkdm->pwrdm.ptr->prcm_offs,
2962 oh->prcm.omap4.rstctrl_offs);
2963 }
2964
2965 /**
2966 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2967 * @oh: struct omap_hwmod * to deassert hardreset
2968 * @ohri: hardreset line data
2969 *
2970 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2971 * from the hwmod @oh and the hardreset line data @ohri. Only
2972 * intended for use as an soc_ops function pointer. Passes along the
2973 * return value from omap4_prminst_deassert_hardreset(). XXX This
2974 * function is scheduled for removal when the PRM code is moved into
2975 * drivers/.
2976 */
2977 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2978 struct omap_hwmod_rst_info *ohri)
2979 {
2980 if (!oh->clkdm)
2981 return -EINVAL;
2982
2983 if (ohri->st_shift)
2984 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2985 oh->name, ohri->name);
2986 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
2987 oh->clkdm->pwrdm.ptr->prcm_partition,
2988 oh->clkdm->pwrdm.ptr->prcm_offs,
2989 oh->prcm.omap4.rstctrl_offs);
2990 }
2991
2992 /**
2993 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2994 * @oh: struct omap_hwmod * to test hardreset
2995 * @ohri: hardreset line data
2996 *
2997 * Call omap4_prminst_is_hardreset_asserted() with parameters
2998 * extracted from the hwmod @oh and the hardreset line data @ohri.
2999 * Only intended for use as an soc_ops function pointer. Passes along
3000 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
3001 * This function is scheduled for removal when the PRM code is moved
3002 * into drivers/.
3003 */
3004 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
3005 struct omap_hwmod_rst_info *ohri)
3006 {
3007 if (!oh->clkdm)
3008 return -EINVAL;
3009
3010 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
3011 oh->clkdm->pwrdm.ptr->prcm_partition,
3012 oh->clkdm->pwrdm.ptr->prcm_offs,
3013 oh->prcm.omap4.rstctrl_offs);
3014 }
3015
3016 /**
3017 * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3018 * @oh: struct omap_hwmod * to assert hardreset
3019 * @ohri: hardreset line data
3020 *
3021 * Call am33xx_prminst_assert_hardreset() with parameters extracted
3022 * from the hwmod @oh and the hardreset line data @ohri. Only
3023 * intended for use as an soc_ops function pointer. Passes along the
3024 * return value from am33xx_prminst_assert_hardreset(). XXX This
3025 * function is scheduled for removal when the PRM code is moved into
3026 * drivers/.
3027 */
3028 static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
3029 struct omap_hwmod_rst_info *ohri)
3030
3031 {
3032 return am33xx_prm_assert_hardreset(ohri->rst_shift,
3033 oh->clkdm->pwrdm.ptr->prcm_offs,
3034 oh->prcm.omap4.rstctrl_offs);
3035 }
3036
3037 /**
3038 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3039 * @oh: struct omap_hwmod * to deassert hardreset
3040 * @ohri: hardreset line data
3041 *
3042 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
3043 * from the hwmod @oh and the hardreset line data @ohri. Only
3044 * intended for use as an soc_ops function pointer. Passes along the
3045 * return value from am33xx_prminst_deassert_hardreset(). XXX This
3046 * function is scheduled for removal when the PRM code is moved into
3047 * drivers/.
3048 */
3049 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
3050 struct omap_hwmod_rst_info *ohri)
3051 {
3052 if (ohri->st_shift)
3053 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
3054 oh->name, ohri->name);
3055
3056 return am33xx_prm_deassert_hardreset(ohri->rst_shift,
3057 oh->clkdm->pwrdm.ptr->prcm_offs,
3058 oh->prcm.omap4.rstctrl_offs,
3059 oh->prcm.omap4.rstst_offs);
3060 }
3061
3062 /**
3063 * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
3064 * @oh: struct omap_hwmod * to test hardreset
3065 * @ohri: hardreset line data
3066 *
3067 * Call am33xx_prminst_is_hardreset_asserted() with parameters
3068 * extracted from the hwmod @oh and the hardreset line data @ohri.
3069 * Only intended for use as an soc_ops function pointer. Passes along
3070 * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
3071 * This function is scheduled for removal when the PRM code is moved
3072 * into drivers/.
3073 */
3074 static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
3075 struct omap_hwmod_rst_info *ohri)
3076 {
3077 return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
3078 oh->clkdm->pwrdm.ptr->prcm_offs,
3079 oh->prcm.omap4.rstctrl_offs);
3080 }
3081
3082 /* Public functions */
3083
3084 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
3085 {
3086 if (oh->flags & HWMOD_16BIT_REG)
3087 return __raw_readw(oh->_mpu_rt_va + reg_offs);
3088 else
3089 return __raw_readl(oh->_mpu_rt_va + reg_offs);
3090 }
3091
3092 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
3093 {
3094 if (oh->flags & HWMOD_16BIT_REG)
3095 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
3096 else
3097 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
3098 }
3099
3100 /**
3101 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
3102 * @oh: struct omap_hwmod *
3103 *
3104 * This is a public function exposed to drivers. Some drivers may need to do
3105 * some settings before and after resetting the device. Those drivers after
3106 * doing the necessary settings could use this function to start a reset by
3107 * setting the SYSCONFIG.SOFTRESET bit.
3108 */
3109 int omap_hwmod_softreset(struct omap_hwmod *oh)
3110 {
3111 u32 v;
3112 int ret;
3113
3114 if (!oh || !(oh->_sysc_cache))
3115 return -EINVAL;
3116
3117 v = oh->_sysc_cache;
3118 ret = _set_softreset(oh, &v);
3119 if (ret)
3120 goto error;
3121 _write_sysconfig(v, oh);
3122
3123 error:
3124 return ret;
3125 }
3126
3127 /**
3128 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
3129 * @oh: struct omap_hwmod *
3130 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
3131 *
3132 * Sets the IP block's OCP slave idlemode in hardware, and updates our
3133 * local copy. Intended to be used by drivers that have some erratum
3134 * that requires direct manipulation of the SIDLEMODE bits. Returns
3135 * -EINVAL if @oh is null, or passes along the return value from
3136 * _set_slave_idlemode().
3137 *
3138 * XXX Does this function have any current users? If not, we should
3139 * remove it; it is better to let the rest of the hwmod code handle this.
3140 * Any users of this function should be scrutinized carefully.
3141 */
3142 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
3143 {
3144 u32 v;
3145 int retval = 0;
3146
3147 if (!oh)
3148 return -EINVAL;
3149
3150 v = oh->_sysc_cache;
3151
3152 retval = _set_slave_idlemode(oh, idlemode, &v);
3153 if (!retval)
3154 _write_sysconfig(v, oh);
3155
3156 return retval;
3157 }
3158
3159 /**
3160 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3161 * @name: name of the omap_hwmod to look up
3162 *
3163 * Given a @name of an omap_hwmod, return a pointer to the registered
3164 * struct omap_hwmod *, or NULL upon error.
3165 */
3166 struct omap_hwmod *omap_hwmod_lookup(const char *name)
3167 {
3168 struct omap_hwmod *oh;
3169
3170 if (!name)
3171 return NULL;
3172
3173 oh = _lookup(name);
3174
3175 return oh;
3176 }
3177
3178 /**
3179 * omap_hwmod_for_each - call function for each registered omap_hwmod
3180 * @fn: pointer to a callback function
3181 * @data: void * data to pass to callback function
3182 *
3183 * Call @fn for each registered omap_hwmod, passing @data to each
3184 * function. @fn must return 0 for success or any other value for
3185 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3186 * will stop and the non-zero return value will be passed to the
3187 * caller of omap_hwmod_for_each(). @fn is called with
3188 * omap_hwmod_for_each() held.
3189 */
3190 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3191 void *data)
3192 {
3193 struct omap_hwmod *temp_oh;
3194 int ret = 0;
3195
3196 if (!fn)
3197 return -EINVAL;
3198
3199 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3200 ret = (*fn)(temp_oh, data);
3201 if (ret)
3202 break;
3203 }
3204
3205 return ret;
3206 }
3207
3208 /**
3209 * omap_hwmod_register_links - register an array of hwmod links
3210 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3211 *
3212 * Intended to be called early in boot before the clock framework is
3213 * initialized. If @ois is not null, will register all omap_hwmods
3214 * listed in @ois that are valid for this chip. Returns -EINVAL if
3215 * omap_hwmod_init() hasn't been called before calling this function,
3216 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3217 * success.
3218 */
3219 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3220 {
3221 int r, i;
3222
3223 if (!inited)
3224 return -EINVAL;
3225
3226 if (!ois)
3227 return 0;
3228
3229 if (!linkspace) {
3230 if (_alloc_linkspace(ois)) {
3231 pr_err("omap_hwmod: could not allocate link space\n");
3232 return -ENOMEM;
3233 }
3234 }
3235
3236 i = 0;
3237 do {
3238 r = _register_link(ois[i]);
3239 WARN(r && r != -EEXIST,
3240 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3241 ois[i]->master->name, ois[i]->slave->name, r);
3242 } while (ois[++i]);
3243
3244 return 0;
3245 }
3246
3247 /**
3248 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3249 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3250 *
3251 * If the hwmod data corresponding to the MPU subsystem IP block
3252 * hasn't been initialized and set up yet, do so now. This must be
3253 * done first since sleep dependencies may be added from other hwmods
3254 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3255 * return value.
3256 */
3257 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3258 {
3259 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3260 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3261 __func__, MPU_INITIATOR_NAME);
3262 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3263 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3264 }
3265
3266 /**
3267 * omap_hwmod_setup_one - set up a single hwmod
3268 * @oh_name: const char * name of the already-registered hwmod to set up
3269 *
3270 * Initialize and set up a single hwmod. Intended to be used for a
3271 * small number of early devices, such as the timer IP blocks used for
3272 * the scheduler clock. Must be called after omap2_clk_init().
3273 * Resolves the struct clk names to struct clk pointers for each
3274 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3275 * -EINVAL upon error or 0 upon success.
3276 */
3277 int __init omap_hwmod_setup_one(const char *oh_name)
3278 {
3279 struct omap_hwmod *oh;
3280
3281 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3282
3283 oh = _lookup(oh_name);
3284 if (!oh) {
3285 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3286 return -EINVAL;
3287 }
3288
3289 _ensure_mpu_hwmod_is_setup(oh);
3290
3291 _init(oh, NULL);
3292 _setup(oh, NULL);
3293
3294 return 0;
3295 }
3296
3297 /**
3298 * omap_hwmod_setup_all - set up all registered IP blocks
3299 *
3300 * Initialize and set up all IP blocks registered with the hwmod code.
3301 * Must be called after omap2_clk_init(). Resolves the struct clk
3302 * names to struct clk pointers for each registered omap_hwmod. Also
3303 * calls _setup() on each hwmod. Returns 0 upon success.
3304 */
3305 static int __init omap_hwmod_setup_all(void)
3306 {
3307 _ensure_mpu_hwmod_is_setup(NULL);
3308
3309 omap_hwmod_for_each(_init, NULL);
3310 omap_hwmod_for_each(_setup, NULL);
3311
3312 return 0;
3313 }
3314 omap_core_initcall(omap_hwmod_setup_all);
3315
3316 /**
3317 * omap_hwmod_enable - enable an omap_hwmod
3318 * @oh: struct omap_hwmod *
3319 *
3320 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3321 * Returns -EINVAL on error or passes along the return value from _enable().
3322 */
3323 int omap_hwmod_enable(struct omap_hwmod *oh)
3324 {
3325 int r;
3326 unsigned long flags;
3327
3328 if (!oh)
3329 return -EINVAL;
3330
3331 spin_lock_irqsave(&oh->_lock, flags);
3332 r = _enable(oh);
3333 spin_unlock_irqrestore(&oh->_lock, flags);
3334
3335 return r;
3336 }
3337
3338 /**
3339 * omap_hwmod_idle - idle an omap_hwmod
3340 * @oh: struct omap_hwmod *
3341 *
3342 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3343 * Returns -EINVAL on error or passes along the return value from _idle().
3344 */
3345 int omap_hwmod_idle(struct omap_hwmod *oh)
3346 {
3347 unsigned long flags;
3348
3349 if (!oh)
3350 return -EINVAL;
3351
3352 spin_lock_irqsave(&oh->_lock, flags);
3353 _idle(oh);
3354 spin_unlock_irqrestore(&oh->_lock, flags);
3355
3356 return 0;
3357 }
3358
3359 /**
3360 * omap_hwmod_shutdown - shutdown an omap_hwmod
3361 * @oh: struct omap_hwmod *
3362 *
3363 * Shutdown an omap_hwmod @oh. Intended to be called by
3364 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3365 * the return value from _shutdown().
3366 */
3367 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3368 {
3369 unsigned long flags;
3370
3371 if (!oh)
3372 return -EINVAL;
3373
3374 spin_lock_irqsave(&oh->_lock, flags);
3375 _shutdown(oh);
3376 spin_unlock_irqrestore(&oh->_lock, flags);
3377
3378 return 0;
3379 }
3380
3381 /**
3382 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
3383 * @oh: struct omap_hwmod *oh
3384 *
3385 * Intended to be called by the omap_device code.
3386 */
3387 int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
3388 {
3389 unsigned long flags;
3390
3391 spin_lock_irqsave(&oh->_lock, flags);
3392 _enable_clocks(oh);
3393 spin_unlock_irqrestore(&oh->_lock, flags);
3394
3395 return 0;
3396 }
3397
3398 /**
3399 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
3400 * @oh: struct omap_hwmod *oh
3401 *
3402 * Intended to be called by the omap_device code.
3403 */
3404 int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3405 {
3406 unsigned long flags;
3407
3408 spin_lock_irqsave(&oh->_lock, flags);
3409 _disable_clocks(oh);
3410 spin_unlock_irqrestore(&oh->_lock, flags);
3411
3412 return 0;
3413 }
3414
3415 /**
3416 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3417 * @oh: struct omap_hwmod *oh
3418 *
3419 * Intended to be called by drivers and core code when all posted
3420 * writes to a device must complete before continuing further
3421 * execution (for example, after clearing some device IRQSTATUS
3422 * register bits)
3423 *
3424 * XXX what about targets with multiple OCP threads?
3425 */
3426 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3427 {
3428 BUG_ON(!oh);
3429
3430 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
3431 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3432 oh->name);
3433 return;
3434 }
3435
3436 /*
3437 * Forces posted writes to complete on the OCP thread handling
3438 * register writes
3439 */
3440 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
3441 }
3442
3443 /**
3444 * omap_hwmod_reset - reset the hwmod
3445 * @oh: struct omap_hwmod *
3446 *
3447 * Under some conditions, a driver may wish to reset the entire device.
3448 * Called from omap_device code. Returns -EINVAL on error or passes along
3449 * the return value from _reset().
3450 */
3451 int omap_hwmod_reset(struct omap_hwmod *oh)
3452 {
3453 int r;
3454 unsigned long flags;
3455
3456 if (!oh)
3457 return -EINVAL;
3458
3459 spin_lock_irqsave(&oh->_lock, flags);
3460 r = _reset(oh);
3461 spin_unlock_irqrestore(&oh->_lock, flags);
3462
3463 return r;
3464 }
3465
3466 /*
3467 * IP block data retrieval functions
3468 */
3469
3470 /**
3471 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3472 * @oh: struct omap_hwmod *
3473 * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
3474 *
3475 * Count the number of struct resource array elements necessary to
3476 * contain omap_hwmod @oh resources. Intended to be called by code
3477 * that registers omap_devices. Intended to be used to determine the
3478 * size of a dynamically-allocated struct resource array, before
3479 * calling omap_hwmod_fill_resources(). Returns the number of struct
3480 * resource array elements needed.
3481 *
3482 * XXX This code is not optimized. It could attempt to merge adjacent
3483 * resource IDs.
3484 *
3485 */
3486 int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
3487 {
3488 int ret = 0;
3489
3490 if (flags & IORESOURCE_IRQ)
3491 ret += _count_mpu_irqs(oh);
3492
3493 if (flags & IORESOURCE_DMA)
3494 ret += _count_sdma_reqs(oh);
3495
3496 if (flags & IORESOURCE_MEM) {
3497 int i = 0;
3498 struct omap_hwmod_ocp_if *os;
3499 struct list_head *p = oh->slave_ports.next;
3500
3501 while (i < oh->slaves_cnt) {
3502 os = _fetch_next_ocp_if(&p, &i);
3503 ret += _count_ocp_if_addr_spaces(os);
3504 }
3505 }
3506
3507 return ret;
3508 }
3509
3510 /**
3511 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3512 * @oh: struct omap_hwmod *
3513 * @res: pointer to the first element of an array of struct resource to fill
3514 *
3515 * Fill the struct resource array @res with resource data from the
3516 * omap_hwmod @oh. Intended to be called by code that registers
3517 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3518 * number of array elements filled.
3519 */
3520 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3521 {
3522 struct omap_hwmod_ocp_if *os;
3523 struct list_head *p;
3524 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
3525 int r = 0;
3526
3527 /* For each IRQ, DMA, memory area, fill in array.*/
3528
3529 mpu_irqs_cnt = _count_mpu_irqs(oh);
3530 for (i = 0; i < mpu_irqs_cnt; i++) {
3531 (res + r)->name = (oh->mpu_irqs + i)->name;
3532 (res + r)->start = (oh->mpu_irqs + i)->irq;
3533 (res + r)->end = (oh->mpu_irqs + i)->irq;
3534 (res + r)->flags = IORESOURCE_IRQ;
3535 r++;
3536 }
3537
3538 sdma_reqs_cnt = _count_sdma_reqs(oh);
3539 for (i = 0; i < sdma_reqs_cnt; i++) {
3540 (res + r)->name = (oh->sdma_reqs + i)->name;
3541 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3542 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3543 (res + r)->flags = IORESOURCE_DMA;
3544 r++;
3545 }
3546
3547 p = oh->slave_ports.next;
3548
3549 i = 0;
3550 while (i < oh->slaves_cnt) {
3551 os = _fetch_next_ocp_if(&p, &i);
3552 addr_cnt = _count_ocp_if_addr_spaces(os);
3553
3554 for (j = 0; j < addr_cnt; j++) {
3555 (res + r)->name = (os->addr + j)->name;
3556 (res + r)->start = (os->addr + j)->pa_start;
3557 (res + r)->end = (os->addr + j)->pa_end;
3558 (res + r)->flags = IORESOURCE_MEM;
3559 r++;
3560 }
3561 }
3562
3563 return r;
3564 }
3565
3566 /**
3567 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
3568 * @oh: struct omap_hwmod *
3569 * @res: pointer to the array of struct resource to fill
3570 *
3571 * Fill the struct resource array @res with dma resource data from the
3572 * omap_hwmod @oh. Intended to be called by code that registers
3573 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3574 * number of array elements filled.
3575 */
3576 int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
3577 {
3578 int i, sdma_reqs_cnt;
3579 int r = 0;
3580
3581 sdma_reqs_cnt = _count_sdma_reqs(oh);
3582 for (i = 0; i < sdma_reqs_cnt; i++) {
3583 (res + r)->name = (oh->sdma_reqs + i)->name;
3584 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3585 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3586 (res + r)->flags = IORESOURCE_DMA;
3587 r++;
3588 }
3589
3590 return r;
3591 }
3592
3593 /**
3594 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3595 * @oh: struct omap_hwmod * to operate on
3596 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3597 * @name: pointer to the name of the data to fetch (optional)
3598 * @rsrc: pointer to a struct resource, allocated by the caller
3599 *
3600 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3601 * data for the IP block pointed to by @oh. The data will be filled
3602 * into a struct resource record pointed to by @rsrc. The struct
3603 * resource must be allocated by the caller. When @name is non-null,
3604 * the data associated with the matching entry in the IRQ/SDMA/address
3605 * space hwmod data arrays will be returned. If @name is null, the
3606 * first array entry will be returned. Data order is not meaningful
3607 * in hwmod data, so callers are strongly encouraged to use a non-null
3608 * @name whenever possible to avoid unpredictable effects if hwmod
3609 * data is later added that causes data ordering to change. This
3610 * function is only intended for use by OMAP core code. Device
3611 * drivers should not call this function - the appropriate bus-related
3612 * data accessor functions should be used instead. Returns 0 upon
3613 * success or a negative error code upon error.
3614 */
3615 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3616 const char *name, struct resource *rsrc)
3617 {
3618 int r;
3619 unsigned int irq, dma;
3620 u32 pa_start, pa_end;
3621
3622 if (!oh || !rsrc)
3623 return -EINVAL;
3624
3625 if (type == IORESOURCE_IRQ) {
3626 r = _get_mpu_irq_by_name(oh, name, &irq);
3627 if (r)
3628 return r;
3629
3630 rsrc->start = irq;
3631 rsrc->end = irq;
3632 } else if (type == IORESOURCE_DMA) {
3633 r = _get_sdma_req_by_name(oh, name, &dma);
3634 if (r)
3635 return r;
3636
3637 rsrc->start = dma;
3638 rsrc->end = dma;
3639 } else if (type == IORESOURCE_MEM) {
3640 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3641 if (r)
3642 return r;
3643
3644 rsrc->start = pa_start;
3645 rsrc->end = pa_end;
3646 } else {
3647 return -EINVAL;
3648 }
3649
3650 rsrc->flags = type;
3651 rsrc->name = name;
3652
3653 return 0;
3654 }
3655
3656 /**
3657 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3658 * @oh: struct omap_hwmod *
3659 *
3660 * Return the powerdomain pointer associated with the OMAP module
3661 * @oh's main clock. If @oh does not have a main clk, return the
3662 * powerdomain associated with the interface clock associated with the
3663 * module's MPU port. (XXX Perhaps this should use the SDMA port
3664 * instead?) Returns NULL on error, or a struct powerdomain * on
3665 * success.
3666 */
3667 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3668 {
3669 struct clk *c;
3670 struct omap_hwmod_ocp_if *oi;
3671 struct clockdomain *clkdm;
3672 struct clk_hw_omap *clk;
3673
3674 if (!oh)
3675 return NULL;
3676
3677 if (oh->clkdm)
3678 return oh->clkdm->pwrdm.ptr;
3679
3680 if (oh->_clk) {
3681 c = oh->_clk;
3682 } else {
3683 oi = _find_mpu_rt_port(oh);
3684 if (!oi)
3685 return NULL;
3686 c = oi->_clk;
3687 }
3688
3689 clk = to_clk_hw_omap(__clk_get_hw(c));
3690 clkdm = clk->clkdm;
3691 if (!clkdm)
3692 return NULL;
3693
3694 return clkdm->pwrdm.ptr;
3695 }
3696
3697 /**
3698 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3699 * @oh: struct omap_hwmod *
3700 *
3701 * Returns the virtual address corresponding to the beginning of the
3702 * module's register target, in the address range that is intended to
3703 * be used by the MPU. Returns the virtual address upon success or NULL
3704 * upon error.
3705 */
3706 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3707 {
3708 if (!oh)
3709 return NULL;
3710
3711 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3712 return NULL;
3713
3714 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3715 return NULL;
3716
3717 return oh->_mpu_rt_va;
3718 }
3719
3720 /**
3721 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3722 * @oh: struct omap_hwmod *
3723 * @init_oh: struct omap_hwmod * (initiator)
3724 *
3725 * Add a sleep dependency between the initiator @init_oh and @oh.
3726 * Intended to be called by DSP/Bridge code via platform_data for the
3727 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3728 * code needs to add/del initiator dependencies dynamically
3729 * before/after accessing a device. Returns the return value from
3730 * _add_initiator_dep().
3731 *
3732 * XXX Keep a usecount in the clockdomain code
3733 */
3734 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3735 struct omap_hwmod *init_oh)
3736 {
3737 return _add_initiator_dep(oh, init_oh);
3738 }
3739
3740 /*
3741 * XXX what about functions for drivers to save/restore ocp_sysconfig
3742 * for context save/restore operations?
3743 */
3744
3745 /**
3746 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3747 * @oh: struct omap_hwmod *
3748 * @init_oh: struct omap_hwmod * (initiator)
3749 *
3750 * Remove a sleep dependency between the initiator @init_oh and @oh.
3751 * Intended to be called by DSP/Bridge code via platform_data for the
3752 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3753 * code needs to add/del initiator dependencies dynamically
3754 * before/after accessing a device. Returns the return value from
3755 * _del_initiator_dep().
3756 *
3757 * XXX Keep a usecount in the clockdomain code
3758 */
3759 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3760 struct omap_hwmod *init_oh)
3761 {
3762 return _del_initiator_dep(oh, init_oh);
3763 }
3764
3765 /**
3766 * omap_hwmod_enable_wakeup - allow device to wake up the system
3767 * @oh: struct omap_hwmod *
3768 *
3769 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3770 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3771 * this IP block if it has dynamic mux entries. Eventually this
3772 * should set PRCM wakeup registers to cause the PRCM to receive
3773 * wakeup events from the module. Does not set any wakeup routing
3774 * registers beyond this point - if the module is to wake up any other
3775 * module or subsystem, that must be set separately. Called by
3776 * omap_device code. Returns -EINVAL on error or 0 upon success.
3777 */
3778 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3779 {
3780 unsigned long flags;
3781 u32 v;
3782
3783 spin_lock_irqsave(&oh->_lock, flags);
3784
3785 if (oh->class->sysc &&
3786 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3787 v = oh->_sysc_cache;
3788 _enable_wakeup(oh, &v);
3789 _write_sysconfig(v, oh);
3790 }
3791
3792 _set_idle_ioring_wakeup(oh, true);
3793 spin_unlock_irqrestore(&oh->_lock, flags);
3794
3795 return 0;
3796 }
3797
3798 /**
3799 * omap_hwmod_disable_wakeup - prevent device from waking the system
3800 * @oh: struct omap_hwmod *
3801 *
3802 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3803 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3804 * events for this IP block if it has dynamic mux entries. Eventually
3805 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3806 * wakeup events from the module. Does not set any wakeup routing
3807 * registers beyond this point - if the module is to wake up any other
3808 * module or subsystem, that must be set separately. Called by
3809 * omap_device code. Returns -EINVAL on error or 0 upon success.
3810 */
3811 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3812 {
3813 unsigned long flags;
3814 u32 v;
3815
3816 spin_lock_irqsave(&oh->_lock, flags);
3817
3818 if (oh->class->sysc &&
3819 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3820 v = oh->_sysc_cache;
3821 _disable_wakeup(oh, &v);
3822 _write_sysconfig(v, oh);
3823 }
3824
3825 _set_idle_ioring_wakeup(oh, false);
3826 spin_unlock_irqrestore(&oh->_lock, flags);
3827
3828 return 0;
3829 }
3830
3831 /**
3832 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3833 * contained in the hwmod module.
3834 * @oh: struct omap_hwmod *
3835 * @name: name of the reset line to lookup and assert
3836 *
3837 * Some IP like dsp, ipu or iva contain processor that require
3838 * an HW reset line to be assert / deassert in order to enable fully
3839 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3840 * yet supported on this OMAP; otherwise, passes along the return value
3841 * from _assert_hardreset().
3842 */
3843 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3844 {
3845 int ret;
3846 unsigned long flags;
3847
3848 if (!oh)
3849 return -EINVAL;
3850
3851 spin_lock_irqsave(&oh->_lock, flags);
3852 ret = _assert_hardreset(oh, name);
3853 spin_unlock_irqrestore(&oh->_lock, flags);
3854
3855 return ret;
3856 }
3857
3858 /**
3859 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3860 * contained in the hwmod module.
3861 * @oh: struct omap_hwmod *
3862 * @name: name of the reset line to look up and deassert
3863 *
3864 * Some IP like dsp, ipu or iva contain processor that require
3865 * an HW reset line to be assert / deassert in order to enable fully
3866 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3867 * yet supported on this OMAP; otherwise, passes along the return value
3868 * from _deassert_hardreset().
3869 */
3870 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3871 {
3872 int ret;
3873 unsigned long flags;
3874
3875 if (!oh)
3876 return -EINVAL;
3877
3878 spin_lock_irqsave(&oh->_lock, flags);
3879 ret = _deassert_hardreset(oh, name);
3880 spin_unlock_irqrestore(&oh->_lock, flags);
3881
3882 return ret;
3883 }
3884
3885 /**
3886 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3887 * contained in the hwmod module
3888 * @oh: struct omap_hwmod *
3889 * @name: name of the reset line to look up and read
3890 *
3891 * Return the current state of the hwmod @oh's reset line named @name:
3892 * returns -EINVAL upon parameter error or if this operation
3893 * is unsupported on the current OMAP; otherwise, passes along the return
3894 * value from _read_hardreset().
3895 */
3896 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3897 {
3898 int ret;
3899 unsigned long flags;
3900
3901 if (!oh)
3902 return -EINVAL;
3903
3904 spin_lock_irqsave(&oh->_lock, flags);
3905 ret = _read_hardreset(oh, name);
3906 spin_unlock_irqrestore(&oh->_lock, flags);
3907
3908 return ret;
3909 }
3910
3911
3912 /**
3913 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3914 * @classname: struct omap_hwmod_class name to search for
3915 * @fn: callback function pointer to call for each hwmod in class @classname
3916 * @user: arbitrary context data to pass to the callback function
3917 *
3918 * For each omap_hwmod of class @classname, call @fn.
3919 * If the callback function returns something other than
3920 * zero, the iterator is terminated, and the callback function's return
3921 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3922 * if @classname or @fn are NULL, or passes back the error code from @fn.
3923 */
3924 int omap_hwmod_for_each_by_class(const char *classname,
3925 int (*fn)(struct omap_hwmod *oh,
3926 void *user),
3927 void *user)
3928 {
3929 struct omap_hwmod *temp_oh;
3930 int ret = 0;
3931
3932 if (!classname || !fn)
3933 return -EINVAL;
3934
3935 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3936 __func__, classname);
3937
3938 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3939 if (!strcmp(temp_oh->class->name, classname)) {
3940 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3941 __func__, temp_oh->name);
3942 ret = (*fn)(temp_oh, user);
3943 if (ret)
3944 break;
3945 }
3946 }
3947
3948 if (ret)
3949 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3950 __func__, ret);
3951
3952 return ret;
3953 }
3954
3955 /**
3956 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3957 * @oh: struct omap_hwmod *
3958 * @state: state that _setup() should leave the hwmod in
3959 *
3960 * Sets the hwmod state that @oh will enter at the end of _setup()
3961 * (called by omap_hwmod_setup_*()). See also the documentation
3962 * for _setup_postsetup(), above. Returns 0 upon success or
3963 * -EINVAL if there is a problem with the arguments or if the hwmod is
3964 * in the wrong state.
3965 */
3966 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3967 {
3968 int ret;
3969 unsigned long flags;
3970
3971 if (!oh)
3972 return -EINVAL;
3973
3974 if (state != _HWMOD_STATE_DISABLED &&
3975 state != _HWMOD_STATE_ENABLED &&
3976 state != _HWMOD_STATE_IDLE)
3977 return -EINVAL;
3978
3979 spin_lock_irqsave(&oh->_lock, flags);
3980
3981 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3982 ret = -EINVAL;
3983 goto ohsps_unlock;
3984 }
3985
3986 oh->_postsetup_state = state;
3987 ret = 0;
3988
3989 ohsps_unlock:
3990 spin_unlock_irqrestore(&oh->_lock, flags);
3991
3992 return ret;
3993 }
3994
3995 /**
3996 * omap_hwmod_get_context_loss_count - get lost context count
3997 * @oh: struct omap_hwmod *
3998 *
3999 * Returns the context loss count of associated @oh
4000 * upon success, or zero if no context loss data is available.
4001 *
4002 * On OMAP4, this queries the per-hwmod context loss register,
4003 * assuming one exists. If not, or on OMAP2/3, this queries the
4004 * enclosing powerdomain context loss count.
4005 */
4006 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
4007 {
4008 struct powerdomain *pwrdm;
4009 int ret = 0;
4010
4011 if (soc_ops.get_context_lost)
4012 return soc_ops.get_context_lost(oh);
4013
4014 pwrdm = omap_hwmod_get_pwrdm(oh);
4015 if (pwrdm)
4016 ret = pwrdm_get_context_loss_count(pwrdm);
4017
4018 return ret;
4019 }
4020
4021 /**
4022 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
4023 * @oh: struct omap_hwmod *
4024 *
4025 * Prevent the hwmod @oh from being reset during the setup process.
4026 * Intended for use by board-*.c files on boards with devices that
4027 * cannot tolerate being reset. Must be called before the hwmod has
4028 * been set up. Returns 0 upon success or negative error code upon
4029 * failure.
4030 */
4031 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
4032 {
4033 if (!oh)
4034 return -EINVAL;
4035
4036 if (oh->_state != _HWMOD_STATE_REGISTERED) {
4037 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
4038 oh->name);
4039 return -EINVAL;
4040 }
4041
4042 oh->flags |= HWMOD_INIT_NO_RESET;
4043
4044 return 0;
4045 }
4046
4047 /**
4048 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
4049 * @oh: struct omap_hwmod * containing hwmod mux entries
4050 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
4051 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
4052 *
4053 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
4054 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
4055 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
4056 * this function is not called for a given pad_idx, then the ISR
4057 * associated with @oh's first MPU IRQ will be triggered when an I/O
4058 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
4059 * the _dynamic or wakeup_ entry: if there are other entries not
4060 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
4061 * entries are NOT COUNTED in the dynamic pad index. This function
4062 * must be called separately for each pad that requires its interrupt
4063 * to be re-routed this way. Returns -EINVAL if there is an argument
4064 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
4065 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
4066 *
4067 * XXX This function interface is fragile. Rather than using array
4068 * indexes, which are subject to unpredictable change, it should be
4069 * using hwmod IRQ names, and some other stable key for the hwmod mux
4070 * pad records.
4071 */
4072 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
4073 {
4074 int nr_irqs;
4075
4076 might_sleep();
4077
4078 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
4079 pad_idx >= oh->mux->nr_pads_dynamic)
4080 return -EINVAL;
4081
4082 /* Check the number of available mpu_irqs */
4083 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
4084 ;
4085
4086 if (irq_idx >= nr_irqs)
4087 return -EINVAL;
4088
4089 if (!oh->mux->irqs) {
4090 /* XXX What frees this? */
4091 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
4092 GFP_KERNEL);
4093 if (!oh->mux->irqs)
4094 return -ENOMEM;
4095 }
4096 oh->mux->irqs[pad_idx] = irq_idx;
4097
4098 return 0;
4099 }
4100
4101 /**
4102 * omap_hwmod_init - initialize the hwmod code
4103 *
4104 * Sets up some function pointers needed by the hwmod code to operate on the
4105 * currently-booted SoC. Intended to be called once during kernel init
4106 * before any hwmods are registered. No return value.
4107 */
4108 void __init omap_hwmod_init(void)
4109 {
4110 if (cpu_is_omap24xx()) {
4111 soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
4112 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4113 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4114 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4115 } else if (cpu_is_omap34xx()) {
4116 soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
4117 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4118 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4119 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4120 } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
4121 soc_ops.enable_module = _omap4_enable_module;
4122 soc_ops.disable_module = _omap4_disable_module;
4123 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4124 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4125 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4126 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4127 soc_ops.init_clkdm = _init_clkdm;
4128 soc_ops.update_context_lost = _omap4_update_context_lost;
4129 soc_ops.get_context_lost = _omap4_get_context_lost;
4130 } else if (soc_is_am33xx()) {
4131 soc_ops.enable_module = _am33xx_enable_module;
4132 soc_ops.disable_module = _am33xx_disable_module;
4133 soc_ops.wait_target_ready = _am33xx_wait_target_ready;
4134 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4135 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4136 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
4137 soc_ops.init_clkdm = _init_clkdm;
4138 } else {
4139 WARN(1, "omap_hwmod: unknown SoC type\n");
4140 }
4141
4142 inited = true;
4143 }
4144
4145 /**
4146 * omap_hwmod_get_main_clk - get pointer to main clock name
4147 * @oh: struct omap_hwmod *
4148 *
4149 * Returns the main clock name assocated with @oh upon success,
4150 * or NULL if @oh is NULL.
4151 */
4152 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4153 {
4154 if (!oh)
4155 return NULL;
4156
4157 return oh->main_clk;
4158 }
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