arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c

   1 /*
   2  * omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3
   3  *
   4  * Copyright (C) 2009-2011 Nokia Corporation
   5  * Paul Walmsley
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * XXX handle crossbar/shared link difference for L3?
  12  * XXX these should be marked initdata for multi-OMAP kernels
  13  */
  14 #include <asm/sizes.h>
  15
  16 #include <plat/omap_hwmod.h>
  17 #include <plat/serial.h>
  18
  19 #include "omap_hwmod_common_data.h"
  20
  21 struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
  22         {
  23                 .pa_start       = 0x4809c000,
  24                 .pa_end         = 0x4809c1ff,
  25                 .flags          = ADDR_TYPE_RT,
  26         },
  27         { }
  28 };
  29
  30 struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
  31         {
  32                 .pa_start       = 0x480b4000,
  33                 .pa_end         = 0x480b41ff,
  34                 .flags          = ADDR_TYPE_RT,
  35         },
  36         { }
  37 };
  38
  39 struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = {
  40         {
  41                 .pa_start       = 0x48070000,
  42                 .pa_end         = 0x48070000 + SZ_128 - 1,
  43                 .flags          = ADDR_TYPE_RT,
  44         },
  45         { }
  46 };
  47
  48 struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = {
  49         {
  50                 .pa_start       = 0x48072000,
  51                 .pa_end         = 0x48072000 + SZ_128 - 1,
  52                 .flags          = ADDR_TYPE_RT,
  53         },
  54         { }
  55 };
  56
  57 struct omap_hwmod_addr_space omap2_dss_addrs[] = {
  58         {
  59                 .pa_start       = 0x48050000,
  60                 .pa_end         = 0x48050000 + SZ_1K - 1,
  61                 .flags          = ADDR_TYPE_RT
  62         },
  63         { }
  64 };
  65
  66 struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = {
  67         {
  68                 .pa_start       = 0x48050400,
  69                 .pa_end         = 0x48050400 + SZ_1K - 1,
  70                 .flags          = ADDR_TYPE_RT
  71         },
  72         { }
  73 };
  74
  75 struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = {
  76         {
  77                 .pa_start       = 0x48050800,
  78                 .pa_end         = 0x48050800 + SZ_1K - 1,
  79                 .flags          = ADDR_TYPE_RT
  80         },
  81         { }
  82 };
  83
  84 struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = {
  85         {
  86                 .pa_start       = 0x48050C00,
  87                 .pa_end         = 0x48050C00 + SZ_1K - 1,
  88                 .flags          = ADDR_TYPE_RT
  89         },
  90         { }
  91 };
  92
  93 struct omap_hwmod_addr_space omap2_timer10_addrs[] = {
  94         {
  95                 .pa_start       = 0x48086000,
  96                 .pa_end         = 0x48086000 + SZ_1K - 1,
  97                 .flags          = ADDR_TYPE_RT
  98         },
  99         { }
 100 };
 101
 102 struct omap_hwmod_addr_space omap2_timer11_addrs[] = {
 103         {
 104                 .pa_start       = 0x48088000,
 105                 .pa_end         = 0x48088000 + SZ_1K - 1,
 106                 .flags          = ADDR_TYPE_RT
 107         },
 108         { }
 109 };
 110
 111 struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = {
 112         {
 113                 .pa_start       = 0x4808a000,
 114                 .pa_end         = 0x4808a000 + SZ_1K - 1,
 115                 .flags          = ADDR_TYPE_RT
 116         },
 117         { }
 118 };
 119
 120 struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = {
 121         {
 122                 .pa_start       = 0x48098000,
 123                 .pa_end         = 0x48098000 + SZ_256 - 1,
 124                 .flags          = ADDR_TYPE_RT,
 125         },
 126         { }
 127 };
 128
 129 struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = {
 130         {
 131                 .pa_start       = 0x4809a000,
 132                 .pa_end         = 0x4809a000 + SZ_256 - 1,
 133                 .flags          = ADDR_TYPE_RT,
 134         },
 135         { }
 136 };
 137
 138 struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = {
 139         {
 140                 .pa_start       = 0x480b8000,
 141                 .pa_end         = 0x480b8000 + SZ_256 - 1,
 142                 .flags          = ADDR_TYPE_RT,
 143         },
 144         { }
 145 };
 146
 147 struct omap_hwmod_addr_space omap2_dma_system_addrs[] = {
 148         {
 149                 .pa_start       = 0x48056000,
 150                 .pa_end         = 0x48056000 + SZ_4K - 1,
 151                 .flags          = ADDR_TYPE_RT
 152         },
 153         { }
 154 };
 155
 156 struct omap_hwmod_addr_space omap2_mailbox_addrs[] = {
 157         {
 158                 .pa_start       = 0x48094000,
 159                 .pa_end         = 0x48094000 + SZ_512 - 1,
 160                 .flags          = ADDR_TYPE_RT,
 161         },
 162         { }
 163 };
 164
 165 struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = {
 166         {
 167                 .name           = "mpu",
 168                 .pa_start       = 0x48074000,
 169                 .pa_end         = 0x480740ff,
 170                 .flags          = ADDR_TYPE_RT
 171         },
 172         { }
 173 };
 174
 175 struct omap_hwmod_addr_space omap2_hdq1w_addr_space[] = {
 176         {
 177                 .pa_start       = 0x480b2000,
 178                 .pa_end         = 0x480b2fff,
 179                 .flags          = ADDR_TYPE_RT,
 180         },
 181         { }
 182 };