e66855ef4c78fae5d42b52875f79c379cf394d70
[deliverable/linux.git] / arch / arm / mach-omap2 / pm.c
1 /*
2 * pm.c - Common OMAP2+ power management-related code
3 *
4 * Copyright (C) 2010 Texas Instruments, Inc.
5 * Copyright (C) 2010 Nokia Corporation
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/io.h>
15 #include <linux/err.h>
16 #include <linux/opp.h>
17 #include <linux/export.h>
18 #include <linux/suspend.h>
19 #include <linux/cpu.h>
20
21 #include <asm/system_misc.h>
22
23 #include "omap-pm.h"
24 #include "omap_device.h"
25 #include "common.h"
26
27 #include "prcm-common.h"
28 #include "voltage.h"
29 #include "powerdomain.h"
30 #include "clockdomain.h"
31 #include "pm.h"
32 #include "twl-common.h"
33
34 static struct omap_device_pm_latency *pm_lats;
35
36 /*
37 * omap_pm_suspend: points to a function that does the SoC-specific
38 * suspend work
39 */
40 int (*omap_pm_suspend)(void);
41
42 static int __init _init_omap_device(char *name)
43 {
44 struct omap_hwmod *oh;
45 struct platform_device *pdev;
46
47 oh = omap_hwmod_lookup(name);
48 if (WARN(!oh, "%s: could not find omap_hwmod for %s\n",
49 __func__, name))
50 return -ENODEV;
51
52 pdev = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false);
53 if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n",
54 __func__, name))
55 return -ENODEV;
56
57 return 0;
58 }
59
60 /*
61 * Build omap_devices for processors and bus.
62 */
63 static void __init omap2_init_processor_devices(void)
64 {
65 _init_omap_device("mpu");
66 if (omap3_has_iva())
67 _init_omap_device("iva");
68
69 if (cpu_is_omap44xx()) {
70 _init_omap_device("l3_main_1");
71 _init_omap_device("dsp");
72 _init_omap_device("iva");
73 } else {
74 _init_omap_device("l3_main");
75 }
76 }
77
78 /* Types of sleep_switch used in omap_set_pwrdm_state */
79 #define FORCEWAKEUP_SWITCH 0
80 #define LOWPOWERSTATE_SWITCH 1
81
82 int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
83 {
84 if ((clkdm->flags & CLKDM_CAN_ENABLE_AUTO) &&
85 !(clkdm->flags & CLKDM_MISSING_IDLE_REPORTING))
86 clkdm_allow_idle(clkdm);
87 else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
88 atomic_read(&clkdm->usecount) == 0)
89 clkdm_sleep(clkdm);
90 return 0;
91 }
92
93 /*
94 * This sets pwrdm state (other than mpu & core. Currently only ON &
95 * RET are supported.
96 */
97 int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst)
98 {
99 u8 curr_pwrst, next_pwrst;
100 int sleep_switch = -1, ret = 0, hwsup = 0;
101
102 if (!pwrdm || IS_ERR(pwrdm))
103 return -EINVAL;
104
105 while (!(pwrdm->pwrsts & (1 << pwrst))) {
106 if (pwrst == PWRDM_POWER_OFF)
107 return ret;
108 pwrst--;
109 }
110
111 next_pwrst = pwrdm_read_next_pwrst(pwrdm);
112 if (next_pwrst == pwrst)
113 return ret;
114
115 curr_pwrst = pwrdm_read_pwrst(pwrdm);
116 if (curr_pwrst < PWRDM_POWER_ON) {
117 if ((curr_pwrst > pwrst) &&
118 (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) {
119 sleep_switch = LOWPOWERSTATE_SWITCH;
120 } else {
121 hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
122 clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
123 sleep_switch = FORCEWAKEUP_SWITCH;
124 }
125 }
126
127 ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
128 if (ret)
129 pr_err("%s: unable to set power state of powerdomain: %s\n",
130 __func__, pwrdm->name);
131
132 switch (sleep_switch) {
133 case FORCEWAKEUP_SWITCH:
134 if (hwsup)
135 clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
136 else
137 clkdm_sleep(pwrdm->pwrdm_clkdms[0]);
138 break;
139 case LOWPOWERSTATE_SWITCH:
140 pwrdm_set_lowpwrstchange(pwrdm);
141 pwrdm_wait_transition(pwrdm);
142 pwrdm_state_switch(pwrdm);
143 break;
144 }
145
146 return ret;
147 }
148
149
150
151 /*
152 * This API is to be called during init to set the various voltage
153 * domains to the voltage as per the opp table. Typically we boot up
154 * at the nominal voltage. So this function finds out the rate of
155 * the clock associated with the voltage domain, finds out the correct
156 * opp entry and sets the voltage domain to the voltage specified
157 * in the opp entry
158 */
159 static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
160 const char *oh_name)
161 {
162 struct voltagedomain *voltdm;
163 struct clk *clk;
164 struct opp *opp;
165 unsigned long freq, bootup_volt;
166 struct device *dev;
167
168 if (!vdd_name || !clk_name || !oh_name) {
169 pr_err("%s: invalid parameters\n", __func__);
170 goto exit;
171 }
172
173 if (!strncmp(oh_name, "mpu", 3))
174 /*
175 * All current OMAPs share voltage rail and clock
176 * source, so CPU0 is used to represent the MPU-SS.
177 */
178 dev = get_cpu_device(0);
179 else
180 dev = omap_device_get_by_hwmod_name(oh_name);
181
182 if (IS_ERR(dev)) {
183 pr_err("%s: Unable to get dev pointer for hwmod %s\n",
184 __func__, oh_name);
185 goto exit;
186 }
187
188 voltdm = voltdm_lookup(vdd_name);
189 if (!voltdm) {
190 pr_err("%s: unable to get vdd pointer for vdd_%s\n",
191 __func__, vdd_name);
192 goto exit;
193 }
194
195 clk = clk_get(NULL, clk_name);
196 if (IS_ERR(clk)) {
197 pr_err("%s: unable to get clk %s\n", __func__, clk_name);
198 goto exit;
199 }
200
201 freq = clk_get_rate(clk);
202 clk_put(clk);
203
204 rcu_read_lock();
205 opp = opp_find_freq_ceil(dev, &freq);
206 if (IS_ERR(opp)) {
207 rcu_read_unlock();
208 pr_err("%s: unable to find boot up OPP for vdd_%s\n",
209 __func__, vdd_name);
210 goto exit;
211 }
212
213 bootup_volt = opp_get_voltage(opp);
214 rcu_read_unlock();
215 if (!bootup_volt) {
216 pr_err("%s: unable to find voltage corresponding to the bootup OPP for vdd_%s\n",
217 __func__, vdd_name);
218 goto exit;
219 }
220
221 voltdm_scale(voltdm, bootup_volt);
222 return 0;
223
224 exit:
225 pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name);
226 return -EINVAL;
227 }
228
229 #ifdef CONFIG_SUSPEND
230 static int omap_pm_enter(suspend_state_t suspend_state)
231 {
232 int ret = 0;
233
234 if (!omap_pm_suspend)
235 return -ENOENT; /* XXX doublecheck */
236
237 switch (suspend_state) {
238 case PM_SUSPEND_STANDBY:
239 case PM_SUSPEND_MEM:
240 ret = omap_pm_suspend();
241 break;
242 default:
243 ret = -EINVAL;
244 }
245
246 return ret;
247 }
248
249 static int omap_pm_begin(suspend_state_t state)
250 {
251 disable_hlt();
252 if (cpu_is_omap34xx())
253 omap_prcm_irq_prepare();
254 return 0;
255 }
256
257 static void omap_pm_end(void)
258 {
259 enable_hlt();
260 return;
261 }
262
263 static void omap_pm_finish(void)
264 {
265 if (cpu_is_omap34xx())
266 omap_prcm_irq_complete();
267 }
268
269 static const struct platform_suspend_ops omap_pm_ops = {
270 .begin = omap_pm_begin,
271 .end = omap_pm_end,
272 .enter = omap_pm_enter,
273 .finish = omap_pm_finish,
274 .valid = suspend_valid_only_mem,
275 };
276
277 #endif /* CONFIG_SUSPEND */
278
279 static void __init omap3_init_voltages(void)
280 {
281 if (!cpu_is_omap34xx())
282 return;
283
284 omap2_set_init_voltage("mpu_iva", "dpll1_ck", "mpu");
285 omap2_set_init_voltage("core", "l3_ick", "l3_main");
286 }
287
288 static void __init omap4_init_voltages(void)
289 {
290 if (!cpu_is_omap44xx())
291 return;
292
293 omap2_set_init_voltage("mpu", "dpll_mpu_ck", "mpu");
294 omap2_set_init_voltage("core", "l3_div_ck", "l3_main_1");
295 omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva");
296 }
297
298 static int __init omap2_common_pm_init(void)
299 {
300 if (!of_have_populated_dt())
301 omap2_init_processor_devices();
302 omap_pm_if_init();
303
304 return 0;
305 }
306 postcore_initcall(omap2_common_pm_init);
307
308 int __init omap2_common_pm_late_init(void)
309 {
310 /*
311 * In the case of DT, the PMIC and SR initialization will be done using
312 * a completely different mechanism.
313 * Disable this part if a DT blob is available.
314 */
315 if (of_have_populated_dt())
316 return 0;
317
318 /* Init the voltage layer */
319 omap_pmic_late_init();
320 omap_voltage_late_init();
321
322 /* Initialize the voltages */
323 omap3_init_voltages();
324 omap4_init_voltages();
325
326 /* Smartreflex device init */
327 omap_devinit_smartreflex();
328
329 #ifdef CONFIG_SUSPEND
330 suspend_set_ops(&omap_pm_ops);
331 #endif
332
333 return 0;
334 }
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