arch/arm/mach-omap2/powerdomain.h

   1 /*
   2  * OMAP2/3/4 powerdomain control
   3  *
   4  * Copyright (C) 2007-2008, 2010 Texas Instruments, Inc.
   5  * Copyright (C) 2007-2011 Nokia Corporation
   6  *
   7  * Paul Walmsley
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * XXX This should be moved to the mach-omap2/ directory at the earliest
  14  * opportunity.
  15  */
  16
  17 #ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
  18 #define __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
  19
  20 #include <linux/types.h>
  21 #include <linux/list.h>
  22
  23 #include <linux/atomic.h>
  24
  25 #include "voltage.h"
  26
  27 /* Powerdomain basic power states */
  28 #define PWRDM_POWER_OFF         0x0
  29 #define PWRDM_POWER_RET         0x1
  30 #define PWRDM_POWER_INACTIVE    0x2
  31 #define PWRDM_POWER_ON          0x3
  32
  33 #define PWRDM_MAX_PWRSTS        4
  34
  35 /* Powerdomain allowable state bitfields */
  36 #define PWRSTS_ON               (1 << PWRDM_POWER_ON)
  37 #define PWRSTS_INACTIVE         (1 << PWRDM_POWER_INACTIVE)
  38 #define PWRSTS_RET              (1 << PWRDM_POWER_RET)
  39 #define PWRSTS_OFF              (1 << PWRDM_POWER_OFF)
  40
  41 #define PWRSTS_OFF_ON           (PWRSTS_OFF | PWRSTS_ON)
  42 #define PWRSTS_OFF_RET          (PWRSTS_OFF | PWRSTS_RET)
  43 #define PWRSTS_RET_ON           (PWRSTS_RET | PWRSTS_ON)
  44 #define PWRSTS_OFF_RET_ON       (PWRSTS_OFF_RET | PWRSTS_ON)
  45
  46
  47 /* Powerdomain flags */
  48 #define PWRDM_HAS_HDWR_SAR      (1 << 0) /* hardware save-and-restore support */
  49 #define PWRDM_HAS_MPU_QUIRK     (1 << 1) /* MPU pwr domain has MEM bank 0 bits
  50                                           * in MEM bank 1 position. This is
  51                                           * true for OMAP3430
  52                                           */
  53 #define PWRDM_HAS_LOWPOWERSTATECHANGE   (1 << 2) /*
  54                                                   * support to transition from a
  55                                                   * sleep state to a lower sleep
  56                                                   * state without waking up the
  57                                                   * powerdomain
  58                                                   */
  59
  60 /*
  61  * Number of memory banks that are power-controllable.  On OMAP4430, the
  62  * maximum is 5.
  63  */
  64 #define PWRDM_MAX_MEM_BANKS     5
  65
  66 /*
  67  * Maximum number of clockdomains that can be associated with a powerdomain.
  68  * PER powerdomain on AM33XX is the worst case
  69  */
  70 #define PWRDM_MAX_CLKDMS        11
  71
  72 /* XXX A completely arbitrary number. What is reasonable here? */
  73 #define PWRDM_TRANSITION_BAILOUT 100000
  74
  75 struct clockdomain;
  76 struct powerdomain;
  77
  78 /**
  79  * struct powerdomain - OMAP powerdomain
  80  * @name: Powerdomain name
  81  * @voltdm: voltagedomain containing this powerdomain
  82  * @prcm_offs: the address offset from CM_BASE/PRM_BASE
  83  * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
  84  * @pwrsts: Possible powerdomain power states
  85  * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION
  86  * @flags: Powerdomain flags
  87  * @banks: Number of software-controllable memory banks in this powerdomain
  88  * @pwrsts_mem_ret: Possible memory bank pwrstates when pwrdm in RETENTION
  89  * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON
  90  * @pwrdm_clkdms: Clockdomains in this powerdomain
  91  * @node: list_head linking all powerdomains
  92  * @voltdm_node: list_head linking all powerdomains in a voltagedomain
  93  * @pwrstctrl_offs: (AM33XX only) XXX_PWRSTCTRL reg offset from prcm_offs
  94  * @pwrstst_offs: (AM33XX only) XXX_PWRSTST reg offset from prcm_offs
  95  * @logicretstate_mask: (AM33XX only) mask for logic retention bitfield
  96  *      in @pwrstctrl_offs
  97  * @mem_on_mask: (AM33XX only) mask for mem on bitfield in @pwrstctrl_offs
  98  * @mem_ret_mask: (AM33XX only) mask for mem ret bitfield in @pwrstctrl_offs
  99  * @mem_pwrst_mask: (AM33XX only) mask for mem state bitfield in @pwrstst_offs
 100  * @mem_retst_mask: (AM33XX only) mask for mem retention state bitfield
 101  *      in @pwrstctrl_offs
 102  * @state:
 103  * @state_counter:
 104  * @timer:
 105  * @state_timer:
 106  *
 107  * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h.
 108  */
 109 struct powerdomain {
 110         const char *name;
 111         union {
 112                 const char *name;
 113                 struct voltagedomain *ptr;
 114         } voltdm;
 115         const s16 prcm_offs;
 116         const u8 pwrsts;
 117         const u8 pwrsts_logic_ret;
 118         const u8 flags;
 119         const u8 banks;
 120         const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS];
 121         const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS];
 122         const u8 prcm_partition;
 123         struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
 124         struct list_head node;
 125         struct list_head voltdm_node;
 126         int state;
 127         unsigned state_counter[PWRDM_MAX_PWRSTS];
 128         unsigned ret_logic_off_counter;
 129         unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS];
 130
 131         const u8 pwrstctrl_offs;
 132         const u8 pwrstst_offs;
 133         const u32 logicretstate_mask;
 134         const u32 mem_on_mask[PWRDM_MAX_MEM_BANKS];
 135         const u32 mem_ret_mask[PWRDM_MAX_MEM_BANKS];
 136         const u32 mem_pwrst_mask[PWRDM_MAX_MEM_BANKS];
 137         const u32 mem_retst_mask[PWRDM_MAX_MEM_BANKS];
 138
 139 #ifdef CONFIG_PM_DEBUG
 140         s64 timer;
 141         s64 state_timer[PWRDM_MAX_PWRSTS];
 142 #endif
 143 };
 144
 145 /**
 146  * struct pwrdm_ops - Arch specific function implementations
 147  * @pwrdm_set_next_pwrst: Set the target power state for a pd
 148  * @pwrdm_read_next_pwrst: Read the target power state set for a pd
 149  * @pwrdm_read_pwrst: Read the current power state of a pd
 150  * @pwrdm_read_prev_pwrst: Read the prev power state entered by the pd
 151  * @pwrdm_set_logic_retst: Set the logic state in RET for a pd
 152  * @pwrdm_set_mem_onst: Set the Memory state in ON for a pd
 153  * @pwrdm_set_mem_retst: Set the Memory state in RET for a pd
 154  * @pwrdm_read_logic_pwrst: Read the current logic state of a pd
 155  * @pwrdm_read_prev_logic_pwrst: Read the previous logic state entered by a pd
 156  * @pwrdm_read_logic_retst: Read the logic state in RET for a pd
 157  * @pwrdm_read_mem_pwrst: Read the current memory state of a pd
 158  * @pwrdm_read_prev_mem_pwrst: Read the previous memory state entered by a pd
 159  * @pwrdm_read_mem_retst: Read the memory state in RET for a pd
 160  * @pwrdm_clear_all_prev_pwrst: Clear all previous power states logged for a pd
 161  * @pwrdm_enable_hdwr_sar: Enable Hardware Save-Restore feature for the pd
 162  * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd
 163  * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep
 164  * @pwrdm_wait_transition: Wait for a pd state transition to complete
 165  */
 166 struct pwrdm_ops {
 167         int     (*pwrdm_set_next_pwrst)(struct powerdomain *pwrdm, u8 pwrst);
 168         int     (*pwrdm_read_next_pwrst)(struct powerdomain *pwrdm);
 169         int     (*pwrdm_read_pwrst)(struct powerdomain *pwrdm);
 170         int     (*pwrdm_read_prev_pwrst)(struct powerdomain *pwrdm);
 171         int     (*pwrdm_set_logic_retst)(struct powerdomain *pwrdm, u8 pwrst);
 172         int     (*pwrdm_set_mem_onst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
 173         int     (*pwrdm_set_mem_retst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
 174         int     (*pwrdm_read_logic_pwrst)(struct powerdomain *pwrdm);
 175         int     (*pwrdm_read_prev_logic_pwrst)(struct powerdomain *pwrdm);
 176         int     (*pwrdm_read_logic_retst)(struct powerdomain *pwrdm);
 177         int     (*pwrdm_read_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
 178         int     (*pwrdm_read_prev_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
 179         int     (*pwrdm_read_mem_retst)(struct powerdomain *pwrdm, u8 bank);
 180         int     (*pwrdm_clear_all_prev_pwrst)(struct powerdomain *pwrdm);
 181         int     (*pwrdm_enable_hdwr_sar)(struct powerdomain *pwrdm);
 182         int     (*pwrdm_disable_hdwr_sar)(struct powerdomain *pwrdm);
 183         int     (*pwrdm_set_lowpwrstchange)(struct powerdomain *pwrdm);
 184         int     (*pwrdm_wait_transition)(struct powerdomain *pwrdm);
 185 };
 186
 187 int pwrdm_register_platform_funcs(struct pwrdm_ops *custom_funcs);
 188 int pwrdm_register_pwrdms(struct powerdomain **pwrdm_list);
 189 int pwrdm_complete_init(void);
 190
 191 struct powerdomain *pwrdm_lookup(const char *name);
 192
 193 int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
 194                         void *user);
 195 int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
 196                         void *user);
 197
 198 int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
 199 int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
 200 int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
 201                          int (*fn)(struct powerdomain *pwrdm,
 202                                    struct clockdomain *clkdm));
 203 struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm);
 204
 205 int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
 206
 207 int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
 208 int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
 209 int pwrdm_read_pwrst(struct powerdomain *pwrdm);
 210 int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
 211 int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
 212
 213 int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
 214 int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
 215 int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
 216
 217 int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm);
 218 int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
 219 int pwrdm_read_logic_retst(struct powerdomain *pwrdm);
 220 int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
 221 int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
 222 int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank);
 223
 224 int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
 225 int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
 226 bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
 227
 228 int pwrdm_wait_transition(struct powerdomain *pwrdm);
 229
 230 int pwrdm_state_switch(struct powerdomain *pwrdm);
 231 int pwrdm_pre_transition(struct powerdomain *pwrdm);
 232 int pwrdm_post_transition(struct powerdomain *pwrdm);
 233 int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);
 234 int pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
 235 bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
 236
 237 extern void omap242x_powerdomains_init(void);
 238 extern void omap243x_powerdomains_init(void);
 239 extern void omap3xxx_powerdomains_init(void);
 240 extern void am33xx_powerdomains_init(void);
 241 extern void omap44xx_powerdomains_init(void);
 242
 243 extern struct pwrdm_ops omap2_pwrdm_operations;
 244 extern struct pwrdm_ops omap3_pwrdm_operations;
 245 extern struct pwrdm_ops am33xx_pwrdm_operations;
 246 extern struct pwrdm_ops omap4_pwrdm_operations;
 247
 248 /* Common Internal functions used across OMAP rev's */
 249 extern u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank);
 250 extern u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank);
 251 extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank);
 252
 253 extern struct powerdomain wkup_omap2_pwrdm;
 254 extern struct powerdomain gfx_omap2_pwrdm;
 255
 256
 257 #endif