arch/arm/mach-omap2/prm2xxx_3xxx.c

   1 /*
   2  * OMAP2/3 PRM module functions
   3  *
   4  * Copyright (C) 2010-2011 Texas Instruments, Inc.
   5  * Copyright (C) 2010 Nokia Corporation
   6  * Benoît Cousson
   7  * Paul Walmsley
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/errno.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18
  19 #include "common.h"
  20
  21 #include "prm2xxx_3xxx.h"
  22 #include "prm-regbits-24xx.h"
  23
  24 /**
  25  * omap2_prm_is_hardreset_asserted - read the HW reset line state of
  26  * submodules contained in the hwmod module
  27  * @prm_mod: PRM submodule base (e.g. CORE_MOD)
  28  * @shift: register bit shift corresponding to the reset line to check
  29  *
  30  * Returns 1 if the (sub)module hardreset line is currently asserted,
  31  * 0 if the (sub)module hardreset line is not currently asserted, or
  32  * -EINVAL if called while running on a non-OMAP2/3 chip.
  33  */
  34 int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
  35 {
  36         return omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL,
  37                                        (1 << shift));
  38 }
  39
  40 /**
  41  * omap2_prm_assert_hardreset - assert the HW reset line of a submodule
  42  * @prm_mod: PRM submodule base (e.g. CORE_MOD)
  43  * @shift: register bit shift corresponding to the reset line to assert
  44  *
  45  * Some IPs like dsp or iva contain processors that require an HW
  46  * reset line to be asserted / deasserted in order to fully enable the
  47  * IP.  These modules may have multiple hard-reset lines that reset
  48  * different 'submodules' inside the IP block.  This function will
  49  * place the submodule into reset.  Returns 0 upon success or -EINVAL
  50  * upon an argument error.
  51  */
  52 int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
  53 {
  54         u32 mask;
  55
  56         mask = 1 << shift;
  57         omap2_prm_rmw_mod_reg_bits(mask, mask, prm_mod, OMAP2_RM_RSTCTRL);
  58
  59         return 0;
  60 }
  61
  62 /**
  63  * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait
  64  * @prm_mod: PRM submodule base (e.g. CORE_MOD)
  65  * @rst_shift: register bit shift corresponding to the reset line to deassert
  66  * @st_shift: register bit shift for the status of the deasserted submodule
  67  *
  68  * Some IPs like dsp or iva contain processors that require an HW
  69  * reset line to be asserted / deasserted in order to fully enable the
  70  * IP.  These modules may have multiple hard-reset lines that reset
  71  * different 'submodules' inside the IP block.  This function will
  72  * take the submodule out of reset and wait until the PRCM indicates
  73  * that the reset has completed before returning.  Returns 0 upon success or
  74  * -EINVAL upon an argument error, -EEXIST if the submodule was already out
  75  * of reset, or -EBUSY if the submodule did not exit reset promptly.
  76  */
  77 int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
  78 {
  79         u32 rst, st;
  80         int c;
  81
  82         rst = 1 << rst_shift;
  83         st = 1 << st_shift;
  84
  85         /* Check the current status to avoid de-asserting the line twice */
  86         if (omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, rst) == 0)
  87                 return -EEXIST;
  88
  89         /* Clear the reset status by writing 1 to the status bit */
  90         omap2_prm_rmw_mod_reg_bits(0xffffffff, st, prm_mod, OMAP2_RM_RSTST);
  91         /* de-assert the reset control line */
  92         omap2_prm_rmw_mod_reg_bits(rst, 0, prm_mod, OMAP2_RM_RSTCTRL);
  93         /* wait the status to be set */
  94         omap_test_timeout(omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTST,
  95                                                   st),
  96                           MAX_MODULE_HARDRESET_WAIT, c);
  97
  98         return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
  99 }
 100