4 * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/errno.h>
19 #include <linux/err.h>
24 #include "prm-regbits-33xx.h"
26 /* Read a register in a PRM instance */
27 u32
am33xx_prm_read_reg(s16 inst
, u16 idx
)
29 return __raw_readl(prm_base
+ inst
+ idx
);
32 /* Write into a register in a PRM instance */
33 void am33xx_prm_write_reg(u32 val
, s16 inst
, u16 idx
)
35 __raw_writel(val
, prm_base
+ inst
+ idx
);
38 /* Read-modify-write a register in PRM. Caller must lock */
39 u32
am33xx_prm_rmw_reg_bits(u32 mask
, u32 bits
, s16 inst
, s16 idx
)
43 v
= am33xx_prm_read_reg(inst
, idx
);
46 am33xx_prm_write_reg(v
, inst
, idx
);
52 * am33xx_prm_is_hardreset_asserted - read the HW reset line state of
53 * submodules contained in the hwmod module
54 * @shift: register bit shift corresponding to the reset line to check
55 * @inst: CM instance register offset (*_INST macro)
56 * @rstctrl_offs: RM_RSTCTRL register address offset for this module
58 * Returns 1 if the (sub)module hardreset line is currently asserted,
59 * 0 if the (sub)module hardreset line is not currently asserted, or
60 * -EINVAL upon parameter error.
62 int am33xx_prm_is_hardreset_asserted(u8 shift
, s16 inst
, u16 rstctrl_offs
)
66 v
= am33xx_prm_read_reg(inst
, rstctrl_offs
);
74 * am33xx_prm_assert_hardreset - assert the HW reset line of a submodule
75 * @shift: register bit shift corresponding to the reset line to assert
76 * @inst: CM instance register offset (*_INST macro)
77 * @rstctrl_reg: RM_RSTCTRL register address for this module
79 * Some IPs like dsp, ipu or iva contain processors that require an HW
80 * reset line to be asserted / deasserted in order to fully enable the
81 * IP. These modules may have multiple hard-reset lines that reset
82 * different 'submodules' inside the IP block. This function will
83 * place the submodule into reset. Returns 0 upon success or -EINVAL
84 * upon an argument error.
86 int am33xx_prm_assert_hardreset(u8 shift
, s16 inst
, u16 rstctrl_offs
)
88 u32 mask
= 1 << shift
;
90 am33xx_prm_rmw_reg_bits(mask
, mask
, inst
, rstctrl_offs
);
96 * am33xx_prm_deassert_hardreset - deassert a submodule hardreset line and
98 * @shift: register bit shift corresponding to the reset line to deassert
99 * @inst: CM instance register offset (*_INST macro)
100 * @rstctrl_reg: RM_RSTCTRL register address for this module
101 * @rstst_reg: RM_RSTST register address for this module
103 * Some IPs like dsp, ipu or iva contain processors that require an HW
104 * reset line to be asserted / deasserted in order to fully enable the
105 * IP. These modules may have multiple hard-reset lines that reset
106 * different 'submodules' inside the IP block. This function will
107 * take the submodule out of reset and wait until the PRCM indicates
108 * that the reset has completed before returning. Returns 0 upon success or
109 * -EINVAL upon an argument error, -EEXIST if the submodule was already out
110 * of reset, or -EBUSY if the submodule did not exit reset promptly.
112 int am33xx_prm_deassert_hardreset(u8 shift
, s16 inst
,
113 u16 rstctrl_offs
, u16 rstst_offs
)
116 u32 mask
= 1 << shift
;
118 /* Check the current status to avoid de-asserting the line twice */
119 if (am33xx_prm_is_hardreset_asserted(shift
, inst
, rstctrl_offs
) == 0)
122 /* Clear the reset status by writing 1 to the status bit */
123 am33xx_prm_rmw_reg_bits(0xffffffff, mask
, inst
, rstst_offs
);
124 /* de-assert the reset control line */
125 am33xx_prm_rmw_reg_bits(mask
, 0, inst
, rstctrl_offs
);
126 /* wait the status to be set */
128 omap_test_timeout(am33xx_prm_is_hardreset_asserted(shift
, inst
,
130 MAX_MODULE_HARDRESET_WAIT
, c
);
132 return (c
== MAX_MODULE_HARDRESET_WAIT
) ? -EBUSY
: 0;