arch/arm/mach-omap2/prm_common.c

   1 /*
   2  * OMAP2+ common Power & Reset Management (PRM) IP block functions
   3  *
   4  * Copyright (C) 2011 Texas Instruments, Inc.
   5  * Tero Kristo <t-kristo@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  *
  12  * For historical purposes, the API used to configure the PRM
  13  * interrupt handler refers to it as the "PRCM interrupt."  The
  14  * underlying registers are located in the PRM on OMAP3/4.
  15  *
  16  * XXX This code should eventually be moved to a PRM driver.
  17  */
  18
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/init.h>
  22 #include <linux/io.h>
  23 #include <linux/irq.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/slab.h>
  26
  27 #include "../plat-omap/common.h"
  28
  29 #include "prm2xxx_3xxx.h"
  30 #include "prm2xxx.h"
  31 #include "prm3xxx.h"
  32 #include "prm44xx.h"
  33 #include "common.h"
  34
  35 /*
  36  * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
  37  * XXX this is technically not needed, since
  38  * omap_prcm_register_chain_handler() could allocate this based on the
  39  * actual amount of memory needed for the SoC
  40  */
  41 #define OMAP_PRCM_MAX_NR_PENDING_REG            2
  42
  43 /*
  44  * prcm_irq_chips: an array of all of the "generic IRQ chips" in use
  45  * by the PRCM interrupt handler code.  There will be one 'chip' per
  46  * PRM_{IRQSTATUS,IRQENABLE}_MPU register pair.  (So OMAP3 will have
  47  * one "chip" and OMAP4 will have two.)
  48  */
  49 static struct irq_chip_generic **prcm_irq_chips;
  50
  51 /*
  52  * prcm_irq_setup: the PRCM IRQ parameters for the hardware the code
  53  * is currently running on.  Defined and passed by initialization code
  54  * that calls omap_prcm_register_chain_handler().
  55  */
  56 static struct omap_prcm_irq_setup *prcm_irq_setup;
  57
  58 /* prm_base: base virtual address of the PRM IP block */
  59 void __iomem *prm_base;
  60
  61 /*
  62  * prm_ll_data: function pointers to SoC-specific implementations of
  63  * common PRM functions
  64  */
  65 static struct prm_ll_data null_prm_ll_data;
  66 static struct prm_ll_data *prm_ll_data = &null_prm_ll_data;
  67
  68 /* Private functions */
  69
  70 /*
  71  * Move priority events from events to priority_events array
  72  */
  73 static void omap_prcm_events_filter_priority(unsigned long *events,
  74         unsigned long *priority_events)
  75 {
  76         int i;
  77
  78         for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
  79                 priority_events[i] =
  80                         events[i] & prcm_irq_setup->priority_mask[i];
  81                 events[i] ^= priority_events[i];
  82         }
  83 }
  84
  85 /*
  86  * PRCM Interrupt Handler
  87  *
  88  * This is a common handler for the OMAP PRCM interrupts. Pending
  89  * interrupts are detected by a call to prcm_pending_events and
  90  * dispatched accordingly. Clearing of the wakeup events should be
  91  * done by the SoC specific individual handlers.
  92  */
  93 static void omap_prcm_irq_handler(unsigned int irq, struct irq_desc *desc)
  94 {
  95         unsigned long pending[OMAP_PRCM_MAX_NR_PENDING_REG];
  96         unsigned long priority_pending[OMAP_PRCM_MAX_NR_PENDING_REG];
  97         struct irq_chip *chip = irq_desc_get_chip(desc);
  98         unsigned int virtirq;
  99         int nr_irq = prcm_irq_setup->nr_regs * 32;
 100
 101         /*
 102          * If we are suspended, mask all interrupts from PRCM level,
 103          * this does not ack them, and they will be pending until we
 104          * re-enable the interrupts, at which point the
 105          * omap_prcm_irq_handler will be executed again.  The
 106          * _save_and_clear_irqen() function must ensure that the PRM
 107          * write to disable all IRQs has reached the PRM before
 108          * returning, or spurious PRCM interrupts may occur during
 109          * suspend.
 110          */
 111         if (prcm_irq_setup->suspended) {
 112                 prcm_irq_setup->save_and_clear_irqen(prcm_irq_setup->saved_mask);
 113                 prcm_irq_setup->suspend_save_flag = true;
 114         }
 115
 116         /*
 117          * Loop until all pending irqs are handled, since
 118          * generic_handle_irq() can cause new irqs to come
 119          */
 120         while (!prcm_irq_setup->suspended) {
 121                 prcm_irq_setup->read_pending_irqs(pending);
 122
 123                 /* No bit set, then all IRQs are handled */
 124                 if (find_first_bit(pending, nr_irq) >= nr_irq)
 125                         break;
 126
 127                 omap_prcm_events_filter_priority(pending, priority_pending);
 128
 129                 /*
 130                  * Loop on all currently pending irqs so that new irqs
 131                  * cannot starve previously pending irqs
 132                  */
 133
 134                 /* Serve priority events first */
 135                 for_each_set_bit(virtirq, priority_pending, nr_irq)
 136                         generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
 137
 138                 /* Serve normal events next */
 139                 for_each_set_bit(virtirq, pending, nr_irq)
 140                         generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
 141         }
 142         if (chip->irq_ack)
 143                 chip->irq_ack(&desc->irq_data);
 144         if (chip->irq_eoi)
 145                 chip->irq_eoi(&desc->irq_data);
 146         chip->irq_unmask(&desc->irq_data);
 147
 148         prcm_irq_setup->ocp_barrier(); /* avoid spurious IRQs */
 149 }
 150
 151 /* Public functions */
 152
 153 /**
 154  * omap_prcm_event_to_irq - given a PRCM event name, returns the
 155  * corresponding IRQ on which the handler should be registered
 156  * @name: name of the PRCM interrupt bit to look up - see struct omap_prcm_irq
 157  *
 158  * Returns the Linux internal IRQ ID corresponding to @name upon success,
 159  * or -ENOENT upon failure.
 160  */
 161 int omap_prcm_event_to_irq(const char *name)
 162 {
 163         int i;
 164
 165         if (!prcm_irq_setup || !name)
 166                 return -ENOENT;
 167
 168         for (i = 0; i < prcm_irq_setup->nr_irqs; i++)
 169                 if (!strcmp(prcm_irq_setup->irqs[i].name, name))
 170                         return prcm_irq_setup->base_irq +
 171                                 prcm_irq_setup->irqs[i].offset;
 172
 173         return -ENOENT;
 174 }
 175
 176 /**
 177  * omap_prcm_irq_cleanup - reverses memory allocated and other steps
 178  * done by omap_prcm_register_chain_handler()
 179  *
 180  * No return value.
 181  */
 182 void omap_prcm_irq_cleanup(void)
 183 {
 184         int i;
 185
 186         if (!prcm_irq_setup) {
 187                 pr_err("PRCM: IRQ handler not initialized; cannot cleanup\n");
 188                 return;
 189         }
 190
 191         if (prcm_irq_chips) {
 192                 for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
 193                         if (prcm_irq_chips[i])
 194                                 irq_remove_generic_chip(prcm_irq_chips[i],
 195                                         0xffffffff, 0, 0);
 196                         prcm_irq_chips[i] = NULL;
 197                 }
 198                 kfree(prcm_irq_chips);
 199                 prcm_irq_chips = NULL;
 200         }
 201
 202         kfree(prcm_irq_setup->saved_mask);
 203         prcm_irq_setup->saved_mask = NULL;
 204
 205         kfree(prcm_irq_setup->priority_mask);
 206         prcm_irq_setup->priority_mask = NULL;
 207
 208         irq_set_chained_handler(prcm_irq_setup->irq, NULL);
 209
 210         if (prcm_irq_setup->base_irq > 0)
 211                 irq_free_descs(prcm_irq_setup->base_irq,
 212                         prcm_irq_setup->nr_regs * 32);
 213         prcm_irq_setup->base_irq = 0;
 214 }
 215
 216 void omap_prcm_irq_prepare(void)
 217 {
 218         prcm_irq_setup->suspended = true;
 219 }
 220
 221 void omap_prcm_irq_complete(void)
 222 {
 223         prcm_irq_setup->suspended = false;
 224
 225         /* If we have not saved the masks, do not attempt to restore */
 226         if (!prcm_irq_setup->suspend_save_flag)
 227                 return;
 228
 229         prcm_irq_setup->suspend_save_flag = false;
 230
 231         /*
 232          * Re-enable all masked PRCM irq sources, this causes the PRCM
 233          * interrupt to fire immediately if the events were masked
 234          * previously in the chain handler
 235          */
 236         prcm_irq_setup->restore_irqen(prcm_irq_setup->saved_mask);
 237 }
 238
 239 /**
 240  * omap_prcm_register_chain_handler - initializes the prcm chained interrupt
 241  * handler based on provided parameters
 242  * @irq_setup: hardware data about the underlying PRM/PRCM
 243  *
 244  * Set up the PRCM chained interrupt handler on the PRCM IRQ.  Sets up
 245  * one generic IRQ chip per PRM interrupt status/enable register pair.
 246  * Returns 0 upon success, -EINVAL if called twice or if invalid
 247  * arguments are passed, or -ENOMEM on any other error.
 248  */
 249 int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
 250 {
 251         int nr_regs;
 252         u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG];
 253         int offset, i;
 254         struct irq_chip_generic *gc;
 255         struct irq_chip_type *ct;
 256
 257         if (!irq_setup)
 258                 return -EINVAL;
 259
 260         nr_regs = irq_setup->nr_regs;
 261
 262         if (prcm_irq_setup) {
 263                 pr_err("PRCM: already initialized; won't reinitialize\n");
 264                 return -EINVAL;
 265         }
 266
 267         if (nr_regs > OMAP_PRCM_MAX_NR_PENDING_REG) {
 268                 pr_err("PRCM: nr_regs too large\n");
 269                 return -EINVAL;
 270         }
 271
 272         prcm_irq_setup = irq_setup;
 273
 274         prcm_irq_chips = kzalloc(sizeof(void *) * nr_regs, GFP_KERNEL);
 275         prcm_irq_setup->saved_mask = kzalloc(sizeof(u32) * nr_regs, GFP_KERNEL);
 276         prcm_irq_setup->priority_mask = kzalloc(sizeof(u32) * nr_regs,
 277                 GFP_KERNEL);
 278
 279         if (!prcm_irq_chips || !prcm_irq_setup->saved_mask ||
 280             !prcm_irq_setup->priority_mask) {
 281                 pr_err("PRCM: kzalloc failed\n");
 282                 goto err;
 283         }
 284
 285         memset(mask, 0, sizeof(mask));
 286
 287         for (i = 0; i < irq_setup->nr_irqs; i++) {
 288                 offset = irq_setup->irqs[i].offset;
 289                 mask[offset >> 5] |= 1 << (offset & 0x1f);
 290                 if (irq_setup->irqs[i].priority)
 291                         irq_setup->priority_mask[offset >> 5] |=
 292                                 1 << (offset & 0x1f);
 293         }
 294
 295         irq_set_chained_handler(irq_setup->irq, omap_prcm_irq_handler);
 296
 297         irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32,
 298                 0);
 299
 300         if (irq_setup->base_irq < 0) {
 301                 pr_err("PRCM: failed to allocate irq descs: %d\n",
 302                         irq_setup->base_irq);
 303                 goto err;
 304         }
 305
 306         for (i = 0; i < irq_setup->nr_regs; i++) {
 307                 gc = irq_alloc_generic_chip("PRCM", 1,
 308                         irq_setup->base_irq + i * 32, prm_base,
 309                         handle_level_irq);
 310
 311                 if (!gc) {
 312                         pr_err("PRCM: failed to allocate generic chip\n");
 313                         goto err;
 314                 }
 315                 ct = gc->chip_types;
 316                 ct->chip.irq_ack = irq_gc_ack_set_bit;
 317                 ct->chip.irq_mask = irq_gc_mask_clr_bit;
 318                 ct->chip.irq_unmask = irq_gc_mask_set_bit;
 319
 320                 ct->regs.ack = irq_setup->ack + i * 4;
 321                 ct->regs.mask = irq_setup->mask + i * 4;
 322
 323                 irq_setup_generic_chip(gc, mask[i], 0, IRQ_NOREQUEST, 0);
 324                 prcm_irq_chips[i] = gc;
 325         }
 326
 327         return 0;
 328
 329 err:
 330         omap_prcm_irq_cleanup();
 331         return -ENOMEM;
 332 }
 333
 334 /**
 335  * omap2_set_globals_prm - set the PRM base address (for early use)
 336  * @prm: PRM base virtual address
 337  *
 338  * XXX Will be replaced when the PRM/CM drivers are completed.
 339  */
 340 void __init omap2_set_globals_prm(void __iomem *prm)
 341 {
 342         prm_base = prm;
 343 }
 344
 345 /**
 346  * prm_read_reset_sources - return the sources of the SoC's last reset
 347  *
 348  * Return a u32 bitmask representing the reset sources that caused the
 349  * SoC to reset.  The low-level per-SoC functions called by this
 350  * function remap the SoC-specific reset source bits into an
 351  * OMAP-common set of reset source bits, defined in
 352  * arch/arm/mach-omap2/prm.h.  Returns the standardized reset source
 353  * u32 bitmask from the hardware upon success, or returns (1 <<
 354  * OMAP_UNKNOWN_RST_SRC_ID_SHIFT) if no low-level read_reset_sources()
 355  * function was registered.
 356  */
 357 u32 prm_read_reset_sources(void)
 358 {
 359         u32 ret = 1 << OMAP_UNKNOWN_RST_SRC_ID_SHIFT;
 360
 361         if (prm_ll_data->read_reset_sources)
 362                 ret = prm_ll_data->read_reset_sources();
 363         else
 364                 WARN_ONCE(1, "prm: %s: no mapping function defined for reset sources\n", __func__);
 365
 366         return ret;
 367 }
 368
 369 /**
 370  * prm_was_any_context_lost_old - was device context lost? (old API)
 371  * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
 372  * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
 373  * @idx: CONTEXT register offset
 374  *
 375  * Return 1 if any bits were set in the *_CONTEXT_* register
 376  * identified by (@part, @inst, @idx), which means that some context
 377  * was lost for that module; otherwise, return 0.  XXX Deprecated;
 378  * callers need to use a less-SoC-dependent way to identify hardware
 379  * IP blocks.
 380  */
 381 bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx)
 382 {
 383         bool ret = true;
 384
 385         if (prm_ll_data->was_any_context_lost_old)
 386                 ret = prm_ll_data->was_any_context_lost_old(part, inst, idx);
 387         else
 388                 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
 389                           __func__);
 390
 391         return ret;
 392 }
 393
 394 /**
 395  * prm_clear_context_lost_flags_old - clear context loss flags (old API)
 396  * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION)
 397  * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST)
 398  * @idx: CONTEXT register offset
 399  *
 400  * Clear hardware context loss bits for the module identified by
 401  * (@part, @inst, @idx).  No return value.  XXX Deprecated; callers
 402  * need to use a less-SoC-dependent way to identify hardware IP
 403  * blocks.
 404  */
 405 void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx)
 406 {
 407         if (prm_ll_data->clear_context_loss_flags_old)
 408                 prm_ll_data->clear_context_loss_flags_old(part, inst, idx);
 409         else
 410                 WARN_ONCE(1, "prm: %s: no mapping function defined\n",
 411                           __func__);
 412 }
 413
 414 /**
 415  * prm_register - register per-SoC low-level data with the PRM
 416  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
 417  *
 418  * Register per-SoC low-level OMAP PRM data and function pointers with
 419  * the OMAP PRM common interface.  The caller must keep the data
 420  * pointed to by @pld valid until it calls prm_unregister() and
 421  * it returns successfully.  Returns 0 upon success, -EINVAL if @pld
 422  * is NULL, or -EEXIST if prm_register() has already been called
 423  * without an intervening prm_unregister().
 424  */
 425 int prm_register(struct prm_ll_data *pld)
 426 {
 427         if (!pld)
 428                 return -EINVAL;
 429
 430         if (prm_ll_data != &null_prm_ll_data)
 431                 return -EEXIST;
 432
 433         prm_ll_data = pld;
 434
 435         return 0;
 436 }
 437
 438 /**
 439  * prm_unregister - unregister per-SoC low-level data & function pointers
 440  * @pld: low-level per-SoC OMAP PRM data & function pointers to unregister
 441  *
 442  * Unregister per-SoC low-level OMAP PRM data and function pointers
 443  * that were previously registered with prm_register().  The
 444  * caller may not destroy any of the data pointed to by @pld until
 445  * this function returns successfully.  Returns 0 upon success, or
 446  * -EINVAL if @pld is NULL or if @pld does not match the struct
 447  * prm_ll_data * previously registered by prm_register().
 448  */
 449 int prm_unregister(struct prm_ll_data *pld)
 450 {
 451         if (!pld || prm_ll_data != pld)
 452                 return -EINVAL;
 453
 454         prm_ll_data = &null_prm_ll_data;
 455
 456         return 0;
 457 }