arch/arm/mach-omap2/timer-gp.c

   1 /*
   2  * linux/arch/arm/mach-omap2/timer-gp.c
   3  *
   4  * OMAP2 GP timer support.
   5  *
   6  * Copyright (C) 2009 Nokia Corporation
   7  *
   8  * Update to use new clocksource/clockevent layers
   9  * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
  10  * Copyright (C) 2007 MontaVista Software, Inc.
  11  *
  12  * Original driver:
  13  * Copyright (C) 2005 Nokia Corporation
  14  * Author: Paul Mundt <paul.mundt@nokia.com>
  15  *         Juha Yrjölä <juha.yrjola@nokia.com>
  16  * OMAP Dual-mode timer framework support by Timo Teras
  17  *
  18  * Some parts based off of TI's 24xx code:
  19  *
  20  * Copyright (C) 2004-2009 Texas Instruments, Inc.
  21  *
  22  * Roughly modelled after the OMAP1 MPU timer code.
  23  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  24  *
  25  * This file is subject to the terms and conditions of the GNU General Public
  26  * License. See the file "COPYING" in the main directory of this archive
  27  * for more details.
  28  */
  29 #include <linux/init.h>
  30 #include <linux/time.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/err.h>
  33 #include <linux/clk.h>
  34 #include <linux/delay.h>
  35 #include <linux/irq.h>
  36 #include <linux/clocksource.h>
  37 #include <linux/clockchips.h>
  38
  39 #include <asm/mach/time.h>
  40 #include <plat/dmtimer.h>
  41 #include <asm/localtimer.h>
  42
  43 #include "timer-gp.h"
  44
  45 #include <plat/common.h>
  46
  47 /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
  48 #define MAX_GPTIMER_ID          12
  49
  50 static struct omap_dm_timer *gptimer;
  51 static struct clock_event_device clockevent_gpt;
  52 static u8 __initdata gptimer_id = 1;
  53 static u8 __initdata inited;
  54 struct omap_dm_timer *gptimer_wakeup;
  55
  56 static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
  57 {
  58         struct omap_dm_timer *gpt = (struct omap_dm_timer *)dev_id;
  59         struct clock_event_device *evt = &clockevent_gpt;
  60
  61         omap_dm_timer_write_status(gpt, OMAP_TIMER_INT_OVERFLOW);
  62
  63         evt->event_handler(evt);
  64         return IRQ_HANDLED;
  65 }
  66
  67 static struct irqaction omap2_gp_timer_irq = {
  68         .name           = "gp timer",
  69         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  70         .handler        = omap2_gp_timer_interrupt,
  71 };
  72
  73 static int omap2_gp_timer_set_next_event(unsigned long cycles,
  74                                          struct clock_event_device *evt)
  75 {
  76         omap_dm_timer_set_load_start(gptimer, 0, 0xffffffff - cycles);
  77
  78         return 0;
  79 }
  80
  81 static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
  82                                     struct clock_event_device *evt)
  83 {
  84         u32 period;
  85
  86         omap_dm_timer_stop(gptimer);
  87
  88         switch (mode) {
  89         case CLOCK_EVT_MODE_PERIODIC:
  90                 period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
  91                 period -= 1;
  92                 omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
  93                 break;
  94         case CLOCK_EVT_MODE_ONESHOT:
  95                 break;
  96         case CLOCK_EVT_MODE_UNUSED:
  97         case CLOCK_EVT_MODE_SHUTDOWN:
  98         case CLOCK_EVT_MODE_RESUME:
  99                 break;
 100         }
 101 }
 102
 103 static struct clock_event_device clockevent_gpt = {
 104         .name           = "gp timer",
 105         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 106         .shift          = 32,
 107         .set_next_event = omap2_gp_timer_set_next_event,
 108         .set_mode       = omap2_gp_timer_set_mode,
 109 };
 110
 111 /**
 112  * omap2_gp_clockevent_set_gptimer - set which GPTIMER is used for clockevents
 113  * @id: GPTIMER to use (1..MAX_GPTIMER_ID)
 114  *
 115  * Define the GPTIMER that the system should use for the tick timer.
 116  * Meant to be called from board-*.c files in the event that GPTIMER1, the
 117  * default, is unsuitable.  Returns -EINVAL on error or 0 on success.
 118  */
 119 int __init omap2_gp_clockevent_set_gptimer(u8 id)
 120 {
 121         if (id < 1 || id > MAX_GPTIMER_ID)
 122                 return -EINVAL;
 123
 124         BUG_ON(inited);
 125
 126         gptimer_id = id;
 127
 128         return 0;
 129 }
 130
 131 static void __init omap2_gp_clockevent_init(void)
 132 {
 133         u32 tick_rate;
 134         int src;
 135
 136         inited = 1;
 137
 138         gptimer = omap_dm_timer_request_specific(gptimer_id);
 139         BUG_ON(gptimer == NULL);
 140         gptimer_wakeup = gptimer;
 141
 142 #if defined(CONFIG_OMAP_32K_TIMER)
 143         src = OMAP_TIMER_SRC_32_KHZ;
 144 #else
 145         src = OMAP_TIMER_SRC_SYS_CLK;
 146         WARN(gptimer_id == 12, "WARNING: GPTIMER12 can only use the "
 147              "secure 32KiHz clock source\n");
 148 #endif
 149
 150         if (gptimer_id != 12)
 151                 WARN(IS_ERR_VALUE(omap_dm_timer_set_source(gptimer, src)),
 152                      "timer-gp: omap_dm_timer_set_source() failed\n");
 153
 154         tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer));
 155
 156         pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n",
 157                 gptimer_id, tick_rate);
 158
 159         omap2_gp_timer_irq.dev_id = (void *)gptimer;
 160         setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
 161         omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
 162
 163         clockevent_gpt.mult = div_sc(tick_rate, NSEC_PER_SEC,
 164                                      clockevent_gpt.shift);
 165         clockevent_gpt.max_delta_ns =
 166                 clockevent_delta2ns(0xffffffff, &clockevent_gpt);
 167         clockevent_gpt.min_delta_ns =
 168                 clockevent_delta2ns(3, &clockevent_gpt);
 169                 /* Timer internal resynch latency. */
 170
 171         clockevent_gpt.cpumask = cpumask_of(0);
 172         clockevents_register_device(&clockevent_gpt);
 173 }
 174
 175 /* Clocksource code */
 176
 177 #ifdef CONFIG_OMAP_32K_TIMER
 178 /*
 179  * When 32k-timer is enabled, don't use GPTimer for clocksource
 180  * instead, just leave default clocksource which uses the 32k
 181  * sync counter.  See clocksource setup in plat-omap/counter_32k.c
 182  */
 183
 184 static void __init omap2_gp_clocksource_init(void)
 185 {
 186         omap_init_clocksource_32k();
 187 }
 188
 189 #else
 190 /*
 191  * clocksource
 192  */
 193 static struct omap_dm_timer *gpt_clocksource;
 194 static cycle_t clocksource_read_cycles(struct clocksource *cs)
 195 {
 196         return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource);
 197 }
 198
 199 static struct clocksource clocksource_gpt = {
 200         .name           = "gp timer",
 201         .rating         = 300,
 202         .read           = clocksource_read_cycles,
 203         .mask           = CLOCKSOURCE_MASK(32),
 204         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 205 };
 206
 207 /* Setup free-running counter for clocksource */
 208 static void __init omap2_gp_clocksource_init(void)
 209 {
 210         static struct omap_dm_timer *gpt;
 211         u32 tick_rate;
 212         static char err1[] __initdata = KERN_ERR
 213                 "%s: failed to request dm-timer\n";
 214         static char err2[] __initdata = KERN_ERR
 215                 "%s: can't register clocksource!\n";
 216
 217         gpt = omap_dm_timer_request();
 218         if (!gpt)
 219                 printk(err1, clocksource_gpt.name);
 220         gpt_clocksource = gpt;
 221
 222         omap_dm_timer_set_source(gpt, OMAP_TIMER_SRC_SYS_CLK);
 223         tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt));
 224
 225         omap_dm_timer_set_load_start(gpt, 1, 0);
 226
 227         if (clocksource_register_hz(&clocksource_gpt, tick_rate))
 228                 printk(err2, clocksource_gpt.name);
 229 }
 230 #endif
 231
 232 static void __init omap2_gp_timer_init(void)
 233 {
 234 #ifdef CONFIG_LOCAL_TIMERS
 235         if (cpu_is_omap44xx()) {
 236                 twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
 237                 BUG_ON(!twd_base);
 238         }
 239 #endif
 240         omap_dm_timer_init();
 241
 242         omap2_gp_clockevent_init();
 243         omap2_gp_clocksource_init();
 244 }
 245
 246 struct sys_timer omap_timer = {
 247         .init   = omap2_gp_timer_init,
 248 };