arch/arm/mach-omap2/wd_timer.c

   1 /*
   2  * OMAP2+ MPU WD_TIMER-specific code
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #include <linux/kernel.h>
  11 #include <linux/io.h>
  12 #include <linux/err.h>
  13
  14 #include <plat/omap_hwmod.h>
  15
  16 /*
  17  * In order to avoid any assumptions from bootloader regarding WDT
  18  * settings, WDT module is reset during init. This enables the watchdog
  19  * timer. Hence it is required to disable the watchdog after the WDT reset
  20  * during init. Otherwise the system would reboot as per the default
  21  * watchdog timer registers settings.
  22  */
  23 #define OMAP_WDT_WPS            0x34
  24 #define OMAP_WDT_SPR            0x48
  25
  26
  27 int omap2_wd_timer_disable(struct omap_hwmod *oh)
  28 {
  29         void __iomem *base;
  30         int ret;
  31
  32         if (!oh) {
  33                 pr_err("%s: Could not look up wdtimer_hwmod\n", __func__);
  34                 return -EINVAL;
  35         }
  36
  37         base = omap_hwmod_get_mpu_rt_va(oh);
  38         if (!base) {
  39                 pr_err("%s: Could not get the base address for %s\n",
  40                                 oh->name, __func__);
  41                 return -EINVAL;
  42         }
  43
  44         /* Enable the clocks before accessing the WDT registers */
  45         ret = omap_hwmod_enable(oh);
  46         if (ret) {
  47                 pr_err("%s: Could not enable clocks for %s\n",
  48                                 oh->name, __func__);
  49                 return ret;
  50         }
  51
  52         /* sequence required to disable watchdog */
  53         __raw_writel(0xAAAA, base + OMAP_WDT_SPR);
  54         while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)
  55                 cpu_relax();
  56
  57         __raw_writel(0x5555, base + OMAP_WDT_SPR);
  58         while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)
  59                 cpu_relax();
  60
  61         ret = omap_hwmod_idle(oh);
  62         if (ret)
  63                 pr_err("%s: Could not disable clocks for %s\n",
  64                                 oh->name, __func__);
  65
  66         return ret;
  67 }
  68