arch/arm/mach-prima2/rstc.c

   1 /*
   2  * reset controller for CSR SiRFprimaII
   3  *
   4  * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
   5  *
   6  * Licensed under GPLv2 or later.
   7  */
   8
   9 #include <linux/kernel.h>
  10 #include <linux/mutex.h>
  11 #include <linux/io.h>
  12 #include <linux/delay.h>
  13 #include <linux/device.h>
  14 #include <linux/of.h>
  15 #include <linux/of_address.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/reboot.h>
  18 #include <linux/reset-controller.h>
  19
  20 #include <asm/system_misc.h>
  21
  22 #define SIRFSOC_RSTBIT_NUM      64
  23
  24 static void __iomem *sirfsoc_rstc_base;
  25 static DEFINE_MUTEX(rstc_lock);
  26
  27 static int sirfsoc_reset_module(struct reset_controller_dev *rcdev,
  28                                         unsigned long sw_reset_idx)
  29 {
  30         u32 reset_bit = sw_reset_idx;
  31
  32         if (reset_bit >= SIRFSOC_RSTBIT_NUM)
  33                 return -EINVAL;
  34
  35         mutex_lock(&rstc_lock);
  36
  37         if (of_device_is_compatible(rcdev->of_node, "sirf,prima2-rstc")) {
  38                 /*
  39                  * Writing 1 to this bit resets corresponding block.
  40                  * Writing 0 to this bit de-asserts reset signal of the
  41                  * corresponding block. datasheet doesn't require explicit
  42                  * delay between the set and clear of reset bit. it could
  43                  * be shorter if tests pass.
  44                  */
  45                 writel(readl(sirfsoc_rstc_base +
  46                         (reset_bit / 32) * 4) | (1 << reset_bit),
  47                         sirfsoc_rstc_base + (reset_bit / 32) * 4);
  48                 msleep(20);
  49                 writel(readl(sirfsoc_rstc_base +
  50                         (reset_bit / 32) * 4) & ~(1 << reset_bit),
  51                         sirfsoc_rstc_base + (reset_bit / 32) * 4);
  52         } else {
  53                 /*
  54                  * For MARCO and POLO
  55                  * Writing 1 to SET register resets corresponding block.
  56                  * Writing 1 to CLEAR register de-asserts reset signal of the
  57                  * corresponding block.
  58                  * datasheet doesn't require explicit delay between the set and
  59                  * clear of reset bit. it could be shorter if tests pass.
  60                  */
  61                 writel(1 << reset_bit,
  62                         sirfsoc_rstc_base + (reset_bit / 32) * 8);
  63                 msleep(20);
  64                 writel(1 << reset_bit,
  65                         sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4);
  66         }
  67
  68         mutex_unlock(&rstc_lock);
  69
  70         return 0;
  71 }
  72
  73 static struct reset_control_ops sirfsoc_rstc_ops = {
  74         .reset = sirfsoc_reset_module,
  75 };
  76
  77 static struct reset_controller_dev sirfsoc_reset_controller = {
  78         .ops = &sirfsoc_rstc_ops,
  79         .nr_resets = SIRFSOC_RSTBIT_NUM,
  80 };
  81
  82 #define SIRFSOC_SYS_RST_BIT  BIT(31)
  83
  84 static void sirfsoc_restart(enum reboot_mode mode, const char *cmd)
  85 {
  86         writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
  87 }
  88
  89 static int sirfsoc_rstc_probe(struct platform_device *pdev)
  90 {
  91         struct device_node *np = pdev->dev.of_node;
  92         sirfsoc_rstc_base = of_iomap(np, 0);
  93         if (!sirfsoc_rstc_base) {
  94                 dev_err(&pdev->dev, "unable to map rstc cpu registers\n");
  95                 return -ENOMEM;
  96         }
  97
  98         sirfsoc_reset_controller.of_node = np;
  99         arm_pm_restart = sirfsoc_restart;
 100
 101         if (IS_ENABLED(CONFIG_RESET_CONTROLLER))
 102                 reset_controller_register(&sirfsoc_reset_controller);
 103
 104         return 0;
 105 }
 106
 107 static const struct of_device_id rstc_ids[]  = {
 108         { .compatible = "sirf,prima2-rstc" },
 109         { .compatible = "sirf,marco-rstc" },
 110         {},
 111 };
 112
 113 static struct platform_driver sirfsoc_rstc_driver = {
 114         .probe          = sirfsoc_rstc_probe,
 115         .driver         = {
 116                 .name   = "sirfsoc_rstc",
 117                 .owner  = THIS_MODULE,
 118                 .of_match_table = rstc_ids,
 119         },
 120 };
 121
 122 static int __init sirfsoc_rstc_init(void)
 123 {
 124         return platform_driver_register(&sirfsoc_rstc_driver);
 125 }
 126 subsys_initcall(sirfsoc_rstc_init);