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[ARM] pxa: mainstone: update backlight to use the backlight infrastructure
[deliverable/linux.git] / arch / arm / mach-pxa / mainstone.c
1 /*
2 * linux/arch/arm/mach-pxa/mainstone.c
3 *
4 * Support for the Intel HCDDBBVA0 Development Platform.
5 * (go figure how they came up with such name...)
6 *
7 * Author: Nicolas Pitre
8 * Created: Nov 05, 2002
9 * Copyright: MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/sysdev.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
22 #include <linux/fb.h>
23 #include <linux/ioport.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/backlight.h>
27
28 #include <asm/types.h>
29 #include <asm/setup.h>
30 #include <asm/memory.h>
31 #include <asm/mach-types.h>
32 #include <asm/hardware.h>
33 #include <asm/irq.h>
34 #include <asm/sizes.h>
35
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39 #include <asm/mach/flash.h>
40
41 #include <asm/arch/pxa-regs.h>
42 #include <asm/arch/mainstone.h>
43 #include <asm/arch/audio.h>
44 #include <asm/arch/pxafb.h>
45 #include <asm/arch/mmc.h>
46 #include <asm/arch/irda.h>
47 #include <asm/arch/ohci.h>
48
49 #include "generic.h"
50 #include "devices.h"
51
52
53 static unsigned long mainstone_irq_enabled;
54
55 static void mainstone_mask_irq(unsigned int irq)
56 {
57 int mainstone_irq = (irq - MAINSTONE_IRQ(0));
58 MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
59 }
60
61 static void mainstone_unmask_irq(unsigned int irq)
62 {
63 int mainstone_irq = (irq - MAINSTONE_IRQ(0));
64 /* the irq can be acknowledged only if deasserted, so it's done here */
65 MST_INTSETCLR &= ~(1 << mainstone_irq);
66 MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
67 }
68
69 static struct irq_chip mainstone_irq_chip = {
70 .name = "FPGA",
71 .ack = mainstone_mask_irq,
72 .mask = mainstone_mask_irq,
73 .unmask = mainstone_unmask_irq,
74 };
75
76 static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
77 {
78 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
79 do {
80 GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
81 if (likely(pending)) {
82 irq = MAINSTONE_IRQ(0) + __ffs(pending);
83 desc = irq_desc + irq;
84 desc_handle_irq(irq, desc);
85 }
86 pending = MST_INTSETCLR & mainstone_irq_enabled;
87 } while (pending);
88 }
89
90 static void __init mainstone_init_irq(void)
91 {
92 int irq;
93
94 pxa27x_init_irq();
95
96 /* setup extra Mainstone irqs */
97 for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
98 set_irq_chip(irq, &mainstone_irq_chip);
99 set_irq_handler(irq, handle_level_irq);
100 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
101 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
102 else
103 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
104 }
105 set_irq_flags(MAINSTONE_IRQ(8), 0);
106 set_irq_flags(MAINSTONE_IRQ(12), 0);
107
108 MST_INTMSKENA = 0;
109 MST_INTSETCLR = 0;
110
111 set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
112 set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
113 }
114
115 #ifdef CONFIG_PM
116
117 static int mainstone_irq_resume(struct sys_device *dev)
118 {
119 MST_INTMSKENA = mainstone_irq_enabled;
120 return 0;
121 }
122
123 static struct sysdev_class mainstone_irq_sysclass = {
124 .name = "cpld_irq",
125 .resume = mainstone_irq_resume,
126 };
127
128 static struct sys_device mainstone_irq_device = {
129 .cls = &mainstone_irq_sysclass,
130 };
131
132 static int __init mainstone_irq_device_init(void)
133 {
134 int ret = sysdev_class_register(&mainstone_irq_sysclass);
135 if (ret == 0)
136 ret = sysdev_register(&mainstone_irq_device);
137 return ret;
138 }
139
140 device_initcall(mainstone_irq_device_init);
141
142 #endif
143
144
145 static struct resource smc91x_resources[] = {
146 [0] = {
147 .start = (MST_ETH_PHYS + 0x300),
148 .end = (MST_ETH_PHYS + 0xfffff),
149 .flags = IORESOURCE_MEM,
150 },
151 [1] = {
152 .start = MAINSTONE_IRQ(3),
153 .end = MAINSTONE_IRQ(3),
154 .flags = IORESOURCE_IRQ,
155 }
156 };
157
158 static struct platform_device smc91x_device = {
159 .name = "smc91x",
160 .id = 0,
161 .num_resources = ARRAY_SIZE(smc91x_resources),
162 .resource = smc91x_resources,
163 };
164
165 static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
166 {
167 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
168 MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
169 return 0;
170 }
171
172 static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
173 {
174 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
175 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
176 }
177
178 static long mst_audio_suspend_mask;
179
180 static void mst_audio_suspend(void *priv)
181 {
182 mst_audio_suspend_mask = MST_MSCWR2;
183 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
184 }
185
186 static void mst_audio_resume(void *priv)
187 {
188 MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
189 }
190
191 static pxa2xx_audio_ops_t mst_audio_ops = {
192 .startup = mst_audio_startup,
193 .shutdown = mst_audio_shutdown,
194 .suspend = mst_audio_suspend,
195 .resume = mst_audio_resume,
196 };
197
198 static struct platform_device mst_audio_device = {
199 .name = "pxa2xx-ac97",
200 .id = -1,
201 .dev = { .platform_data = &mst_audio_ops },
202 };
203
204 static struct resource flash_resources[] = {
205 [0] = {
206 .start = PXA_CS0_PHYS,
207 .end = PXA_CS0_PHYS + SZ_64M - 1,
208 .flags = IORESOURCE_MEM,
209 },
210 [1] = {
211 .start = PXA_CS1_PHYS,
212 .end = PXA_CS1_PHYS + SZ_64M - 1,
213 .flags = IORESOURCE_MEM,
214 },
215 };
216
217 static struct mtd_partition mainstoneflash0_partitions[] = {
218 {
219 .name = "Bootloader",
220 .size = 0x00040000,
221 .offset = 0,
222 .mask_flags = MTD_WRITEABLE /* force read-only */
223 },{
224 .name = "Kernel",
225 .size = 0x00400000,
226 .offset = 0x00040000,
227 },{
228 .name = "Filesystem",
229 .size = MTDPART_SIZ_FULL,
230 .offset = 0x00440000
231 }
232 };
233
234 static struct flash_platform_data mst_flash_data[2] = {
235 {
236 .map_name = "cfi_probe",
237 .parts = mainstoneflash0_partitions,
238 .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
239 }, {
240 .map_name = "cfi_probe",
241 .parts = NULL,
242 .nr_parts = 0,
243 }
244 };
245
246 static struct platform_device mst_flash_device[2] = {
247 {
248 .name = "pxa2xx-flash",
249 .id = 0,
250 .dev = {
251 .platform_data = &mst_flash_data[0],
252 },
253 .resource = &flash_resources[0],
254 .num_resources = 1,
255 },
256 {
257 .name = "pxa2xx-flash",
258 .id = 1,
259 .dev = {
260 .platform_data = &mst_flash_data[1],
261 },
262 .resource = &flash_resources[1],
263 .num_resources = 1,
264 },
265 };
266
267 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
268 static int mainstone_backlight_update_status(struct backlight_device *bl)
269 {
270 int brightness = bl->props.brightness;
271
272 if (bl->props.power != FB_BLANK_UNBLANK ||
273 bl->props.fb_blank != FB_BLANK_UNBLANK)
274 brightness = 0;
275
276 if (brightness != 0) {
277 pxa_gpio_mode(GPIO16_PWM0_MD);
278 pxa_set_cken(CKEN_PWM0, 1);
279 }
280 PWM_CTRL0 = 0;
281 PWM_PWDUTY0 = brightness;
282 PWM_PERVAL0 = bl->props.max_brightness;
283 if (brightness == 0)
284 pxa_set_cken(CKEN_PWM0, 0);
285 return 0; /* pointless return value */
286 }
287
288 static int mainstone_backlight_get_brightness(struct backlight_device *bl)
289 {
290 return PWM_PWDUTY0;
291 }
292
293 static /*const*/ struct backlight_ops mainstone_backlight_ops = {
294 .update_status = mainstone_backlight_update_status,
295 .get_brightness = mainstone_backlight_get_brightness,
296 };
297
298 static void __init mainstone_backlight_register(void)
299 {
300 struct backlight_device *bl;
301
302 bl = backlight_device_register("mainstone-bl", &pxa_device_fb.dev,
303 NULL, &mainstone_backlight_ops);
304 if (IS_ERR(bl)) {
305 printk(KERN_ERR "mainstone: unable to register backlight: %ld\n",
306 PTR_ERR(bl));
307 return;
308 }
309
310 /*
311 * broken design - register-then-setup interfaces are
312 * utterly broken by definition.
313 */
314 bl->props.max_brightness = 1023;
315 bl->props.brightness = 1023;
316 backlight_update_status(bl);
317 }
318 #else
319 #define mainstone_backlight_register() do { } while (0)
320 #endif
321
322 static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
323 .pixclock = 50000,
324 .xres = 640,
325 .yres = 480,
326 .bpp = 16,
327 .hsync_len = 1,
328 .left_margin = 0x9f,
329 .right_margin = 1,
330 .vsync_len = 44,
331 .upper_margin = 0,
332 .lower_margin = 0,
333 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
334 };
335
336 static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
337 .pixclock = 110000,
338 .xres = 240,
339 .yres = 320,
340 .bpp = 16,
341 .hsync_len = 4,
342 .left_margin = 8,
343 .right_margin = 20,
344 .vsync_len = 3,
345 .upper_margin = 1,
346 .lower_margin = 10,
347 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
348 };
349
350 static struct pxafb_mach_info mainstone_pxafb_info = {
351 .num_modes = 1,
352 .lccr0 = LCCR0_Act,
353 .lccr3 = LCCR3_PCP,
354 };
355
356 static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
357 {
358 int err;
359
360 /*
361 * setup GPIO for PXA27x MMC controller
362 */
363 pxa_gpio_mode(GPIO32_MMCCLK_MD);
364 pxa_gpio_mode(GPIO112_MMCCMD_MD);
365 pxa_gpio_mode(GPIO92_MMCDAT0_MD);
366 pxa_gpio_mode(GPIO109_MMCDAT1_MD);
367 pxa_gpio_mode(GPIO110_MMCDAT2_MD);
368 pxa_gpio_mode(GPIO111_MMCDAT3_MD);
369
370 /* make sure SD/Memory Stick multiplexer's signals
371 * are routed to MMC controller
372 */
373 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
374
375 err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
376 "MMC card detect", data);
377 if (err) {
378 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
379 return -1;
380 }
381
382 return 0;
383 }
384
385 static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
386 {
387 struct pxamci_platform_data* p_d = dev->platform_data;
388
389 if (( 1 << vdd) & p_d->ocr_mask) {
390 printk(KERN_DEBUG "%s: on\n", __FUNCTION__);
391 MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
392 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
393 } else {
394 printk(KERN_DEBUG "%s: off\n", __FUNCTION__);
395 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
396 }
397 }
398
399 static void mainstone_mci_exit(struct device *dev, void *data)
400 {
401 free_irq(MAINSTONE_MMC_IRQ, data);
402 }
403
404 static struct pxamci_platform_data mainstone_mci_platform_data = {
405 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
406 .init = mainstone_mci_init,
407 .setpower = mainstone_mci_setpower,
408 .exit = mainstone_mci_exit,
409 };
410
411 static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
412 {
413 unsigned long flags;
414
415 local_irq_save(flags);
416 if (mode & IR_SIRMODE) {
417 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
418 } else if (mode & IR_FIRMODE) {
419 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
420 }
421 if (mode & IR_OFF) {
422 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
423 } else {
424 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
425 }
426 local_irq_restore(flags);
427 }
428
429 static struct pxaficp_platform_data mainstone_ficp_platform_data = {
430 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
431 .transceiver_mode = mainstone_irda_transceiver_mode,
432 };
433
434 static struct platform_device *platform_devices[] __initdata = {
435 &smc91x_device,
436 &mst_audio_device,
437 &mst_flash_device[0],
438 &mst_flash_device[1],
439 };
440
441 static int mainstone_ohci_init(struct device *dev)
442 {
443 /* setup Port1 GPIO pin. */
444 pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
445 pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
446
447 /* Set the Power Control Polarity Low and Power Sense
448 Polarity Low to active low. */
449 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
450 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
451
452 return 0;
453 }
454
455 static struct pxaohci_platform_data mainstone_ohci_platform_data = {
456 .port_mode = PMM_PERPORT_MODE,
457 .init = mainstone_ohci_init,
458 };
459
460 static void __init mainstone_init(void)
461 {
462 int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
463
464 mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
465 mst_flash_data[1].width = 4;
466
467 /* Compensate for SW7 which swaps the flash banks */
468 mst_flash_data[SW7].name = "processor-flash";
469 mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
470
471 printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
472 mst_flash_data[0].name);
473
474 /* system bus arbiter setting
475 * - Core_Park
476 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
477 */
478 ARB_CNTRL = ARB_CORE_PARK | 0x234;
479
480 /*
481 * On Mainstone, we route AC97_SYSCLK via GPIO45 to
482 * the audio daughter card
483 */
484 pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
485
486 GPSR(GPIO48_nPOE) =
487 GPIO_bit(GPIO48_nPOE) |
488 GPIO_bit(GPIO49_nPWE) |
489 GPIO_bit(GPIO50_nPIOR) |
490 GPIO_bit(GPIO51_nPIOW) |
491 GPIO_bit(GPIO85_nPCE_1) |
492 GPIO_bit(GPIO54_nPCE_2);
493
494 pxa_gpio_mode(GPIO48_nPOE_MD);
495 pxa_gpio_mode(GPIO49_nPWE_MD);
496 pxa_gpio_mode(GPIO50_nPIOR_MD);
497 pxa_gpio_mode(GPIO51_nPIOW_MD);
498 pxa_gpio_mode(GPIO85_nPCE_1_MD);
499 pxa_gpio_mode(GPIO54_nPCE_2_MD);
500 pxa_gpio_mode(GPIO79_pSKTSEL_MD);
501 pxa_gpio_mode(GPIO55_nPREG_MD);
502 pxa_gpio_mode(GPIO56_nPWAIT_MD);
503 pxa_gpio_mode(GPIO57_nIOIS16_MD);
504
505 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
506
507 /* reading Mainstone's "Virtual Configuration Register"
508 might be handy to select LCD type here */
509 if (0)
510 mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
511 else
512 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
513
514 set_pxa_fb_info(&mainstone_pxafb_info);
515 mainstone_backlight_register();
516
517 pxa_set_mci_info(&mainstone_mci_platform_data);
518 pxa_set_ficp_info(&mainstone_ficp_platform_data);
519 pxa_set_ohci_info(&mainstone_ohci_platform_data);
520 }
521
522
523 static struct map_desc mainstone_io_desc[] __initdata = {
524 { /* CPLD */
525 .virtual = MST_FPGA_VIRT,
526 .pfn = __phys_to_pfn(MST_FPGA_PHYS),
527 .length = 0x00100000,
528 .type = MT_DEVICE
529 }
530 };
531
532 static void __init mainstone_map_io(void)
533 {
534 pxa_map_io();
535 iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
536
537 /* initialize sleep mode regs (wake-up sources, etc) */
538 PGSR0 = 0x00008800;
539 PGSR1 = 0x00000002;
540 PGSR2 = 0x0001FC00;
541 PGSR3 = 0x00001F81;
542 PWER = 0xC0000002;
543 PRER = 0x00000002;
544 PFER = 0x00000002;
545 /* for use I SRAM as framebuffer. */
546 PSLR |= 0xF04;
547 PCFR = 0x66;
548 /* For Keypad wakeup. */
549 KPC &=~KPC_ASACT;
550 KPC |=KPC_AS;
551 PKWR = 0x000FD000;
552 /* Need read PKWR back after set it. */
553 PKWR;
554 }
555
556 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
557 /* Maintainer: MontaVista Software Inc. */
558 .phys_io = 0x40000000,
559 .boot_params = 0xa0000100, /* BLOB boot parameter setting */
560 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
561 .map_io = mainstone_map_io,
562 .init_irq = mainstone_init_irq,
563 .timer = &pxa_timer,
564 .init_machine = mainstone_init,
565 MACHINE_END
Linux kernel - Deliverables
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