arch/arm/mach-pxa/pxa27x.c

   1 /*
   2  *  linux/arch/arm/mach-pxa/pxa27x.c
   3  *
   4  *  Author:     Nicolas Pitre
   5  *  Created:    Nov 05, 2002
   6  *  Copyright:  MontaVista Software Inc.
   7  *
   8  * Code specific to PXA27x aka Bulverde.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14 #include <linux/config.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18 #include <linux/pm.h>
  19 #include <linux/platform_device.h>
  20
  21 #include <asm/hardware.h>
  22 #include <asm/irq.h>
  23 #include <asm/arch/pxa-regs.h>
  24 #include <asm/arch/ohci.h>
  25
  26 #include "generic.h"
  27
  28 /* Crystal clock: 13MHz */
  29 #define BASE_CLK        13000000
  30
  31 /*
  32  * Get the clock frequency as reflected by CCSR and the turbo flag.
  33  * We assume these values have been applied via a fcs.
  34  * If info is not 0 we also display the current settings.
  35  */
  36 unsigned int get_clk_frequency_khz( int info)
  37 {
  38         unsigned long ccsr, clkcfg;
  39         unsigned int l, L, m, M, n2, N, S;
  40         int cccr_a, t, ht, b;
  41
  42         ccsr = CCSR;
  43         cccr_a = CCCR & (1 << 25);
  44
  45         /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
  46         asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
  47         t  = clkcfg & (1 << 0);
  48         ht = clkcfg & (1 << 2);
  49         b  = clkcfg & (1 << 3);
  50
  51         l  = ccsr & 0x1f;
  52         n2 = (ccsr>>7) & 0xf;
  53         m  = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
  54
  55         L  = l * BASE_CLK;
  56         N  = (L * n2) / 2;
  57         M  = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
  58         S  = (b) ? L : (L/2);
  59
  60         if (info) {
  61                 printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
  62                         L / 1000000, (L % 1000000) / 10000, l );
  63                 printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
  64                         N / 1000000, (N % 1000000)/10000, n2 / 2, (n2 % 2)*5,
  65                         (t) ? "" : "in" );
  66                 printk( KERN_INFO "Memory clock: %d.%02dMHz (/%d)\n",
  67                         M / 1000000, (M % 1000000) / 10000, m );
  68                 printk( KERN_INFO "System bus clock: %d.%02dMHz \n",
  69                         S / 1000000, (S % 1000000) / 10000 );
  70         }
  71
  72         return (t) ? (N/1000) : (L/1000);
  73 }
  74
  75 /*
  76  * Return the current mem clock frequency in units of 10kHz as
  77  * reflected by CCCR[A], B, and L
  78  */
  79 unsigned int get_memclk_frequency_10khz(void)
  80 {
  81         unsigned long ccsr, clkcfg;
  82         unsigned int l, L, m, M;
  83         int cccr_a, b;
  84
  85         ccsr = CCSR;
  86         cccr_a = CCCR & (1 << 25);
  87
  88         /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
  89         asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
  90         b = clkcfg & (1 << 3);
  91
  92         l = ccsr & 0x1f;
  93         m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
  94
  95         L = l * BASE_CLK;
  96         M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
  97
  98         return (M / 10000);
  99 }
 100
 101 /*
 102  * Return the current LCD clock frequency in units of 10kHz as
 103  */
 104 unsigned int get_lcdclk_frequency_10khz(void)
 105 {
 106         unsigned long ccsr;
 107         unsigned int l, L, k, K;
 108
 109         ccsr = CCSR;
 110
 111         l = ccsr & 0x1f;
 112         k = (l <= 7) ? 1 : (l <= 16) ? 2 : 4;
 113
 114         L = l * BASE_CLK;
 115         K = L / k;
 116
 117         return (K / 10000);
 118 }
 119
 120 EXPORT_SYMBOL(get_clk_frequency_khz);
 121 EXPORT_SYMBOL(get_memclk_frequency_10khz);
 122 EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
 123
 124 #ifdef CONFIG_PM
 125
 126 int pxa_cpu_pm_prepare(suspend_state_t state)
 127 {
 128         switch (state) {
 129         case PM_SUSPEND_MEM:
 130         case PM_SUSPEND_STANDBY:
 131                 return 0;
 132         default:
 133                 return -EINVAL;
 134         }
 135 }
 136
 137 void pxa_cpu_pm_enter(suspend_state_t state)
 138 {
 139         extern void pxa_cpu_standby(void);
 140         extern void pxa_cpu_suspend(unsigned int);
 141         extern void pxa_cpu_resume(void);
 142
 143         if (state == PM_SUSPEND_STANDBY)
 144                 CKEN = CKEN22_MEMC | CKEN9_OSTIMER | CKEN16_LCD |CKEN0_PWM0;
 145         else
 146                 CKEN = CKEN22_MEMC | CKEN9_OSTIMER;
 147
 148         /* ensure voltage-change sequencer not initiated, which hangs */
 149         PCFR &= ~PCFR_FVC;
 150
 151         /* Clear edge-detect status register. */
 152         PEDR = 0xDF12FE1B;
 153
 154         switch (state) {
 155         case PM_SUSPEND_STANDBY:
 156                 pxa_cpu_standby();
 157                 break;
 158         case PM_SUSPEND_MEM:
 159                 /* set resume return address */
 160                 PSPR = virt_to_phys(pxa_cpu_resume);
 161                 pxa_cpu_suspend(PWRMODE_SLEEP);
 162                 break;
 163         }
 164 }
 165
 166 #endif
 167
 168 /*
 169  * device registration specific to PXA27x.
 170  */
 171
 172 static u64 pxa27x_dmamask = 0xffffffffUL;
 173
 174 static struct resource pxa27x_ohci_resources[] = {
 175         [0] = {
 176                 .start  = 0x4C000000,
 177                 .end    = 0x4C00ff6f,
 178                 .flags  = IORESOURCE_MEM,
 179         },
 180         [1] = {
 181                 .start  = IRQ_USBH1,
 182                 .end    = IRQ_USBH1,
 183                 .flags  = IORESOURCE_IRQ,
 184         },
 185 };
 186
 187 static struct platform_device ohci_device = {
 188         .name           = "pxa27x-ohci",
 189         .id             = -1,
 190         .dev            = {
 191                 .dma_mask = &pxa27x_dmamask,
 192                 .coherent_dma_mask = 0xffffffff,
 193         },
 194         .num_resources  = ARRAY_SIZE(pxa27x_ohci_resources),
 195         .resource       = pxa27x_ohci_resources,
 196 };
 197
 198 void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
 199 {
 200         ohci_device.dev.platform_data = info;
 201 }
 202
 203 static struct platform_device *devices[] __initdata = {
 204         &ohci_device,
 205 };
 206
 207 static int __init pxa27x_init(void)
 208 {
 209         return platform_add_devices(devices, ARRAY_SIZE(devices));
 210 }
 211
 212 subsys_initcall(pxa27x_init);