arch/arm/mach-pxa/pxa27x.c

   1 /*
   2  *  linux/arch/arm/mach-pxa/pxa27x.c
   3  *
   4  *  Author:     Nicolas Pitre
   5  *  Created:    Nov 05, 2002
   6  *  Copyright:  MontaVista Software Inc.
   7  *
   8  * Code specific to PXA27x aka Bulverde.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14 #include <linux/config.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18 #include <linux/pm.h>
  19 #include <linux/device.h>
  20
  21 #include <asm/hardware.h>
  22 #include <asm/irq.h>
  23 #include <asm/arch/pxa-regs.h>
  24
  25 #include "generic.h"
  26
  27 /* Crystal clock: 13MHz */
  28 #define BASE_CLK        13000000
  29
  30 /*
  31  * Get the clock frequency as reflected by CCSR and the turbo flag.
  32  * We assume these values have been applied via a fcs.
  33  * If info is not 0 we also display the current settings.
  34  */
  35 unsigned int get_clk_frequency_khz( int info)
  36 {
  37         unsigned long ccsr, clkcfg;
  38         unsigned int l, L, m, M, n2, N, S;
  39         int cccr_a, t, ht, b;
  40
  41         ccsr = CCSR;
  42         cccr_a = CCCR & (1 << 25);
  43
  44         /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
  45         asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
  46         t  = clkcfg & (1 << 1);
  47         ht = clkcfg & (1 << 2);
  48         b  = clkcfg & (1 << 3);
  49
  50         l  = ccsr & 0x1f;
  51         n2 = (ccsr>>7) & 0xf;
  52         m  = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
  53
  54         L  = l * BASE_CLK;
  55         N  = (L * n2) / 2;
  56         M  = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
  57         S  = (b) ? L : (L/2);
  58
  59         if (info) {
  60                 printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
  61                         L / 1000000, (L % 1000000) / 10000, l );
  62                 printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
  63                         N / 1000000, (N % 1000000)/10000, n2 / 2, (n2 % 2)*5,
  64                         (t) ? "" : "in" );
  65                 printk( KERN_INFO "Memory clock: %d.%02dMHz (/%d)\n",
  66                         M / 1000000, (M % 1000000) / 10000, m );
  67                 printk( KERN_INFO "System bus clock: %d.%02dMHz \n",
  68                         S / 1000000, (S % 1000000) / 10000 );
  69         }
  70
  71         return (t) ? (N/1000) : (L/1000);
  72 }
  73
  74 /*
  75  * Return the current mem clock frequency in units of 10kHz as
  76  * reflected by CCCR[A], B, and L
  77  */
  78 unsigned int get_memclk_frequency_10khz(void)
  79 {
  80         unsigned long ccsr, clkcfg;
  81         unsigned int l, L, m, M;
  82         int cccr_a, b;
  83
  84         ccsr = CCSR;
  85         cccr_a = CCCR & (1 << 25);
  86
  87         /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
  88         asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
  89         b = clkcfg & (1 << 3);
  90
  91         l = ccsr & 0x1f;
  92         m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
  93
  94         L = l * BASE_CLK;
  95         M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
  96
  97         return (M / 10000);
  98 }
  99
 100 /*
 101  * Return the current LCD clock frequency in units of 10kHz as
 102  */
 103 unsigned int get_lcdclk_frequency_10khz(void)
 104 {
 105         unsigned long ccsr;
 106         unsigned int l, L, k, K;
 107
 108         ccsr = CCSR;
 109
 110         l = ccsr & 0x1f;
 111         k = (l <= 7) ? 1 : (l <= 16) ? 2 : 4;
 112
 113         L = l * BASE_CLK;
 114         K = L / k;
 115
 116         return (K / 10000);
 117 }
 118
 119 EXPORT_SYMBOL(get_clk_frequency_khz);
 120 EXPORT_SYMBOL(get_memclk_frequency_10khz);
 121 EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
 122
 123 #ifdef CONFIG_PM
 124
 125 int pxa_cpu_pm_prepare(suspend_state_t state)
 126 {
 127         switch (state) {
 128         case PM_SUSPEND_MEM:
 129                 return 0;
 130         default:
 131                 return -EINVAL;
 132         }
 133 }
 134
 135 void pxa_cpu_pm_enter(suspend_state_t state)
 136 {
 137         extern void pxa_cpu_standby(void);
 138         extern void pxa_cpu_suspend(unsigned int);
 139         extern void pxa_cpu_resume(void);
 140
 141         CKEN = CKEN22_MEMC | CKEN9_OSTIMER;
 142
 143         /* ensure voltage-change sequencer not initiated, which hangs */
 144         PCFR &= ~PCFR_FVC;
 145
 146         /* Clear edge-detect status register. */
 147         PEDR = 0xDF12FE1B;
 148
 149         switch (state) {
 150         case PM_SUSPEND_MEM:
 151                 /* set resume return address */
 152                 PSPR = virt_to_phys(pxa_cpu_resume);
 153                 pxa_cpu_suspend(3);
 154                 break;
 155         }
 156 }
 157
 158 #endif
 159
 160 /*
 161  * device registration specific to PXA27x.
 162  */
 163
 164 static u64 pxa27x_dmamask = 0xffffffffUL;
 165
 166 static struct resource pxa27x_ohci_resources[] = {
 167         [0] = {
 168                 .start  = 0x4C000000,
 169                 .end    = 0x4C00ff6f,
 170                 .flags  = IORESOURCE_MEM,
 171         },
 172         [1] = {
 173                 .start  = IRQ_USBH1,
 174                 .end    = IRQ_USBH1,
 175                 .flags  = IORESOURCE_IRQ,
 176         },
 177 };
 178
 179 static struct platform_device ohci_device = {
 180         .name           = "pxa27x-ohci",
 181         .id             = -1,
 182         .dev            = {
 183                 .dma_mask = &pxa27x_dmamask,
 184                 .coherent_dma_mask = 0xffffffff,
 185         },
 186         .num_resources  = ARRAY_SIZE(pxa27x_ohci_resources),
 187         .resource       = pxa27x_ohci_resources,
 188 };
 189
 190 static struct platform_device *devices[] __initdata = {
 191         &ohci_device,
 192 };
 193
 194 static int __init pxa27x_init(void)
 195 {
 196         return platform_add_devices(devices, ARRAY_SIZE(devices));
 197 }
 198
 199 subsys_initcall(pxa27x_init);