Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney...
[deliverable/linux.git] / arch / arm / mach-realview / core.c
1 /*
2 * linux/arch/arm/mach-realview/core.c
3 *
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/device.h>
25 #include <linux/interrupt.h>
26 #include <linux/amba/bus.h>
27 #include <linux/amba/clcd.h>
28 #include <linux/io.h>
29 #include <linux/smsc911x.h>
30 #include <linux/ata_platform.h>
31 #include <linux/amba/mmci.h>
32 #include <linux/gfp.h>
33 #include <linux/mtd/physmap.h>
34 #include <linux/memblock.h>
35
36 #include <mach/hardware.h>
37 #include <asm/irq.h>
38 #include <asm/mach-types.h>
39 #include <asm/hardware/arm_timer.h>
40 #include <asm/hardware/icst.h>
41
42 #include <asm/mach/arch.h>
43 #include <asm/mach/irq.h>
44 #include <asm/mach/map.h>
45
46
47 #include <mach/platform.h>
48 #include <mach/irqs.h>
49 #include <asm/hardware/timer-sp.h>
50
51 #include <plat/clcd.h>
52 #include <plat/sched_clock.h>
53
54 #include "core.h"
55
56 #define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
57
58 static void realview_flash_set_vpp(struct platform_device *pdev, int on)
59 {
60 u32 val;
61
62 val = __raw_readl(REALVIEW_FLASHCTRL);
63 if (on)
64 val |= REALVIEW_FLASHPROG_FLVPPEN;
65 else
66 val &= ~REALVIEW_FLASHPROG_FLVPPEN;
67 __raw_writel(val, REALVIEW_FLASHCTRL);
68 }
69
70 static struct physmap_flash_data realview_flash_data = {
71 .width = 4,
72 .set_vpp = realview_flash_set_vpp,
73 };
74
75 struct platform_device realview_flash_device = {
76 .name = "physmap-flash",
77 .id = 0,
78 .dev = {
79 .platform_data = &realview_flash_data,
80 },
81 };
82
83 int realview_flash_register(struct resource *res, u32 num)
84 {
85 realview_flash_device.resource = res;
86 realview_flash_device.num_resources = num;
87 return platform_device_register(&realview_flash_device);
88 }
89
90 static struct smsc911x_platform_config smsc911x_config = {
91 .flags = SMSC911X_USE_32BIT,
92 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
93 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
94 .phy_interface = PHY_INTERFACE_MODE_MII,
95 };
96
97 static struct platform_device realview_eth_device = {
98 .name = "smsc911x",
99 .id = 0,
100 .num_resources = 2,
101 };
102
103 int realview_eth_register(const char *name, struct resource *res)
104 {
105 if (name)
106 realview_eth_device.name = name;
107 realview_eth_device.resource = res;
108 if (strcmp(realview_eth_device.name, "smsc911x") == 0)
109 realview_eth_device.dev.platform_data = &smsc911x_config;
110
111 return platform_device_register(&realview_eth_device);
112 }
113
114 struct platform_device realview_usb_device = {
115 .name = "isp1760",
116 .num_resources = 2,
117 };
118
119 int realview_usb_register(struct resource *res)
120 {
121 realview_usb_device.resource = res;
122 return platform_device_register(&realview_usb_device);
123 }
124
125 static struct pata_platform_info pata_platform_data = {
126 .ioport_shift = 1,
127 };
128
129 static struct resource pata_resources[] = {
130 [0] = {
131 .start = REALVIEW_CF_BASE,
132 .end = REALVIEW_CF_BASE + 0xff,
133 .flags = IORESOURCE_MEM,
134 },
135 [1] = {
136 .start = REALVIEW_CF_BASE + 0x100,
137 .end = REALVIEW_CF_BASE + SZ_4K - 1,
138 .flags = IORESOURCE_MEM,
139 },
140 };
141
142 struct platform_device realview_cf_device = {
143 .name = "pata_platform",
144 .id = -1,
145 .num_resources = ARRAY_SIZE(pata_resources),
146 .resource = pata_resources,
147 .dev = {
148 .platform_data = &pata_platform_data,
149 },
150 };
151
152 static struct resource realview_leds_resources[] = {
153 {
154 .start = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET,
155 .end = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET + 4,
156 .flags = IORESOURCE_MEM,
157 },
158 };
159
160 struct platform_device realview_leds_device = {
161 .name = "versatile-leds",
162 .id = -1,
163 .num_resources = ARRAY_SIZE(realview_leds_resources),
164 .resource = realview_leds_resources,
165 };
166
167 static struct resource realview_i2c_resource = {
168 .start = REALVIEW_I2C_BASE,
169 .end = REALVIEW_I2C_BASE + SZ_4K - 1,
170 .flags = IORESOURCE_MEM,
171 };
172
173 struct platform_device realview_i2c_device = {
174 .name = "versatile-i2c",
175 .id = 0,
176 .num_resources = 1,
177 .resource = &realview_i2c_resource,
178 };
179
180 static struct i2c_board_info realview_i2c_board_info[] = {
181 {
182 I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
183 },
184 };
185
186 static int __init realview_i2c_init(void)
187 {
188 return i2c_register_board_info(0, realview_i2c_board_info,
189 ARRAY_SIZE(realview_i2c_board_info));
190 }
191 arch_initcall(realview_i2c_init);
192
193 #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
194
195 /*
196 * This is only used if GPIOLIB support is disabled
197 */
198 static unsigned int realview_mmc_status(struct device *dev)
199 {
200 struct amba_device *adev = container_of(dev, struct amba_device, dev);
201 u32 mask;
202
203 if (machine_is_realview_pb1176()) {
204 static bool inserted = false;
205
206 /*
207 * The PB1176 does not have the status register,
208 * assume it is inserted at startup, then invert
209 * for each call so card insertion/removal will
210 * be detected anyway. This will not be called if
211 * GPIO on PL061 is active, which is the proper
212 * way to do this on the PB1176.
213 */
214 inserted = !inserted;
215 return inserted ? 0 : 1;
216 }
217
218 if (adev->res.start == REALVIEW_MMCI0_BASE)
219 mask = 1;
220 else
221 mask = 2;
222
223 return readl(REALVIEW_SYSMCI) & mask;
224 }
225
226 struct mmci_platform_data realview_mmc0_plat_data = {
227 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
228 .status = realview_mmc_status,
229 .gpio_wp = 17,
230 .gpio_cd = 16,
231 .cd_invert = true,
232 };
233
234 struct mmci_platform_data realview_mmc1_plat_data = {
235 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
236 .status = realview_mmc_status,
237 .gpio_wp = 19,
238 .gpio_cd = 18,
239 .cd_invert = true,
240 };
241
242 void __init realview_init_early(void)
243 {
244 void __iomem *sys = __io_address(REALVIEW_SYS_BASE);
245
246 versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
247 }
248
249 /*
250 * CLCD support.
251 */
252 #define SYS_CLCD_NLCDIOON (1 << 2)
253 #define SYS_CLCD_VDDPOSSWITCH (1 << 3)
254 #define SYS_CLCD_PWR3V5SWITCH (1 << 4)
255 #define SYS_CLCD_ID_MASK (0x1f << 8)
256 #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
257 #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
258 #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
259 #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
260 #define SYS_CLCD_ID_VGA (0x1f << 8)
261
262 /*
263 * Disable all display connectors on the interface module.
264 */
265 static void realview_clcd_disable(struct clcd_fb *fb)
266 {
267 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
268 u32 val;
269
270 val = readl(sys_clcd);
271 val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
272 writel(val, sys_clcd);
273 }
274
275 /*
276 * Enable the relevant connector on the interface module.
277 */
278 static void realview_clcd_enable(struct clcd_fb *fb)
279 {
280 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
281 u32 val;
282
283 /*
284 * Enable the PSUs
285 */
286 val = readl(sys_clcd);
287 val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
288 writel(val, sys_clcd);
289 }
290
291 /*
292 * Detect which LCD panel is connected, and return the appropriate
293 * clcd_panel structure. Note: we do not have any information on
294 * the required timings for the 8.4in panel, so we presently assume
295 * VGA timings.
296 */
297 static int realview_clcd_setup(struct clcd_fb *fb)
298 {
299 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
300 const char *panel_name, *vga_panel_name;
301 unsigned long framesize;
302 u32 val;
303
304 if (machine_is_realview_eb()) {
305 /* VGA, 16bpp */
306 framesize = 640 * 480 * 2;
307 vga_panel_name = "VGA";
308 } else {
309 /* XVGA, 16bpp */
310 framesize = 1024 * 768 * 2;
311 vga_panel_name = "XVGA";
312 }
313
314 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
315 if (val == SYS_CLCD_ID_SANYO_3_8)
316 panel_name = "Sanyo TM38QV67A02A";
317 else if (val == SYS_CLCD_ID_SANYO_2_5)
318 panel_name = "Sanyo QVGA Portrait";
319 else if (val == SYS_CLCD_ID_EPSON_2_2)
320 panel_name = "Epson L2F50113T00";
321 else if (val == SYS_CLCD_ID_VGA)
322 panel_name = vga_panel_name;
323 else {
324 pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val);
325 panel_name = vga_panel_name;
326 }
327
328 fb->panel = versatile_clcd_get_panel(panel_name);
329 if (!fb->panel)
330 return -EINVAL;
331
332 return versatile_clcd_setup_dma(fb, framesize);
333 }
334
335 struct clcd_board clcd_plat_data = {
336 .name = "RealView",
337 .caps = CLCD_CAP_ALL,
338 .check = clcdfb_check,
339 .decode = clcdfb_decode,
340 .disable = realview_clcd_disable,
341 .enable = realview_clcd_enable,
342 .setup = realview_clcd_setup,
343 .mmap = versatile_clcd_mmap_dma,
344 .remove = versatile_clcd_remove_dma,
345 };
346
347 /*
348 * Where is the timer (VA)?
349 */
350 void __iomem *timer0_va_base;
351 void __iomem *timer1_va_base;
352 void __iomem *timer2_va_base;
353 void __iomem *timer3_va_base;
354
355 /*
356 * Set up the clock source and clock events devices
357 */
358 void __init realview_timer_init(unsigned int timer_irq)
359 {
360 u32 val;
361
362 /*
363 * set clock frequency:
364 * REALVIEW_REFCLK is 32KHz
365 * REALVIEW_TIMCLK is 1MHz
366 */
367 val = readl(__io_address(REALVIEW_SCTL_BASE));
368 writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) |
369 (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) |
370 (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) |
371 (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val,
372 __io_address(REALVIEW_SCTL_BASE));
373
374 /*
375 * Initialise to a known state (all timers off)
376 */
377 writel(0, timer0_va_base + TIMER_CTRL);
378 writel(0, timer1_va_base + TIMER_CTRL);
379 writel(0, timer2_va_base + TIMER_CTRL);
380 writel(0, timer3_va_base + TIMER_CTRL);
381
382 sp804_clocksource_init(timer3_va_base, "timer3");
383 sp804_clockevents_init(timer0_va_base, timer_irq, "timer0");
384 }
385
386 /*
387 * Setup the memory banks.
388 */
389 void realview_fixup(struct tag *tags, char **from)
390 {
391 /*
392 * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
393 * Half of this is mirrored at 0.
394 */
395 #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
396 memblock_add(0x70000000, SZ_512M);
397 #else
398 memblock_add(0, SZ_256M);
399 #endif
400 }
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