arch/arm/mach-realview/platsmp.c

   1 /*
   2  *  linux/arch/arm/mach-realview/platsmp.c
   3  *
   4  *  Copyright (C) 2002 ARM Ltd.
   5  *  All Rights Reserved
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #include <linux/init.h>
  12 #include <linux/errno.h>
  13 #include <linux/delay.h>
  14 #include <linux/device.h>
  15 #include <linux/jiffies.h>
  16 #include <linux/smp.h>
  17 #include <linux/io.h>
  18
  19 #include <asm/cacheflush.h>
  20 #include <mach/hardware.h>
  21 #include <asm/mach-types.h>
  22
  23 #include <mach/board-eb.h>
  24 #include <mach/board-pb11mp.h>
  25 #include <mach/scu.h>
  26
  27 #include "core.h"
  28
  29 extern void realview_secondary_startup(void);
  30
  31 /*
  32  * control for which core is the next to come out of the secondary
  33  * boot "holding pen"
  34  */
  35 volatile int __cpuinitdata pen_release = -1;
  36
  37 static void __iomem *scu_base_addr(void)
  38 {
  39         if (machine_is_realview_eb_mp())
  40                 return __io_address(REALVIEW_EB11MP_SCU_BASE);
  41         else if (machine_is_realview_pb11mp())
  42                 return __io_address(REALVIEW_TC11MP_SCU_BASE);
  43         else
  44                 return (void __iomem *)0;
  45 }
  46
  47 static unsigned int __init get_core_count(void)
  48 {
  49         unsigned int ncores;
  50         void __iomem *scu_base = scu_base_addr();
  51
  52         if (scu_base) {
  53                 ncores = __raw_readl(scu_base + SCU_CONFIG);
  54                 ncores = (ncores & 0x03) + 1;
  55         } else
  56                 ncores = 1;
  57
  58         return ncores;
  59 }
  60
  61 /*
  62  * Setup the SCU
  63  */
  64 static void scu_enable(void)
  65 {
  66         u32 scu_ctrl;
  67         void __iomem *scu_base = scu_base_addr();
  68
  69         scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
  70         scu_ctrl |= 1;
  71         __raw_writel(scu_ctrl, scu_base + SCU_CTRL);
  72 }
  73
  74 static DEFINE_SPINLOCK(boot_lock);
  75
  76 void __cpuinit platform_secondary_init(unsigned int cpu)
  77 {
  78         trace_hardirqs_off();
  79
  80         /*
  81          * if any interrupts are already enabled for the primary
  82          * core (e.g. timer irq), then they will not have been enabled
  83          * for us: do so
  84          */
  85         gic_cpu_init(0, gic_cpu_base_addr);
  86
  87         /*
  88          * let the primary processor know we're out of the
  89          * pen, then head off into the C entry point
  90          */
  91         pen_release = -1;
  92         smp_wmb();
  93
  94         /*
  95          * Synchronise with the boot thread.
  96          */
  97         spin_lock(&boot_lock);
  98         spin_unlock(&boot_lock);
  99 }
 100
 101 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 102 {
 103         unsigned long timeout;
 104
 105         /*
 106          * set synchronisation state between this boot processor
 107          * and the secondary one
 108          */
 109         spin_lock(&boot_lock);
 110
 111         /*
 112          * The secondary processor is waiting to be released from
 113          * the holding pen - release it, then wait for it to flag
 114          * that it has been released by resetting pen_release.
 115          *
 116          * Note that "pen_release" is the hardware CPU ID, whereas
 117          * "cpu" is Linux's internal ID.
 118          */
 119         pen_release = cpu;
 120         flush_cache_all();
 121
 122         /*
 123          * XXX
 124          *
 125          * This is a later addition to the booting protocol: the
 126          * bootMonitor now puts secondary cores into WFI, so
 127          * poke_milo() no longer gets the cores moving; we need
 128          * to send a soft interrupt to wake the secondary core.
 129          * Use smp_cross_call() for this, since there's little
 130          * point duplicating the code here
 131          */
 132         smp_cross_call(cpumask_of(cpu));
 133
 134         timeout = jiffies + (1 * HZ);
 135         while (time_before(jiffies, timeout)) {
 136                 smp_rmb();
 137                 if (pen_release == -1)
 138                         break;
 139
 140                 udelay(10);
 141         }
 142
 143         /*
 144          * now the secondary core is starting up let it run its
 145          * calibrations, then wait for it to finish
 146          */
 147         spin_unlock(&boot_lock);
 148
 149         return pen_release != -1 ? -ENOSYS : 0;
 150 }
 151
 152 static void __init poke_milo(void)
 153 {
 154         extern void secondary_startup(void);
 155
 156         /* nobody is to be released from the pen yet */
 157         pen_release = -1;
 158
 159         /*
 160          * write the address of secondary startup into the system-wide
 161          * flags register, then clear the bottom two bits, which is what
 162          * BootMonitor is waiting for
 163          */
 164 #if 1
 165 #define REALVIEW_SYS_FLAGSS_OFFSET 0x30
 166         __raw_writel(virt_to_phys(realview_secondary_startup),
 167                      __io_address(REALVIEW_SYS_BASE) +
 168                      REALVIEW_SYS_FLAGSS_OFFSET);
 169 #define REALVIEW_SYS_FLAGSC_OFFSET 0x34
 170         __raw_writel(3,
 171                      __io_address(REALVIEW_SYS_BASE) +
 172                      REALVIEW_SYS_FLAGSC_OFFSET);
 173 #endif
 174
 175         mb();
 176 }
 177
 178 /*
 179  * Initialise the CPU possible map early - this describes the CPUs
 180  * which may be present or become present in the system.
 181  */
 182 void __init smp_init_cpus(void)
 183 {
 184         unsigned int i, ncores = get_core_count();
 185
 186         for (i = 0; i < ncores; i++)
 187                 cpu_set(i, cpu_possible_map);
 188 }
 189
 190 void __init smp_prepare_cpus(unsigned int max_cpus)
 191 {
 192         unsigned int ncores = get_core_count();
 193         unsigned int cpu = smp_processor_id();
 194         int i;
 195
 196         /* sanity check */
 197         if (ncores == 0) {
 198                 printk(KERN_ERR
 199                        "Realview: strange CM count of 0? Default to 1\n");
 200
 201                 ncores = 1;
 202         }
 203
 204         if (ncores > NR_CPUS) {
 205                 printk(KERN_WARNING
 206                        "Realview: no. of cores (%d) greater than configured "
 207                        "maximum of %d - clipping\n",
 208                        ncores, NR_CPUS);
 209                 ncores = NR_CPUS;
 210         }
 211
 212         smp_store_cpu_info(cpu);
 213
 214         /*
 215          * are we trying to boot more cores than exist?
 216          */
 217         if (max_cpus > ncores)
 218                 max_cpus = ncores;
 219
 220 #if defined(CONFIG_LOCAL_TIMERS) || defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
 221         /*
 222          * Enable the local timer or broadcast device for the boot CPU.
 223          */
 224         local_timer_setup();
 225 #endif
 226
 227         /*
 228          * Initialise the present map, which describes the set of CPUs
 229          * actually populated at the present time.
 230          */
 231         for (i = 0; i < max_cpus; i++)
 232                 cpu_set(i, cpu_present_map);
 233
 234         /*
 235          * Initialise the SCU if there are more than one CPU and let
 236          * them know where to start. Note that, on modern versions of
 237          * MILO, the "poke" doesn't actually do anything until each
 238          * individual core is sent a soft interrupt to get it out of
 239          * WFI
 240          */
 241         if (max_cpus > 1) {
 242                 scu_enable();
 243                 poke_milo();
 244         }
 245 }