arch/arm/mach-s3c2410/irq.h

   1 /* arch/arm/mach-s3c2410/irq.h
   2  *
   3  * Copyright (c) 2004-2005 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * Header file for S3C24XX CPU IRQ support
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #define irqdbf(x...)
  14 #define irqdbf2(x...)
  15
  16 #define EXTINT_OFF (IRQ_EINT4 - 4)
  17
  18 extern struct irq_chip s3c_irq_level_chip;
  19
  20 static inline void
  21 s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
  22                 int subcheck)
  23 {
  24         unsigned long mask;
  25         unsigned long submask;
  26
  27         submask = __raw_readl(S3C2410_INTSUBMSK);
  28         mask = __raw_readl(S3C2410_INTMSK);
  29
  30         submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
  31
  32         /* check to see if we need to mask the parent IRQ */
  33
  34         if ((submask  & subcheck) == subcheck) {
  35                 __raw_writel(mask | parentbit, S3C2410_INTMSK);
  36         }
  37
  38         /* write back masks */
  39         __raw_writel(submask, S3C2410_INTSUBMSK);
  40
  41 }
  42
  43 static inline void
  44 s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
  45 {
  46         unsigned long mask;
  47         unsigned long submask;
  48
  49         submask = __raw_readl(S3C2410_INTSUBMSK);
  50         mask = __raw_readl(S3C2410_INTMSK);
  51
  52         submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
  53         mask &= ~parentbit;
  54
  55         /* write back masks */
  56         __raw_writel(submask, S3C2410_INTSUBMSK);
  57         __raw_writel(mask, S3C2410_INTMSK);
  58 }
  59
  60
  61 static inline void
  62 s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
  63 {
  64         unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
  65
  66         s3c_irqsub_mask(irqno, parentmask, group);
  67
  68         __raw_writel(bit, S3C2410_SUBSRCPND);
  69
  70         /* only ack parent if we've got all the irqs (seems we must
  71          * ack, all and hope that the irq system retriggers ok when
  72          * the interrupt goes off again)
  73          */
  74
  75         if (1) {
  76                 __raw_writel(parentmask, S3C2410_SRCPND);
  77                 __raw_writel(parentmask, S3C2410_INTPND);
  78         }
  79 }
  80
  81 static inline void
  82 s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
  83 {
  84         unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
  85
  86         __raw_writel(bit, S3C2410_SUBSRCPND);
  87
  88         /* only ack parent if we've got all the irqs (seems we must
  89          * ack, all and hope that the irq system retriggers ok when
  90          * the interrupt goes off again)
  91          */
  92
  93         if (1) {
  94                 __raw_writel(parentmask, S3C2410_SRCPND);
  95                 __raw_writel(parentmask, S3C2410_INTPND);
  96         }
  97 }
  98
  99 /* exported for use in arch/arm/mach-s3c2410 */
 100
 101 #ifdef CONFIG_PM
 102 extern int s3c_irq_wake(unsigned int irqno, unsigned int state);
 103 #else
 104 #define s3c_irq_wake NULL
 105 #endif
 106
 107 extern int s3c_irqext_type(unsigned int irq, unsigned int type);