arch/arm/mach-s3c2410/mach-qt2410.c

   1 /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
   2  *
   3  * Copyright (C) 2006 by OpenMoko, Inc.
   4  * Author: Harald Welte <laforge@openmoko.org>
   5  * All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  *
  22  */
  23
  24 #include <linux/kernel.h>
  25 #include <linux/types.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/list.h>
  28 #include <linux/timer.h>
  29 #include <linux/init.h>
  30 #include <linux/sysdev.h>
  31 #include <linux/platform_device.h>
  32 #include <linux/serial_core.h>
  33 #include <linux/spi/spi.h>
  34 #include <linux/spi/spi_bitbang.h>
  35
  36 #include <linux/mtd/mtd.h>
  37 #include <linux/mtd/nand.h>
  38 #include <linux/mtd/nand_ecc.h>
  39 #include <linux/mtd/partitions.h>
  40
  41 #include <asm/mach/arch.h>
  42 #include <asm/mach/map.h>
  43 #include <asm/mach/irq.h>
  44
  45 #include <asm/hardware.h>
  46 #include <asm/io.h>
  47 #include <asm/irq.h>
  48 #include <asm/mach-types.h>
  49
  50 #include <asm/arch/regs-gpio.h>
  51 #include <asm/arch/leds-gpio.h>
  52 #include <asm/plat-s3c/regs-serial.h>
  53 #include <asm/arch/fb.h>
  54 #include <asm/plat-s3c/nand.h>
  55 #include <asm/plat-s3c24xx/udc.h>
  56 #include <asm/arch/spi.h>
  57 #include <asm/arch/spi-gpio.h>
  58
  59 #include <asm/plat-s3c24xx/common-smdk.h>
  60 #include <asm/plat-s3c24xx/devs.h>
  61 #include <asm/plat-s3c24xx/cpu.h>
  62 #include <asm/plat-s3c24xx/pm.h>
  63
  64 static struct map_desc qt2410_iodesc[] __initdata = {
  65         { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
  66 };
  67
  68 #define UCON S3C2410_UCON_DEFAULT
  69 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  70 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  71
  72 static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
  73         [0] = {
  74                 .hwport      = 0,
  75                 .flags       = 0,
  76                 .ucon        = UCON,
  77                 .ulcon       = ULCON,
  78                 .ufcon       = UFCON,
  79         },
  80         [1] = {
  81                 .hwport      = 1,
  82                 .flags       = 0,
  83                 .ucon        = UCON,
  84                 .ulcon       = ULCON,
  85                 .ufcon       = UFCON,
  86         },
  87         [2] = {
  88                 .hwport      = 2,
  89                 .flags       = 0,
  90                 .ucon        = UCON,
  91                 .ulcon       = ULCON,
  92                 .ufcon       = UFCON,
  93         }
  94 };
  95
  96 /* LCD driver info */
  97
  98 static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
  99         {
 100                 /* Configuration for 640x480 SHARP LQ080V3DG01 */
 101                 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
 102                            S3C2410_LCDCON1_TFT |
 103                            S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
 104
 105                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
 106                            S3C2410_LCDCON5_INVVLINE |
 107                            S3C2410_LCDCON5_INVVFRAME |
 108                            S3C2410_LCDCON5_PWREN |
 109                            S3C2410_LCDCON5_HWSWP,
 110
 111                 .type           = S3C2410_LCDCON1_TFT,
 112                 .width          = 640,
 113                 .height         = 480,
 114
 115                 .xres           = 640,
 116                 .yres           = 480,
 117                 .bpp            = 16,
 118                 .left_margin    = 44,
 119                 .right_margin   = 116,
 120                 .hsync_len      = 96,
 121                 .upper_margin   = 19,
 122                 .lower_margin   = 11,
 123                 .vsync_len      = 15,
 124         },
 125         {
 126                 /* Configuration for 480x640 toppoly TD028TTEC1 */
 127                 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
 128                            S3C2410_LCDCON1_TFT |
 129                            S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
 130
 131                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
 132                            S3C2410_LCDCON5_INVVLINE |
 133                            S3C2410_LCDCON5_INVVFRAME |
 134                            S3C2410_LCDCON5_PWREN |
 135                            S3C2410_LCDCON5_HWSWP,
 136
 137                 .type           = S3C2410_LCDCON1_TFT,
 138                 .width          = 480,
 139                 .height         = 640,
 140                 .xres           = 480,
 141                 .yres           = 640,
 142                 .bpp            = 16,
 143                 .left_margin    = 8,
 144                 .right_margin   = 24,
 145                 .hsync_len      = 8,
 146                 .upper_margin   = 2,
 147                 .lower_margin   = 4,
 148                 .vsync_len      = 2,
 149         },
 150         {
 151                 /* Config for 240x320 LCD */
 152                 .lcdcon1 = S3C2410_LCDCON1_TFT16BPP |
 153                            S3C2410_LCDCON1_TFT |
 154                            S3C2410_LCDCON1_CLKVAL(0x04),
 155
 156                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
 157                            S3C2410_LCDCON5_INVVLINE |
 158                            S3C2410_LCDCON5_INVVFRAME |
 159                            S3C2410_LCDCON5_PWREN |
 160                            S3C2410_LCDCON5_HWSWP,
 161
 162                 .type           = S3C2410_LCDCON1_TFT,
 163                 .width          = 240,
 164                 .height         = 320,
 165                 .xres           = 240,
 166                 .yres           = 320,
 167                 .bpp            = 16,
 168                 .left_margin    = 13,
 169                 .right_margin   = 8,
 170                 .hsync_len      = 4,
 171                 .upper_margin   = 2,
 172                 .lower_margin   = 7,
 173                 .vsync_len      = 4,
 174         },
 175 };
 176
 177
 178 static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {
 179         .displays       = qt2410_lcd_cfg,
 180         .num_displays   = ARRAY_SIZE(qt2410_lcd_cfg),
 181         .default_display = 0,
 182
 183         .lpcsel         = ((0xCE6) & ~7) | 1<<4,
 184 };
 185
 186 /* CS8900 */
 187
 188 static struct resource qt2410_cs89x0_resources[] = {
 189         [0] = {
 190                 .start  = 0x19000000,
 191                 .end    = 0x19000000 + 16,
 192                 .flags  = IORESOURCE_MEM,
 193         },
 194         [1] = {
 195                 .start  = IRQ_EINT9,
 196                 .end    = IRQ_EINT9,
 197                 .flags  = IORESOURCE_IRQ,
 198         },
 199 };
 200
 201 static struct platform_device qt2410_cs89x0 = {
 202         .name           = "cirrus-cs89x0",
 203         .num_resources  = ARRAY_SIZE(qt2410_cs89x0_resources),
 204         .resource       = qt2410_cs89x0_resources,
 205 };
 206
 207 /* LED */
 208
 209 static struct s3c24xx_led_platdata qt2410_pdata_led = {
 210         .gpio           = S3C2410_GPB0,
 211         .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
 212         .name           = "led",
 213         .def_trigger    = "timer",
 214 };
 215
 216 static struct platform_device qt2410_led = {
 217         .name           = "s3c24xx_led",
 218         .id             = 0,
 219         .dev            = {
 220                 .platform_data = &qt2410_pdata_led,
 221         },
 222 };
 223
 224 /* SPI */
 225
 226 static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
 227 {
 228         switch (cs) {
 229         case BITBANG_CS_ACTIVE:
 230                 s3c2410_gpio_setpin(S3C2410_GPB5, 0);
 231                 break;
 232         case BITBANG_CS_INACTIVE:
 233                 s3c2410_gpio_setpin(S3C2410_GPB5, 1);
 234                 break;
 235         }
 236 }
 237
 238 static struct s3c2410_spigpio_info spi_gpio_cfg = {
 239         .pin_clk        = S3C2410_GPG7,
 240         .pin_mosi       = S3C2410_GPG6,
 241         .pin_miso       = S3C2410_GPG5,
 242         .chip_select    = &spi_gpio_cs,
 243 };
 244
 245
 246 static struct platform_device qt2410_spi = {
 247         .name             = "s3c24xx-spi-gpio",
 248         .id               = 1,
 249         .dev = {
 250                 .platform_data = &spi_gpio_cfg,
 251         },
 252 };
 253
 254 /* Board devices */
 255
 256 static struct platform_device *qt2410_devices[] __initdata = {
 257         &s3c_device_usb,
 258         &s3c_device_lcd,
 259         &s3c_device_wdt,
 260         &s3c_device_i2c,
 261         &s3c_device_iis,
 262         &s3c_device_sdi,
 263         &s3c_device_usbgadget,
 264         &qt2410_spi,
 265         &qt2410_cs89x0,
 266         &qt2410_led,
 267 };
 268
 269 static struct mtd_partition qt2410_nand_part[] = {
 270         [0] = {
 271                 .name   = "U-Boot",
 272                 .size   = 0x30000,
 273                 .offset = 0,
 274         },
 275         [1] = {
 276                 .name   = "U-Boot environment",
 277                 .offset = 0x30000,
 278                 .size   = 0x4000,
 279         },
 280         [2] = {
 281                 .name   = "kernel",
 282                 .offset = 0x34000,
 283                 .size   = SZ_2M,
 284         },
 285         [3] = {
 286                 .name   = "initrd",
 287                 .offset = 0x234000,
 288                 .size   = SZ_4M,
 289         },
 290         [4] = {
 291                 .name   = "jffs2",
 292                 .offset = 0x634000,
 293                 .size   = 0x39cc000,
 294         },
 295 };
 296
 297 static struct s3c2410_nand_set qt2410_nand_sets[] = {
 298         [0] = {
 299                 .name           = "NAND",
 300                 .nr_chips       = 1,
 301                 .nr_partitions  = ARRAY_SIZE(qt2410_nand_part),
 302                 .partitions     = qt2410_nand_part,
 303         },
 304 };
 305
 306 /* choose a set of timings which should suit most 512Mbit
 307  * chips and beyond.
 308  */
 309
 310 static struct s3c2410_platform_nand qt2410_nand_info = {
 311         .tacls          = 20,
 312         .twrph0         = 60,
 313         .twrph1         = 20,
 314         .nr_sets        = ARRAY_SIZE(qt2410_nand_sets),
 315         .sets           = qt2410_nand_sets,
 316 };
 317
 318 /* UDC */
 319
 320 static struct s3c2410_udc_mach_info qt2410_udc_cfg = {
 321 };
 322
 323 static char tft_type = 's';
 324
 325 static int __init qt2410_tft_setup(char *str)
 326 {
 327         tft_type = str[0];
 328         return 1;
 329 }
 330
 331 __setup("tft=", qt2410_tft_setup);
 332
 333 static void __init qt2410_map_io(void)
 334 {
 335         s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
 336         s3c24xx_init_clocks(12*1000*1000);
 337         s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
 338 }
 339
 340 static void __init qt2410_machine_init(void)
 341 {
 342         s3c_device_nand.dev.platform_data = &qt2410_nand_info;
 343
 344         switch (tft_type) {
 345         case 'p': /* production */
 346                 qt2410_fb_info.default_display = 1;
 347                 break;
 348         case 'b': /* big */
 349                 qt2410_fb_info.default_display = 0;
 350                 break;
 351         case 's': /* small */
 352         default:
 353                 qt2410_fb_info.default_display = 2;
 354                 break;
 355         }
 356         s3c24xx_fb_set_platdata(&qt2410_fb_info);
 357
 358         s3c2410_gpio_cfgpin(S3C2410_GPB0, S3C2410_GPIO_OUTPUT);
 359         s3c2410_gpio_setpin(S3C2410_GPB0, 1);
 360
 361         s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
 362
 363         s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT);
 364
 365         platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
 366         s3c2410_pm_init();
 367 }
 368
 369 MACHINE_START(QT2410, "QT2410")
 370         .phys_io        = S3C2410_PA_UART,
 371         .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
 372         .boot_params    = S3C2410_SDRAM_PA + 0x100,
 373         .map_io         = qt2410_map_io,
 374         .init_irq       = s3c24xx_init_irq,
 375         .init_machine   = qt2410_machine_init,
 376         .timer          = &s3c24xx_timer,
 377 MACHINE_END
 378
 379