arch/arm/mach-s3c2443/irq.c

   1 /* linux/arch/arm/mach-s3c2443/irq.c
   2  *
   3  * Copyright (c) 2007 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  *
  20 */
  21
  22 #include <linux/init.h>
  23 #include <linux/module.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/ioport.h>
  26 #include <linux/sysdev.h>
  27 #include <linux/io.h>
  28
  29 #include <mach/hardware.h>
  30 #include <asm/irq.h>
  31
  32 #include <asm/mach/irq.h>
  33
  34 #include <mach/regs-irq.h>
  35 #include <mach/regs-gpio.h>
  36
  37 #include <plat/cpu.h>
  38 #include <plat/pm.h>
  39 #include <plat/irq.h>
  40
  41 #define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1)
  42
  43 static inline void s3c2443_irq_demux(unsigned int irq, unsigned int len)
  44 {
  45         unsigned int subsrc, submsk;
  46         unsigned int end;
  47
  48         /* read the current pending interrupts, and the mask
  49          * for what it is available */
  50
  51         subsrc = __raw_readl(S3C2410_SUBSRCPND);
  52         submsk = __raw_readl(S3C2410_INTSUBMSK);
  53
  54         subsrc  &= ~submsk;
  55         subsrc >>= (irq - S3C2410_IRQSUB(0));
  56         subsrc  &= (1 << len)-1;
  57
  58         end = len + irq;
  59
  60         for (; irq < end && subsrc; irq++) {
  61                 if (subsrc & 1)
  62                         generic_handle_irq(irq);
  63
  64                 subsrc >>= 1;
  65         }
  66 }
  67
  68 /* WDT/AC97 sub interrupts */
  69
  70 static void s3c2443_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc)
  71 {
  72         s3c2443_irq_demux(IRQ_S3C2443_WDT, 4);
  73 }
  74
  75 #define INTMSK_WDTAC97  (1UL << (IRQ_WDT - IRQ_EINT0))
  76 #define SUBMSK_WDTAC97  INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
  77
  78 static void s3c2443_irq_wdtac97_mask(struct irq_data *data)
  79 {
  80         s3c_irqsub_mask(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
  81 }
  82
  83 static void s3c2443_irq_wdtac97_unmask(struct irq_data *data)
  84 {
  85         s3c_irqsub_unmask(data->irq, INTMSK_WDTAC97);
  86 }
  87
  88 static void s3c2443_irq_wdtac97_ack(struct irq_data *data)
  89 {
  90         s3c_irqsub_maskack(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
  91 }
  92
  93 static struct irq_chip s3c2443_irq_wdtac97 = {
  94         .irq_mask       = s3c2443_irq_wdtac97_mask,
  95         .irq_unmask     = s3c2443_irq_wdtac97_unmask,
  96         .irq_ack        = s3c2443_irq_wdtac97_ack,
  97 };
  98
  99 /* LCD sub interrupts */
 100
 101 static void s3c2443_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
 102 {
 103         s3c2443_irq_demux(IRQ_S3C2443_LCD1, 4);
 104 }
 105
 106 #define INTMSK_LCD      (1UL << (IRQ_LCD - IRQ_EINT0))
 107 #define SUBMSK_LCD      INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
 108
 109 static void s3c2443_irq_lcd_mask(struct irq_data *data)
 110 {
 111         s3c_irqsub_mask(data->irq, INTMSK_LCD, SUBMSK_LCD);
 112 }
 113
 114 static void s3c2443_irq_lcd_unmask(struct irq_data *data)
 115 {
 116         s3c_irqsub_unmask(data->irq, INTMSK_LCD);
 117 }
 118
 119 static void s3c2443_irq_lcd_ack(struct irq_data *data)
 120 {
 121         s3c_irqsub_maskack(data->irq, INTMSK_LCD, SUBMSK_LCD);
 122 }
 123
 124 static struct irq_chip s3c2443_irq_lcd = {
 125         .irq_mask       = s3c2443_irq_lcd_mask,
 126         .irq_unmask     = s3c2443_irq_lcd_unmask,
 127         .irq_ack        = s3c2443_irq_lcd_ack,
 128 };
 129
 130 /* DMA sub interrupts */
 131
 132 static void s3c2443_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
 133 {
 134         s3c2443_irq_demux(IRQ_S3C2443_DMA0, 6);
 135 }
 136
 137 #define INTMSK_DMA      (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
 138 #define SUBMSK_DMA      INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
 139
 140 static void s3c2443_irq_dma_mask(struct irq_data *data)
 141 {
 142         s3c_irqsub_mask(data->irq, INTMSK_DMA, SUBMSK_DMA);
 143 }
 144
 145 static void s3c2443_irq_dma_unmask(struct irq_data *data)
 146 {
 147         s3c_irqsub_unmask(data->irq, INTMSK_DMA);
 148 }
 149
 150 static void s3c2443_irq_dma_ack(struct irq_data *data)
 151 {
 152         s3c_irqsub_maskack(data->irq, INTMSK_DMA, SUBMSK_DMA);
 153 }
 154
 155 static struct irq_chip s3c2443_irq_dma = {
 156         .irq_mask       = s3c2443_irq_dma_mask,
 157         .irq_unmask     = s3c2443_irq_dma_unmask,
 158         .irq_ack        = s3c2443_irq_dma_ack,
 159 };
 160
 161 /* UART3 sub interrupts */
 162
 163 static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
 164 {
 165         s3c2443_irq_demux(IRQ_S3C2443_RX3, 3);
 166 }
 167
 168 #define INTMSK_UART3    (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
 169 #define SUBMSK_UART3    (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
 170
 171 static void s3c2443_irq_uart3_mask(struct irq_data *data)
 172 {
 173         s3c_irqsub_mask(data->irq, INTMSK_UART3, SUBMSK_UART3);
 174 }
 175
 176 static void s3c2443_irq_uart3_unmask(struct irq_data *data)
 177 {
 178         s3c_irqsub_unmask(data->irq, INTMSK_UART3);
 179 }
 180
 181 static void s3c2443_irq_uart3_ack(struct irq_data *data)
 182 {
 183         s3c_irqsub_maskack(data->irq, INTMSK_UART3, SUBMSK_UART3);
 184 }
 185
 186 static struct irq_chip s3c2443_irq_uart3 = {
 187         .irq_mask       = s3c2443_irq_uart3_mask,
 188         .irq_unmask     = s3c2443_irq_uart3_unmask,
 189         .irq_ack        = s3c2443_irq_uart3_ack,
 190 };
 191
 192 /* CAM sub interrupts */
 193
 194 static void s3c2443_irq_demux_cam(unsigned int irq, struct irq_desc *desc)
 195 {
 196         s3c2443_irq_demux(IRQ_S3C2440_CAM_C, 4);
 197 }
 198
 199 #define INTMSK_CAM      (1UL << (IRQ_CAM - IRQ_EINT0))
 200 #define SUBMSK_CAM      INTMSK(IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P)
 201
 202 static void s3c2443_irq_cam_mask(struct irq_data *data)
 203 {
 204         s3c_irqsub_mask(data->irq, INTMSK_CAM, SUBMSK_CAM);
 205 }
 206
 207 static void s3c2443_irq_cam_unmask(struct irq_data *data)
 208 {
 209         s3c_irqsub_unmask(data->irq, INTMSK_CAM);
 210 }
 211
 212 static void s3c2443_irq_cam_ack(struct irq_data *data)
 213 {
 214         s3c_irqsub_maskack(data->irq, INTMSK_CAM, SUBMSK_CAM);
 215 }
 216
 217 static struct irq_chip s3c2443_irq_cam = {
 218         .irq_mask       = s3c2443_irq_cam_mask,
 219         .irq_unmask     = s3c2443_irq_cam_unmask,
 220         .irq_ack        = s3c2443_irq_cam_ack,
 221 };
 222
 223 /* IRQ initialisation code */
 224
 225 static int __init s3c2443_add_sub(unsigned int base,
 226                                    void (*demux)(unsigned int,
 227                                                  struct irq_desc *),
 228                                    struct irq_chip *chip,
 229                                    unsigned int start, unsigned int end)
 230 {
 231         unsigned int irqno;
 232
 233         irq_set_chip(base, &s3c_irq_level_chip);
 234         irq_set_handler(base, handle_level_irq);
 235         irq_set_chained_handler(base, demux);
 236
 237         for (irqno = start; irqno <= end; irqno++) {
 238                 irq_set_chip(irqno, chip);
 239                 irq_set_handler(irqno, handle_level_irq);
 240                 set_irq_flags(irqno, IRQF_VALID);
 241         }
 242
 243         return 0;
 244 }
 245
 246 static int __init s3c2443_irq_add(struct sys_device *sysdev)
 247 {
 248         printk("S3C2443: IRQ Support\n");
 249
 250         s3c2443_add_sub(IRQ_CAM, s3c2443_irq_demux_cam, &s3c2443_irq_cam,
 251                         IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P);
 252
 253         s3c2443_add_sub(IRQ_LCD, s3c2443_irq_demux_lcd, &s3c2443_irq_lcd,
 254                         IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4);
 255
 256         s3c2443_add_sub(IRQ_S3C2443_DMA, s3c2443_irq_demux_dma,
 257                         &s3c2443_irq_dma, IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5);
 258
 259         s3c2443_add_sub(IRQ_S3C2443_UART3, s3c2443_irq_demux_uart3,
 260                         &s3c2443_irq_uart3,
 261                         IRQ_S3C2443_RX3, IRQ_S3C2443_ERR3);
 262
 263         s3c2443_add_sub(IRQ_WDT, s3c2443_irq_demux_wdtac97,
 264                         &s3c2443_irq_wdtac97,
 265                         IRQ_S3C2443_WDT, IRQ_S3C2443_AC97);
 266
 267         return 0;
 268 }
 269
 270 static struct sysdev_driver s3c2443_irq_driver = {
 271         .add            = s3c2443_irq_add,
 272 };
 273
 274 static int __init s3c2443_irq_init(void)
 275 {
 276         return sysdev_driver_register(&s3c2443_sysclass, &s3c2443_irq_driver);
 277 }
 278
 279 arch_initcall(s3c2443_irq_init);
 280