Merge branch 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / arm / mach-s3c24xx / cpufreq.c
1 /*
2 * Copyright (c) 2006-2008 Simtec Electronics
3 * http://armlinux.simtec.co.uk/
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX CPU Frequency scaling
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/interrupt.h>
16 #include <linux/ioport.h>
17 #include <linux/cpufreq.h>
18 #include <linux/cpu.h>
19 #include <linux/clk.h>
20 #include <linux/err.h>
21 #include <linux/io.h>
22 #include <linux/device.h>
23 #include <linux/sysfs.h>
24 #include <linux/slab.h>
25
26 #include <asm/mach/arch.h>
27 #include <asm/mach/map.h>
28
29 #include <plat/cpu.h>
30 #include <plat/clock.h>
31 #include <plat/cpu-freq-core.h>
32
33 #include <mach/regs-clock.h>
34
35 /* note, cpufreq support deals in kHz, no Hz */
36
37 static struct cpufreq_driver s3c24xx_driver;
38 static struct s3c_cpufreq_config cpu_cur;
39 static struct s3c_iotimings s3c24xx_iotiming;
40 static struct cpufreq_frequency_table *pll_reg;
41 static unsigned int last_target = ~0;
42 static unsigned int ftab_size;
43 static struct cpufreq_frequency_table *ftab;
44
45 static struct clk *_clk_mpll;
46 static struct clk *_clk_xtal;
47 static struct clk *clk_fclk;
48 static struct clk *clk_hclk;
49 static struct clk *clk_pclk;
50 static struct clk *clk_arm;
51
52 #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS
53 struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void)
54 {
55 return &cpu_cur;
56 }
57
58 struct s3c_iotimings *s3c_cpufreq_getiotimings(void)
59 {
60 return &s3c24xx_iotiming;
61 }
62 #endif /* CONFIG_CPU_FREQ_S3C24XX_DEBUGFS */
63
64 static void s3c_cpufreq_getcur(struct s3c_cpufreq_config *cfg)
65 {
66 unsigned long fclk, pclk, hclk, armclk;
67
68 cfg->freq.fclk = fclk = clk_get_rate(clk_fclk);
69 cfg->freq.hclk = hclk = clk_get_rate(clk_hclk);
70 cfg->freq.pclk = pclk = clk_get_rate(clk_pclk);
71 cfg->freq.armclk = armclk = clk_get_rate(clk_arm);
72
73 cfg->pll.index = __raw_readl(S3C2410_MPLLCON);
74 cfg->pll.frequency = fclk;
75
76 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
77
78 cfg->divs.h_divisor = fclk / hclk;
79 cfg->divs.p_divisor = fclk / pclk;
80 }
81
82 static inline void s3c_cpufreq_calc(struct s3c_cpufreq_config *cfg)
83 {
84 unsigned long pll = cfg->pll.frequency;
85
86 cfg->freq.fclk = pll;
87 cfg->freq.hclk = pll / cfg->divs.h_divisor;
88 cfg->freq.pclk = pll / cfg->divs.p_divisor;
89
90 /* convert hclk into 10ths of nanoseconds for io calcs */
91 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
92 }
93
94 static inline int closer(unsigned int target, unsigned int n, unsigned int c)
95 {
96 int diff_cur = abs(target - c);
97 int diff_new = abs(target - n);
98
99 return (diff_new < diff_cur);
100 }
101
102 static void s3c_cpufreq_show(const char *pfx,
103 struct s3c_cpufreq_config *cfg)
104 {
105 s3c_freq_dbg("%s: Fvco=%u, F=%lu, A=%lu, H=%lu (%u), P=%lu (%u)\n",
106 pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk,
107 cfg->freq.hclk, cfg->divs.h_divisor,
108 cfg->freq.pclk, cfg->divs.p_divisor);
109 }
110
111 /* functions to wrapper the driver info calls to do the cpu specific work */
112
113 static void s3c_cpufreq_setio(struct s3c_cpufreq_config *cfg)
114 {
115 if (cfg->info->set_iotiming)
116 (cfg->info->set_iotiming)(cfg, &s3c24xx_iotiming);
117 }
118
119 static int s3c_cpufreq_calcio(struct s3c_cpufreq_config *cfg)
120 {
121 if (cfg->info->calc_iotiming)
122 return (cfg->info->calc_iotiming)(cfg, &s3c24xx_iotiming);
123
124 return 0;
125 }
126
127 static void s3c_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
128 {
129 (cfg->info->set_refresh)(cfg);
130 }
131
132 static void s3c_cpufreq_setdivs(struct s3c_cpufreq_config *cfg)
133 {
134 (cfg->info->set_divs)(cfg);
135 }
136
137 static int s3c_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg)
138 {
139 return (cfg->info->calc_divs)(cfg);
140 }
141
142 static void s3c_cpufreq_setfvco(struct s3c_cpufreq_config *cfg)
143 {
144 (cfg->info->set_fvco)(cfg);
145 }
146
147 static inline void s3c_cpufreq_resume_clocks(void)
148 {
149 cpu_cur.info->resume_clocks();
150 }
151
152 static inline void s3c_cpufreq_updateclk(struct clk *clk,
153 unsigned int freq)
154 {
155 clk_set_rate(clk, freq);
156 }
157
158 static int s3c_cpufreq_settarget(struct cpufreq_policy *policy,
159 unsigned int target_freq,
160 struct cpufreq_frequency_table *pll)
161 {
162 struct s3c_cpufreq_freqs freqs;
163 struct s3c_cpufreq_config cpu_new;
164 unsigned long flags;
165
166 cpu_new = cpu_cur; /* copy new from current */
167
168 s3c_cpufreq_show("cur", &cpu_cur);
169
170 /* TODO - check for DMA currently outstanding */
171
172 cpu_new.pll = pll ? *pll : cpu_cur.pll;
173
174 if (pll)
175 freqs.pll_changing = 1;
176
177 /* update our frequencies */
178
179 cpu_new.freq.armclk = target_freq;
180 cpu_new.freq.fclk = cpu_new.pll.frequency;
181
182 if (s3c_cpufreq_calcdivs(&cpu_new) < 0) {
183 printk(KERN_ERR "no divisors for %d\n", target_freq);
184 goto err_notpossible;
185 }
186
187 s3c_freq_dbg("%s: got divs\n", __func__);
188
189 s3c_cpufreq_calc(&cpu_new);
190
191 s3c_freq_dbg("%s: calculated frequencies for new\n", __func__);
192
193 if (cpu_new.freq.hclk != cpu_cur.freq.hclk) {
194 if (s3c_cpufreq_calcio(&cpu_new) < 0) {
195 printk(KERN_ERR "%s: no IO timings\n", __func__);
196 goto err_notpossible;
197 }
198 }
199
200 s3c_cpufreq_show("new", &cpu_new);
201
202 /* setup our cpufreq parameters */
203
204 freqs.old = cpu_cur.freq;
205 freqs.new = cpu_new.freq;
206
207 freqs.freqs.cpu = 0;
208 freqs.freqs.old = cpu_cur.freq.armclk / 1000;
209 freqs.freqs.new = cpu_new.freq.armclk / 1000;
210
211 /* update f/h/p clock settings before we issue the change
212 * notification, so that drivers do not need to do anything
213 * special if they want to recalculate on CPUFREQ_PRECHANGE. */
214
215 s3c_cpufreq_updateclk(_clk_mpll, cpu_new.pll.frequency);
216 s3c_cpufreq_updateclk(clk_fclk, cpu_new.freq.fclk);
217 s3c_cpufreq_updateclk(clk_hclk, cpu_new.freq.hclk);
218 s3c_cpufreq_updateclk(clk_pclk, cpu_new.freq.pclk);
219
220 /* start the frequency change */
221
222 if (policy)
223 cpufreq_notify_transition(&freqs.freqs, CPUFREQ_PRECHANGE);
224
225 /* If hclk is staying the same, then we do not need to
226 * re-write the IO or the refresh timings whilst we are changing
227 * speed. */
228
229 local_irq_save(flags);
230
231 /* is our memory clock slowing down? */
232 if (cpu_new.freq.hclk < cpu_cur.freq.hclk) {
233 s3c_cpufreq_setrefresh(&cpu_new);
234 s3c_cpufreq_setio(&cpu_new);
235 }
236
237 if (cpu_new.freq.fclk == cpu_cur.freq.fclk) {
238 /* not changing PLL, just set the divisors */
239
240 s3c_cpufreq_setdivs(&cpu_new);
241 } else {
242 if (cpu_new.freq.fclk < cpu_cur.freq.fclk) {
243 /* slow the cpu down, then set divisors */
244
245 s3c_cpufreq_setfvco(&cpu_new);
246 s3c_cpufreq_setdivs(&cpu_new);
247 } else {
248 /* set the divisors, then speed up */
249
250 s3c_cpufreq_setdivs(&cpu_new);
251 s3c_cpufreq_setfvco(&cpu_new);
252 }
253 }
254
255 /* did our memory clock speed up */
256 if (cpu_new.freq.hclk > cpu_cur.freq.hclk) {
257 s3c_cpufreq_setrefresh(&cpu_new);
258 s3c_cpufreq_setio(&cpu_new);
259 }
260
261 /* update our current settings */
262 cpu_cur = cpu_new;
263
264 local_irq_restore(flags);
265
266 /* notify everyone we've done this */
267 if (policy)
268 cpufreq_notify_transition(&freqs.freqs, CPUFREQ_POSTCHANGE);
269
270 s3c_freq_dbg("%s: finished\n", __func__);
271 return 0;
272
273 err_notpossible:
274 printk(KERN_ERR "no compatible settings for %d\n", target_freq);
275 return -EINVAL;
276 }
277
278 /* s3c_cpufreq_target
279 *
280 * called by the cpufreq core to adjust the frequency that the CPU
281 * is currently running at.
282 */
283
284 static int s3c_cpufreq_target(struct cpufreq_policy *policy,
285 unsigned int target_freq,
286 unsigned int relation)
287 {
288 struct cpufreq_frequency_table *pll;
289 unsigned int index;
290
291 /* avoid repeated calls which cause a needless amout of duplicated
292 * logging output (and CPU time as the calculation process is
293 * done) */
294 if (target_freq == last_target)
295 return 0;
296
297 last_target = target_freq;
298
299 s3c_freq_dbg("%s: policy %p, target %u, relation %u\n",
300 __func__, policy, target_freq, relation);
301
302 if (ftab) {
303 if (cpufreq_frequency_table_target(policy, ftab,
304 target_freq, relation,
305 &index)) {
306 s3c_freq_dbg("%s: table failed\n", __func__);
307 return -EINVAL;
308 }
309
310 s3c_freq_dbg("%s: adjust %d to entry %d (%u)\n", __func__,
311 target_freq, index, ftab[index].frequency);
312 target_freq = ftab[index].frequency;
313 }
314
315 target_freq *= 1000; /* convert target to Hz */
316
317 /* find the settings for our new frequency */
318
319 if (!pll_reg || cpu_cur.lock_pll) {
320 /* either we've not got any PLL values, or we've locked
321 * to the current one. */
322 pll = NULL;
323 } else {
324 struct cpufreq_policy tmp_policy;
325 int ret;
326
327 /* we keep the cpu pll table in Hz, to ensure we get an
328 * accurate value for the PLL output. */
329
330 tmp_policy.min = policy->min * 1000;
331 tmp_policy.max = policy->max * 1000;
332 tmp_policy.cpu = policy->cpu;
333
334 /* cpufreq_frequency_table_target uses a pointer to 'index'
335 * which is the number of the table entry, not the value of
336 * the table entry's index field. */
337
338 ret = cpufreq_frequency_table_target(&tmp_policy, pll_reg,
339 target_freq, relation,
340 &index);
341
342 if (ret < 0) {
343 printk(KERN_ERR "%s: no PLL available\n", __func__);
344 goto err_notpossible;
345 }
346
347 pll = pll_reg + index;
348
349 s3c_freq_dbg("%s: target %u => %u\n",
350 __func__, target_freq, pll->frequency);
351
352 target_freq = pll->frequency;
353 }
354
355 return s3c_cpufreq_settarget(policy, target_freq, pll);
356
357 err_notpossible:
358 printk(KERN_ERR "no compatible settings for %d\n", target_freq);
359 return -EINVAL;
360 }
361
362 static unsigned int s3c_cpufreq_get(unsigned int cpu)
363 {
364 return clk_get_rate(clk_arm) / 1000;
365 }
366
367 struct clk *s3c_cpufreq_clk_get(struct device *dev, const char *name)
368 {
369 struct clk *clk;
370
371 clk = clk_get(dev, name);
372 if (IS_ERR(clk))
373 printk(KERN_ERR "cpufreq: failed to get clock '%s'\n", name);
374
375 return clk;
376 }
377
378 static int s3c_cpufreq_init(struct cpufreq_policy *policy)
379 {
380 printk(KERN_INFO "%s: initialising policy %p\n", __func__, policy);
381
382 if (policy->cpu != 0)
383 return -EINVAL;
384
385 policy->cur = s3c_cpufreq_get(0);
386 policy->min = policy->cpuinfo.min_freq = 0;
387 policy->max = policy->cpuinfo.max_freq = cpu_cur.info->max.fclk / 1000;
388 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
389
390 /* feed the latency information from the cpu driver */
391 policy->cpuinfo.transition_latency = cpu_cur.info->latency;
392
393 if (ftab)
394 cpufreq_frequency_table_cpuinfo(policy, ftab);
395
396 return 0;
397 }
398
399 static __init int s3c_cpufreq_initclks(void)
400 {
401 _clk_mpll = s3c_cpufreq_clk_get(NULL, "mpll");
402 _clk_xtal = s3c_cpufreq_clk_get(NULL, "xtal");
403 clk_fclk = s3c_cpufreq_clk_get(NULL, "fclk");
404 clk_hclk = s3c_cpufreq_clk_get(NULL, "hclk");
405 clk_pclk = s3c_cpufreq_clk_get(NULL, "pclk");
406 clk_arm = s3c_cpufreq_clk_get(NULL, "armclk");
407
408 if (IS_ERR(clk_fclk) || IS_ERR(clk_hclk) || IS_ERR(clk_pclk) ||
409 IS_ERR(_clk_mpll) || IS_ERR(clk_arm) || IS_ERR(_clk_xtal)) {
410 printk(KERN_ERR "%s: could not get clock(s)\n", __func__);
411 return -ENOENT;
412 }
413
414 printk(KERN_INFO "%s: clocks f=%lu,h=%lu,p=%lu,a=%lu\n", __func__,
415 clk_get_rate(clk_fclk) / 1000,
416 clk_get_rate(clk_hclk) / 1000,
417 clk_get_rate(clk_pclk) / 1000,
418 clk_get_rate(clk_arm) / 1000);
419
420 return 0;
421 }
422
423 static int s3c_cpufreq_verify(struct cpufreq_policy *policy)
424 {
425 if (policy->cpu != 0)
426 return -EINVAL;
427
428 return 0;
429 }
430
431 #ifdef CONFIG_PM
432 static struct cpufreq_frequency_table suspend_pll;
433 static unsigned int suspend_freq;
434
435 static int s3c_cpufreq_suspend(struct cpufreq_policy *policy)
436 {
437 suspend_pll.frequency = clk_get_rate(_clk_mpll);
438 suspend_pll.index = __raw_readl(S3C2410_MPLLCON);
439 suspend_freq = s3c_cpufreq_get(0) * 1000;
440
441 return 0;
442 }
443
444 static int s3c_cpufreq_resume(struct cpufreq_policy *policy)
445 {
446 int ret;
447
448 s3c_freq_dbg("%s: resuming with policy %p\n", __func__, policy);
449
450 last_target = ~0; /* invalidate last_target setting */
451
452 /* first, find out what speed we resumed at. */
453 s3c_cpufreq_resume_clocks();
454
455 /* whilst we will be called later on, we try and re-set the
456 * cpu frequencies as soon as possible so that we do not end
457 * up resuming devices and then immediately having to re-set
458 * a number of settings once these devices have restarted.
459 *
460 * as a note, it is expected devices are not used until they
461 * have been un-suspended and at that time they should have
462 * used the updated clock settings.
463 */
464
465 ret = s3c_cpufreq_settarget(NULL, suspend_freq, &suspend_pll);
466 if (ret) {
467 printk(KERN_ERR "%s: failed to reset pll/freq\n", __func__);
468 return ret;
469 }
470
471 return 0;
472 }
473 #else
474 #define s3c_cpufreq_resume NULL
475 #define s3c_cpufreq_suspend NULL
476 #endif
477
478 static struct cpufreq_driver s3c24xx_driver = {
479 .flags = CPUFREQ_STICKY,
480 .verify = s3c_cpufreq_verify,
481 .target = s3c_cpufreq_target,
482 .get = s3c_cpufreq_get,
483 .init = s3c_cpufreq_init,
484 .suspend = s3c_cpufreq_suspend,
485 .resume = s3c_cpufreq_resume,
486 .name = "s3c24xx",
487 };
488
489
490 int __init s3c_cpufreq_register(struct s3c_cpufreq_info *info)
491 {
492 if (!info || !info->name) {
493 printk(KERN_ERR "%s: failed to pass valid information\n",
494 __func__);
495 return -EINVAL;
496 }
497
498 printk(KERN_INFO "S3C24XX CPU Frequency driver, %s cpu support\n",
499 info->name);
500
501 /* check our driver info has valid data */
502
503 BUG_ON(info->set_refresh == NULL);
504 BUG_ON(info->set_divs == NULL);
505 BUG_ON(info->calc_divs == NULL);
506
507 /* info->set_fvco is optional, depending on whether there
508 * is a need to set the clock code. */
509
510 cpu_cur.info = info;
511
512 /* Note, driver registering should probably update locktime */
513
514 return 0;
515 }
516
517 int __init s3c_cpufreq_setboard(struct s3c_cpufreq_board *board)
518 {
519 struct s3c_cpufreq_board *ours;
520
521 if (!board) {
522 printk(KERN_INFO "%s: no board data\n", __func__);
523 return -EINVAL;
524 }
525
526 /* Copy the board information so that each board can make this
527 * initdata. */
528
529 ours = kzalloc(sizeof(struct s3c_cpufreq_board), GFP_KERNEL);
530 if (ours == NULL) {
531 printk(KERN_ERR "%s: no memory\n", __func__);
532 return -ENOMEM;
533 }
534
535 *ours = *board;
536 cpu_cur.board = ours;
537
538 return 0;
539 }
540
541 int __init s3c_cpufreq_auto_io(void)
542 {
543 int ret;
544
545 if (!cpu_cur.info->get_iotiming) {
546 printk(KERN_ERR "%s: get_iotiming undefined\n", __func__);
547 return -ENOENT;
548 }
549
550 printk(KERN_INFO "%s: working out IO settings\n", __func__);
551
552 ret = (cpu_cur.info->get_iotiming)(&cpu_cur, &s3c24xx_iotiming);
553 if (ret)
554 printk(KERN_ERR "%s: failed to get timings\n", __func__);
555
556 return ret;
557 }
558
559 /* if one or is zero, then return the other, otherwise return the min */
560 #define do_min(_a, _b) ((_a) == 0 ? (_b) : (_b) == 0 ? (_a) : min(_a, _b))
561
562 /**
563 * s3c_cpufreq_freq_min - find the minimum settings for the given freq.
564 * @dst: The destination structure
565 * @a: One argument.
566 * @b: The other argument.
567 *
568 * Create a minimum of each frequency entry in the 'struct s3c_freq',
569 * unless the entry is zero when it is ignored and the non-zero argument
570 * used.
571 */
572 static void s3c_cpufreq_freq_min(struct s3c_freq *dst,
573 struct s3c_freq *a, struct s3c_freq *b)
574 {
575 dst->fclk = do_min(a->fclk, b->fclk);
576 dst->hclk = do_min(a->hclk, b->hclk);
577 dst->pclk = do_min(a->pclk, b->pclk);
578 dst->armclk = do_min(a->armclk, b->armclk);
579 }
580
581 static inline u32 calc_locktime(u32 freq, u32 time_us)
582 {
583 u32 result;
584
585 result = freq * time_us;
586 result = DIV_ROUND_UP(result, 1000 * 1000);
587
588 return result;
589 }
590
591 static void s3c_cpufreq_update_loctkime(void)
592 {
593 unsigned int bits = cpu_cur.info->locktime_bits;
594 u32 rate = (u32)clk_get_rate(_clk_xtal);
595 u32 val;
596
597 if (bits == 0) {
598 WARN_ON(1);
599 return;
600 }
601
602 val = calc_locktime(rate, cpu_cur.info->locktime_u) << bits;
603 val |= calc_locktime(rate, cpu_cur.info->locktime_m);
604
605 printk(KERN_INFO "%s: new locktime is 0x%08x\n", __func__, val);
606 __raw_writel(val, S3C2410_LOCKTIME);
607 }
608
609 static int s3c_cpufreq_build_freq(void)
610 {
611 int size, ret;
612
613 if (!cpu_cur.info->calc_freqtable)
614 return -EINVAL;
615
616 kfree(ftab);
617 ftab = NULL;
618
619 size = cpu_cur.info->calc_freqtable(&cpu_cur, NULL, 0);
620 size++;
621
622 ftab = kmalloc(sizeof(struct cpufreq_frequency_table) * size, GFP_KERNEL);
623 if (!ftab) {
624 printk(KERN_ERR "%s: no memory for tables\n", __func__);
625 return -ENOMEM;
626 }
627
628 ftab_size = size;
629
630 ret = cpu_cur.info->calc_freqtable(&cpu_cur, ftab, size);
631 s3c_cpufreq_addfreq(ftab, ret, size, CPUFREQ_TABLE_END);
632
633 return 0;
634 }
635
636 static int __init s3c_cpufreq_initcall(void)
637 {
638 int ret = 0;
639
640 if (cpu_cur.info && cpu_cur.board) {
641 ret = s3c_cpufreq_initclks();
642 if (ret)
643 goto out;
644
645 /* get current settings */
646 s3c_cpufreq_getcur(&cpu_cur);
647 s3c_cpufreq_show("cur", &cpu_cur);
648
649 if (cpu_cur.board->auto_io) {
650 ret = s3c_cpufreq_auto_io();
651 if (ret) {
652 printk(KERN_ERR "%s: failed to get io timing\n",
653 __func__);
654 goto out;
655 }
656 }
657
658 if (cpu_cur.board->need_io && !cpu_cur.info->set_iotiming) {
659 printk(KERN_ERR "%s: no IO support registered\n",
660 __func__);
661 ret = -EINVAL;
662 goto out;
663 }
664
665 if (!cpu_cur.info->need_pll)
666 cpu_cur.lock_pll = 1;
667
668 s3c_cpufreq_update_loctkime();
669
670 s3c_cpufreq_freq_min(&cpu_cur.max, &cpu_cur.board->max,
671 &cpu_cur.info->max);
672
673 if (cpu_cur.info->calc_freqtable)
674 s3c_cpufreq_build_freq();
675
676 ret = cpufreq_register_driver(&s3c24xx_driver);
677 }
678
679 out:
680 return ret;
681 }
682
683 late_initcall(s3c_cpufreq_initcall);
684
685 /**
686 * s3c_plltab_register - register CPU PLL table.
687 * @plls: The list of PLL entries.
688 * @plls_no: The size of the PLL entries @plls.
689 *
690 * Register the given set of PLLs with the system.
691 */
692 int __init s3c_plltab_register(struct cpufreq_frequency_table *plls,
693 unsigned int plls_no)
694 {
695 struct cpufreq_frequency_table *vals;
696 unsigned int size;
697
698 size = sizeof(struct cpufreq_frequency_table) * (plls_no + 1);
699
700 vals = kmalloc(size, GFP_KERNEL);
701 if (vals) {
702 memcpy(vals, plls, size);
703 pll_reg = vals;
704
705 /* write a terminating entry, we don't store it in the
706 * table that is stored in the kernel */
707 vals += plls_no;
708 vals->frequency = CPUFREQ_TABLE_END;
709
710 printk(KERN_INFO "cpufreq: %d PLL entries\n", plls_no);
711 } else
712 printk(KERN_ERR "cpufreq: no memory for PLL tables\n");
713
714 return vals ? 0 : -ENOMEM;
715 }
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