1 /* linux/arch/arm/mach-s3c2410/dma.c
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 DMA selection
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/serial_core.h>
24 #include <plat/dma-s3c24xx.h>
26 #include <plat/regs-serial.h>
27 #include <mach/regs-gpio.h>
28 #include <plat/regs-ac97.h>
29 #include <plat/regs-dma.h>
30 #include <mach/regs-lcd.h>
31 #include <mach/regs-sdi.h>
32 #include <plat/regs-iis.h>
33 #include <plat/regs-spi.h>
35 static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings
[] = {
38 .channels
[0] = S3C2410_DCON_CH0_XDREQ0
| DMA_CH_VALID
,
42 .channels
[1] = S3C2410_DCON_CH1_XDREQ1
| DMA_CH_VALID
,
46 .channels
[0] = S3C2410_DCON_CH0_SDI
| DMA_CH_VALID
,
47 .channels
[2] = S3C2410_DCON_CH2_SDI
| DMA_CH_VALID
,
48 .channels
[3] = S3C2410_DCON_CH3_SDI
| DMA_CH_VALID
,
52 .channels
[1] = S3C2410_DCON_CH1_SPI
| DMA_CH_VALID
,
56 .channels
[3] = S3C2410_DCON_CH3_SPI
| DMA_CH_VALID
,
60 .channels
[0] = S3C2410_DCON_CH0_UART0
| DMA_CH_VALID
,
64 .channels
[1] = S3C2410_DCON_CH1_UART1
| DMA_CH_VALID
,
68 .channels
[3] = S3C2410_DCON_CH3_UART2
| DMA_CH_VALID
,
72 .channels
[0] = S3C2410_DCON_CH0_TIMER
| DMA_CH_VALID
,
73 .channels
[2] = S3C2410_DCON_CH2_TIMER
| DMA_CH_VALID
,
74 .channels
[3] = S3C2410_DCON_CH3_TIMER
| DMA_CH_VALID
,
78 .channels
[1] = S3C2410_DCON_CH1_I2SSDI
| DMA_CH_VALID
,
79 .channels
[2] = S3C2410_DCON_CH2_I2SSDI
| DMA_CH_VALID
,
83 .channels
[2] = S3C2410_DCON_CH2_I2SSDO
| DMA_CH_VALID
,
87 .channels
[0] = S3C2410_DCON_CH0_USBEP1
| DMA_CH_VALID
,
91 .channels
[1] = S3C2410_DCON_CH1_USBEP2
| DMA_CH_VALID
,
95 .channels
[2] = S3C2410_DCON_CH2_USBEP3
| DMA_CH_VALID
,
99 .channels
[3] =S3C2410_DCON_CH3_USBEP4
| DMA_CH_VALID
,
103 static void s3c2410_dma_select(struct s3c2410_dma_chan
*chan
,
104 struct s3c24xx_dma_map
*map
)
106 chan
->dcon
= map
->channels
[chan
->number
] & ~DMA_CH_VALID
;
109 static struct s3c24xx_dma_selection __initdata s3c2410_dma_sel
= {
110 .select
= s3c2410_dma_select
,
111 .dcon_mask
= 7 << 24,
112 .map
= s3c2410_dma_mappings
,
113 .map_size
= ARRAY_SIZE(s3c2410_dma_mappings
),
116 static struct s3c24xx_dma_order __initdata s3c2410_dma_order
= {
120 [0] = 3 | DMA_CH_VALID
,
121 [1] = 2 | DMA_CH_VALID
,
122 [2] = 0 | DMA_CH_VALID
,
127 [0] = 1 | DMA_CH_VALID
,
128 [1] = 2 | DMA_CH_VALID
,
134 static int __init
s3c2410_dma_add(struct device
*dev
,
135 struct subsys_interface
*sif
)
138 s3c24xx_dma_order_set(&s3c2410_dma_order
);
139 return s3c24xx_dma_init_map(&s3c2410_dma_sel
);
142 #if defined(CONFIG_CPU_S3C2410)
143 static struct subsys_interface s3c2410_dma_interface
= {
144 .name
= "s3c2410_dma",
145 .subsys
= &s3c2410_subsys
,
146 .add_dev
= s3c2410_dma_add
,
149 static int __init
s3c2410_dma_drvinit(void)
151 return subsys_interface_register(&s3c2410_dma_interface
);
154 arch_initcall(s3c2410_dma_drvinit
);
156 static struct subsys_interface s3c2410a_dma_interface
= {
157 .name
= "s3c2410a_dma",
158 .subsys
= &s3c2410a_subsys
,
159 .add_dev
= s3c2410_dma_add
,
162 static int __init
s3c2410a_dma_drvinit(void)
164 return subsys_interface_register(&s3c2410a_dma_interface
);
167 arch_initcall(s3c2410a_dma_drvinit
);
170 #if defined(CONFIG_CPU_S3C2442)
171 /* S3C2442 DMA contains the same selection table as the S3C2410 */
172 static struct subsys_interface s3c2442_dma_interface
= {
173 .name
= "s3c2442_dma",
174 .subsys
= &s3c2442_subsys
,
175 .add_dev
= s3c2410_dma_add
,
178 static int __init
s3c2442_dma_drvinit(void)
180 return subsys_interface_register(&s3c2442_dma_interface
);
183 arch_initcall(s3c2442_dma_drvinit
);