Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[deliverable/linux.git] / arch / arm / mach-s3c24xx / dma-s3c2412.c
1 /* linux/arch/arm/mach-s3c2412/dma.c
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2412 DMA selection
7 *
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/serial_core.h>
19 #include <linux/io.h>
20
21 #include <mach/dma.h>
22
23 #include <plat/dma-s3c24xx.h>
24 #include <plat/cpu.h>
25
26 #include <plat/regs-serial.h>
27 #include <mach/regs-gpio.h>
28 #include <plat/regs-ac97.h>
29 #include <plat/regs-dma.h>
30 #include <mach/regs-lcd.h>
31 #include <plat/regs-iis.h>
32 #include <plat/regs-spi.h>
33
34 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
35
36 static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
37 [DMACH_XD0] = {
38 .name = "xdreq0",
39 .channels = MAP(S3C2412_DMAREQSEL_XDREQ0),
40 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0),
41 },
42 [DMACH_XD1] = {
43 .name = "xdreq1",
44 .channels = MAP(S3C2412_DMAREQSEL_XDREQ1),
45 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1),
46 },
47 [DMACH_SDI] = {
48 .name = "sdi",
49 .channels = MAP(S3C2412_DMAREQSEL_SDI),
50 .channels_rx = MAP(S3C2412_DMAREQSEL_SDI),
51 },
52 [DMACH_SPI0] = {
53 .name = "spi0",
54 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
55 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX),
56 },
57 [DMACH_SPI1] = {
58 .name = "spi1",
59 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
60 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX),
61 },
62 [DMACH_UART0] = {
63 .name = "uart0",
64 .channels = MAP(S3C2412_DMAREQSEL_UART0_0),
65 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0),
66 },
67 [DMACH_UART1] = {
68 .name = "uart1",
69 .channels = MAP(S3C2412_DMAREQSEL_UART1_0),
70 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0),
71 },
72 [DMACH_UART2] = {
73 .name = "uart2",
74 .channels = MAP(S3C2412_DMAREQSEL_UART2_0),
75 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0),
76 },
77 [DMACH_UART0_SRC2] = {
78 .name = "uart0",
79 .channels = MAP(S3C2412_DMAREQSEL_UART0_1),
80 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1),
81 },
82 [DMACH_UART1_SRC2] = {
83 .name = "uart1",
84 .channels = MAP(S3C2412_DMAREQSEL_UART1_1),
85 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1),
86 },
87 [DMACH_UART2_SRC2] = {
88 .name = "uart2",
89 .channels = MAP(S3C2412_DMAREQSEL_UART2_1),
90 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1),
91 },
92 [DMACH_TIMER] = {
93 .name = "timer",
94 .channels = MAP(S3C2412_DMAREQSEL_TIMER),
95 .channels_rx = MAP(S3C2412_DMAREQSEL_TIMER),
96 },
97 [DMACH_I2S_IN] = {
98 .name = "i2s-sdi",
99 .channels = MAP(S3C2412_DMAREQSEL_I2SRX),
100 .channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX),
101 },
102 [DMACH_I2S_OUT] = {
103 .name = "i2s-sdo",
104 .channels = MAP(S3C2412_DMAREQSEL_I2STX),
105 .channels_rx = MAP(S3C2412_DMAREQSEL_I2STX),
106 },
107 [DMACH_USB_EP1] = {
108 .name = "usb-ep1",
109 .channels = MAP(S3C2412_DMAREQSEL_USBEP1),
110 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1),
111 },
112 [DMACH_USB_EP2] = {
113 .name = "usb-ep2",
114 .channels = MAP(S3C2412_DMAREQSEL_USBEP2),
115 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2),
116 },
117 [DMACH_USB_EP3] = {
118 .name = "usb-ep3",
119 .channels = MAP(S3C2412_DMAREQSEL_USBEP3),
120 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3),
121 },
122 [DMACH_USB_EP4] = {
123 .name = "usb-ep4",
124 .channels = MAP(S3C2412_DMAREQSEL_USBEP4),
125 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4),
126 },
127 };
128
129 static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan,
130 struct s3c24xx_dma_map *map,
131 enum dma_data_direction dir)
132 {
133 unsigned long chsel;
134
135 if (dir == DMA_FROM_DEVICE)
136 chsel = map->channels_rx[0];
137 else
138 chsel = map->channels[0];
139
140 chsel &= ~DMA_CH_VALID;
141 chsel |= S3C2412_DMAREQSEL_HW;
142
143 writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL);
144 }
145
146 static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
147 struct s3c24xx_dma_map *map)
148 {
149 s3c2412_dma_direction(chan, map, chan->source);
150 }
151
152 static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
153 .select = s3c2412_dma_select,
154 .direction = s3c2412_dma_direction,
155 .dcon_mask = 0,
156 .map = s3c2412_dma_mappings,
157 .map_size = ARRAY_SIZE(s3c2412_dma_mappings),
158 };
159
160 static int __init s3c2412_dma_add(struct device *dev,
161 struct subsys_interface *sif)
162 {
163 s3c2410_dma_init();
164 return s3c24xx_dma_init_map(&s3c2412_dma_sel);
165 }
166
167 static struct subsys_interface s3c2412_dma_interface = {
168 .name = "s3c2412_dma",
169 .subsys = &s3c2412_subsys,
170 .add_dev = s3c2412_dma_add,
171 };
172
173 static int __init s3c2412_dma_init(void)
174 {
175 return subsys_interface_register(&s3c2412_dma_interface);
176 }
177
178 arch_initcall(s3c2412_dma_init);
This page took 0.042917 seconds and 5 git commands to generate.