Merge branch 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / arm / mach-s3c24xx / dma-s3c2412.c
1 /* linux/arch/arm/mach-s3c2412/dma.c
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2412 DMA selection
7 *
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/serial_core.h>
19 #include <linux/io.h>
20
21 #include <mach/dma.h>
22
23 #include <plat/dma-s3c24xx.h>
24 #include <plat/cpu.h>
25
26 #include <plat/regs-serial.h>
27 #include <mach/regs-gpio.h>
28 #include <plat/regs-ac97.h>
29 #include <plat/regs-dma.h>
30 #include <mach/regs-lcd.h>
31 #include <mach/regs-sdi.h>
32 #include <plat/regs-iis.h>
33 #include <plat/regs-spi.h>
34
35 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
36
37 static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
38 [DMACH_XD0] = {
39 .name = "xdreq0",
40 .channels = MAP(S3C2412_DMAREQSEL_XDREQ0),
41 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0),
42 },
43 [DMACH_XD1] = {
44 .name = "xdreq1",
45 .channels = MAP(S3C2412_DMAREQSEL_XDREQ1),
46 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1),
47 },
48 [DMACH_SDI] = {
49 .name = "sdi",
50 .channels = MAP(S3C2412_DMAREQSEL_SDI),
51 .channels_rx = MAP(S3C2412_DMAREQSEL_SDI),
52 },
53 [DMACH_SPI0] = {
54 .name = "spi0",
55 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
56 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX),
57 },
58 [DMACH_SPI1] = {
59 .name = "spi1",
60 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
61 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX),
62 },
63 [DMACH_UART0] = {
64 .name = "uart0",
65 .channels = MAP(S3C2412_DMAREQSEL_UART0_0),
66 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0),
67 },
68 [DMACH_UART1] = {
69 .name = "uart1",
70 .channels = MAP(S3C2412_DMAREQSEL_UART1_0),
71 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0),
72 },
73 [DMACH_UART2] = {
74 .name = "uart2",
75 .channels = MAP(S3C2412_DMAREQSEL_UART2_0),
76 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0),
77 },
78 [DMACH_UART0_SRC2] = {
79 .name = "uart0",
80 .channels = MAP(S3C2412_DMAREQSEL_UART0_1),
81 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1),
82 },
83 [DMACH_UART1_SRC2] = {
84 .name = "uart1",
85 .channels = MAP(S3C2412_DMAREQSEL_UART1_1),
86 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1),
87 },
88 [DMACH_UART2_SRC2] = {
89 .name = "uart2",
90 .channels = MAP(S3C2412_DMAREQSEL_UART2_1),
91 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1),
92 },
93 [DMACH_TIMER] = {
94 .name = "timer",
95 .channels = MAP(S3C2412_DMAREQSEL_TIMER),
96 .channels_rx = MAP(S3C2412_DMAREQSEL_TIMER),
97 },
98 [DMACH_I2S_IN] = {
99 .name = "i2s-sdi",
100 .channels = MAP(S3C2412_DMAREQSEL_I2SRX),
101 .channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX),
102 },
103 [DMACH_I2S_OUT] = {
104 .name = "i2s-sdo",
105 .channels = MAP(S3C2412_DMAREQSEL_I2STX),
106 .channels_rx = MAP(S3C2412_DMAREQSEL_I2STX),
107 },
108 [DMACH_USB_EP1] = {
109 .name = "usb-ep1",
110 .channels = MAP(S3C2412_DMAREQSEL_USBEP1),
111 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1),
112 },
113 [DMACH_USB_EP2] = {
114 .name = "usb-ep2",
115 .channels = MAP(S3C2412_DMAREQSEL_USBEP2),
116 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2),
117 },
118 [DMACH_USB_EP3] = {
119 .name = "usb-ep3",
120 .channels = MAP(S3C2412_DMAREQSEL_USBEP3),
121 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3),
122 },
123 [DMACH_USB_EP4] = {
124 .name = "usb-ep4",
125 .channels = MAP(S3C2412_DMAREQSEL_USBEP4),
126 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4),
127 },
128 };
129
130 static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan,
131 struct s3c24xx_dma_map *map,
132 enum dma_data_direction dir)
133 {
134 unsigned long chsel;
135
136 if (dir == DMA_FROM_DEVICE)
137 chsel = map->channels_rx[0];
138 else
139 chsel = map->channels[0];
140
141 chsel &= ~DMA_CH_VALID;
142 chsel |= S3C2412_DMAREQSEL_HW;
143
144 writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL);
145 }
146
147 static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
148 struct s3c24xx_dma_map *map)
149 {
150 s3c2412_dma_direction(chan, map, chan->source);
151 }
152
153 static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
154 .select = s3c2412_dma_select,
155 .direction = s3c2412_dma_direction,
156 .dcon_mask = 0,
157 .map = s3c2412_dma_mappings,
158 .map_size = ARRAY_SIZE(s3c2412_dma_mappings),
159 };
160
161 static int __init s3c2412_dma_add(struct device *dev,
162 struct subsys_interface *sif)
163 {
164 s3c2410_dma_init();
165 return s3c24xx_dma_init_map(&s3c2412_dma_sel);
166 }
167
168 static struct subsys_interface s3c2412_dma_interface = {
169 .name = "s3c2412_dma",
170 .subsys = &s3c2412_subsys,
171 .add_dev = s3c2412_dma_add,
172 };
173
174 static int __init s3c2412_dma_init(void)
175 {
176 return subsys_interface_register(&s3c2412_dma_interface);
177 }
178
179 arch_initcall(s3c2412_dma_init);
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