2 * Copyright (c) 2005-2008 Simtec Electronics
3 * http://armlinux.simtec.co.uk/
4 * Ben Dooks <ben@simtec.co.uk>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/interrupt.h>
14 #include <linux/list.h>
15 #include <linux/timer.h>
16 #include <linux/init.h>
17 #include <linux/gpio.h>
18 #include <linux/device.h>
19 #include <linux/syscore_ops.h>
20 #include <linux/serial_core.h>
21 #include <linux/clk.h>
22 #include <linux/i2c.h>
24 #include <linux/platform_device.h>
26 #include <linux/i2c/tps65010.h>
28 #include <asm/mach-types.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/map.h>
31 #include <asm/mach/irq.h>
34 #include <linux/platform_data/mtd-nand-s3c2410.h>
35 #include <linux/platform_data/i2c-s3c2410.h>
37 #include <linux/mtd/mtd.h>
38 #include <linux/mtd/nand.h>
39 #include <linux/mtd/nand_ecc.h>
40 #include <linux/mtd/partitions.h>
42 #include <plat/clock.h>
44 #include <plat/cpu-freq.h>
45 #include <plat/devs.h>
46 #include <plat/gpio-cfg.h>
47 #include <plat/regs-serial.h>
49 #include <mach/hardware.h>
50 #include <mach/regs-gpio.h>
51 #include <mach/regs-lcd.h>
57 /* onboard perihperal map */
59 static struct map_desc osiris_iodesc
[] __initdata
= {
60 /* ISA IO areas (may be over-written later) */
63 .virtual = (u32
)S3C24XX_VA_ISA_BYTE
,
64 .pfn
= __phys_to_pfn(S3C2410_CS5
),
68 .virtual = (u32
)S3C24XX_VA_ISA_WORD
,
69 .pfn
= __phys_to_pfn(S3C2410_CS5
),
74 /* CPLD control registers */
77 .virtual = (u32
)OSIRIS_VA_CTRL0
,
78 .pfn
= __phys_to_pfn(OSIRIS_PA_CTRL0
),
82 .virtual = (u32
)OSIRIS_VA_CTRL1
,
83 .pfn
= __phys_to_pfn(OSIRIS_PA_CTRL1
),
87 .virtual = (u32
)OSIRIS_VA_CTRL2
,
88 .pfn
= __phys_to_pfn(OSIRIS_PA_CTRL2
),
92 .virtual = (u32
)OSIRIS_VA_IDREG
,
93 .pfn
= __phys_to_pfn(OSIRIS_PA_IDREG
),
99 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
100 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
101 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
103 static struct s3c2410_uartcfg osiris_uartcfgs
[] __initdata
= {
110 .clk_sel
= S3C2410_UCON_CLKSEL1
| S3C2410_UCON_CLKSEL2
,
118 .clk_sel
= S3C2410_UCON_CLKSEL1
| S3C2410_UCON_CLKSEL2
,
126 .clk_sel
= S3C2410_UCON_CLKSEL1
| S3C2410_UCON_CLKSEL2
,
130 /* NAND Flash on Osiris board */
132 static int external_map
[] = { 2 };
133 static int chip0_map
[] = { 0 };
134 static int chip1_map
[] = { 1 };
136 static struct mtd_partition __initdata osiris_default_nand_part
[] = {
138 .name
= "Boot Agent",
144 .size
= SZ_4M
- SZ_16K
,
150 .size
= SZ_32M
- SZ_4M
,
155 .size
= MTDPART_SIZ_FULL
,
159 static struct mtd_partition __initdata osiris_default_nand_part_large
[] = {
161 .name
= "Boot Agent",
167 .size
= SZ_4M
- SZ_128K
,
173 .size
= SZ_32M
- SZ_4M
,
178 .size
= MTDPART_SIZ_FULL
,
182 /* the Osiris has 3 selectable slots for nand-flash, the two
183 * on-board chip areas, as well as the external slot.
185 * Note, there is no current hot-plug support for the External
189 static struct s3c2410_nand_set __initdata osiris_nand_sets
[] = {
193 .nr_map
= external_map
,
194 .options
= NAND_SCAN_SILENT_NODEV
,
195 .nr_partitions
= ARRAY_SIZE(osiris_default_nand_part
),
196 .partitions
= osiris_default_nand_part
,
202 .nr_partitions
= ARRAY_SIZE(osiris_default_nand_part
),
203 .partitions
= osiris_default_nand_part
,
209 .options
= NAND_SCAN_SILENT_NODEV
,
210 .nr_partitions
= ARRAY_SIZE(osiris_default_nand_part
),
211 .partitions
= osiris_default_nand_part
,
215 static void osiris_nand_select(struct s3c2410_nand_set
*set
, int slot
)
219 slot
= set
->nr_map
[slot
] & 3;
221 pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n",
222 slot
, set
, set
->nr_map
);
224 tmp
= __raw_readb(OSIRIS_VA_CTRL0
);
225 tmp
&= ~OSIRIS_CTRL0_NANDSEL
;
228 pr_debug("osiris_nand: ctrl0 now %02x\n", tmp
);
230 __raw_writeb(tmp
, OSIRIS_VA_CTRL0
);
233 static struct s3c2410_platform_nand __initdata osiris_nand_info
= {
237 .nr_sets
= ARRAY_SIZE(osiris_nand_sets
),
238 .sets
= osiris_nand_sets
,
239 .select_chip
= osiris_nand_select
,
242 /* PCMCIA control and configuration */
244 static struct resource osiris_pcmcia_resource
[] = {
245 [0] = DEFINE_RES_MEM(0x0f000000, SZ_1M
),
246 [1] = DEFINE_RES_MEM(0x0c000000, SZ_1M
),
249 static struct platform_device osiris_pcmcia
= {
250 .name
= "osiris-pcmcia",
252 .num_resources
= ARRAY_SIZE(osiris_pcmcia_resource
),
253 .resource
= osiris_pcmcia_resource
,
256 /* Osiris power management device */
259 static unsigned char pm_osiris_ctrl0
;
261 static int osiris_pm_suspend(void)
265 pm_osiris_ctrl0
= __raw_readb(OSIRIS_VA_CTRL0
);
266 tmp
= pm_osiris_ctrl0
& ~OSIRIS_CTRL0_NANDSEL
;
268 /* ensure correct NAND slot is selected on resume */
269 if ((pm_osiris_ctrl0
& OSIRIS_CTRL0_BOOT_INT
) == 0)
272 __raw_writeb(tmp
, OSIRIS_VA_CTRL0
);
274 /* ensure that an nRESET is not generated on resume. */
275 gpio_request_one(S3C2410_GPA(21), GPIOF_OUT_INIT_HIGH
, NULL
);
276 gpio_free(S3C2410_GPA(21));
281 static void osiris_pm_resume(void)
283 if (pm_osiris_ctrl0
& OSIRIS_CTRL0_FIX8
)
284 __raw_writeb(OSIRIS_CTRL1_FIX8
, OSIRIS_VA_CTRL1
);
286 __raw_writeb(pm_osiris_ctrl0
, OSIRIS_VA_CTRL0
);
288 s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT
);
292 #define osiris_pm_suspend NULL
293 #define osiris_pm_resume NULL
296 static struct syscore_ops osiris_pm_syscore_ops
= {
297 .suspend
= osiris_pm_suspend
,
298 .resume
= osiris_pm_resume
,
301 /* Link for DVS driver to TPS65011 */
303 static void osiris_tps_release(struct device
*dev
)
305 /* static device, do not need to release anything */
308 static struct platform_device osiris_tps_device
= {
309 .name
= "osiris-dvs",
311 .dev
.release
= osiris_tps_release
,
314 static int osiris_tps_setup(struct i2c_client
*client
, void *context
)
316 osiris_tps_device
.dev
.parent
= &client
->dev
;
317 return platform_device_register(&osiris_tps_device
);
320 static int osiris_tps_remove(struct i2c_client
*client
, void *context
)
322 platform_device_unregister(&osiris_tps_device
);
326 static struct tps65010_board osiris_tps_board
= {
327 .base
= -1, /* GPIO can go anywhere at the moment */
328 .setup
= osiris_tps_setup
,
329 .teardown
= osiris_tps_remove
,
332 /* I2C devices fitted. */
334 static struct i2c_board_info osiris_i2c_devs
[] __initdata
= {
336 I2C_BOARD_INFO("tps65011", 0x48),
338 .platform_data
= &osiris_tps_board
,
342 /* Standard Osiris devices */
344 static struct platform_device
*osiris_devices
[] __initdata
= {
351 static struct clk
*osiris_clocks
[] __initdata
= {
359 static struct s3c_cpufreq_board __initdata osiris_cpufreq
= {
360 .refresh
= 7800, /* refresh period is 7.8usec */
365 static void __init
osiris_map_io(void)
369 /* initialise the clocks */
371 s3c24xx_dclk0
.parent
= &clk_upll
;
372 s3c24xx_dclk0
.rate
= 12*1000*1000;
374 s3c24xx_dclk1
.parent
= &clk_upll
;
375 s3c24xx_dclk1
.rate
= 24*1000*1000;
377 s3c24xx_clkout0
.parent
= &s3c24xx_dclk0
;
378 s3c24xx_clkout1
.parent
= &s3c24xx_dclk1
;
380 s3c24xx_uclk
.parent
= &s3c24xx_clkout1
;
382 s3c24xx_register_clocks(osiris_clocks
, ARRAY_SIZE(osiris_clocks
));
384 s3c24xx_init_io(osiris_iodesc
, ARRAY_SIZE(osiris_iodesc
));
385 s3c24xx_init_clocks(0);
386 s3c24xx_init_uarts(osiris_uartcfgs
, ARRAY_SIZE(osiris_uartcfgs
));
388 /* check for the newer revision boards with large page nand */
390 if ((__raw_readb(OSIRIS_VA_IDREG
) & OSIRIS_ID_REVMASK
) >= 4) {
391 printk(KERN_INFO
"OSIRIS-B detected (revision %d)\n",
392 __raw_readb(OSIRIS_VA_IDREG
) & OSIRIS_ID_REVMASK
);
393 osiris_nand_sets
[0].partitions
= osiris_default_nand_part_large
;
394 osiris_nand_sets
[0].nr_partitions
= ARRAY_SIZE(osiris_default_nand_part_large
);
396 /* write-protect line to the NAND */
397 gpio_request_one(S3C2410_GPA(0), GPIOF_OUT_INIT_HIGH
, NULL
);
398 gpio_free(S3C2410_GPA(0));
401 /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */
403 local_irq_save(flags
);
404 __raw_writel(__raw_readl(S3C2410_BWSCON
) | S3C2410_BWSCON_ST1
| S3C2410_BWSCON_ST2
| S3C2410_BWSCON_ST3
| S3C2410_BWSCON_ST4
| S3C2410_BWSCON_ST5
, S3C2410_BWSCON
);
405 local_irq_restore(flags
);
408 static void __init
osiris_init(void)
410 register_syscore_ops(&osiris_pm_syscore_ops
);
412 s3c_i2c0_set_platdata(NULL
);
413 s3c_nand_set_platdata(&osiris_nand_info
);
415 s3c_cpufreq_setboard(&osiris_cpufreq
);
417 i2c_register_board_info(0, osiris_i2c_devs
,
418 ARRAY_SIZE(osiris_i2c_devs
));
420 platform_add_devices(osiris_devices
, ARRAY_SIZE(osiris_devices
));
423 MACHINE_START(OSIRIS
, "Simtec-OSIRIS")
424 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
425 .atag_offset
= 0x100,
426 .map_io
= osiris_map_io
,
427 .init_irq
= s3c24xx_init_irq
,
428 .init_machine
= osiris_init
,
429 .init_time
= s3c24xx_timer_init
,
430 .restart
= s3c244x_restart
,