Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[deliverable/linux.git] / arch / arm / mach-s3c24xx / mach-vr1000.c
1 /*
2 * Copyright (c) 2003-2008 Simtec Electronics
3 * Ben Dooks <ben@simtec.co.uk>
4 *
5 * Machine support for Thorcom VR1000 board. Designed for Thorcom by
6 * Simtec Electronics, http://www.simtec.co.uk/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/gpio.h>
21 #include <linux/dm9000.h>
22 #include <linux/i2c.h>
23
24 #include <linux/serial.h>
25 #include <linux/tty.h>
26 #include <linux/serial_8250.h>
27 #include <linux/serial_reg.h>
28 #include <linux/io.h>
29
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
32 #include <asm/mach/irq.h>
33
34 #include <asm/irq.h>
35 #include <asm/mach-types.h>
36
37 #include <linux/platform_data/leds-s3c24xx.h>
38 #include <linux/platform_data/i2c-s3c2410.h>
39 #include <linux/platform_data/asoc-s3c24xx_simtec.h>
40
41 #include <mach/hardware.h>
42 #include <mach/regs-gpio.h>
43
44 #include <plat/clock.h>
45 #include <plat/cpu.h>
46 #include <plat/devs.h>
47 #include <plat/regs-serial.h>
48
49 #include "bast.h"
50 #include "common.h"
51 #include "simtec.h"
52 #include "vr1000.h"
53
54 /* macros for virtual address mods for the io space entries */
55 #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
56 #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
57 #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
58 #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
59
60 /* macros to modify the physical addresses for io space */
61
62 #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
63 #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
64 #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
65 #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
66
67 static struct map_desc vr1000_iodesc[] __initdata = {
68 /* ISA IO areas */
69 {
70 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
71 .pfn = PA_CS2(BAST_PA_ISAIO),
72 .length = SZ_16M,
73 .type = MT_DEVICE,
74 }, {
75 .virtual = (u32)S3C24XX_VA_ISA_WORD,
76 .pfn = PA_CS3(BAST_PA_ISAIO),
77 .length = SZ_16M,
78 .type = MT_DEVICE,
79 },
80
81 /* CPLD control registers, and external interrupt controls */
82 {
83 .virtual = (u32)VR1000_VA_CTRL1,
84 .pfn = __phys_to_pfn(VR1000_PA_CTRL1),
85 .length = SZ_1M,
86 .type = MT_DEVICE,
87 }, {
88 .virtual = (u32)VR1000_VA_CTRL2,
89 .pfn = __phys_to_pfn(VR1000_PA_CTRL2),
90 .length = SZ_1M,
91 .type = MT_DEVICE,
92 }, {
93 .virtual = (u32)VR1000_VA_CTRL3,
94 .pfn = __phys_to_pfn(VR1000_PA_CTRL3),
95 .length = SZ_1M,
96 .type = MT_DEVICE,
97 }, {
98 .virtual = (u32)VR1000_VA_CTRL4,
99 .pfn = __phys_to_pfn(VR1000_PA_CTRL4),
100 .length = SZ_1M,
101 .type = MT_DEVICE,
102 },
103 };
104
105 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
106 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
107 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
108
109 static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
110 [0] = {
111 .hwport = 0,
112 .flags = 0,
113 .ucon = UCON,
114 .ulcon = ULCON,
115 .ufcon = UFCON,
116 },
117 [1] = {
118 .hwport = 1,
119 .flags = 0,
120 .ucon = UCON,
121 .ulcon = ULCON,
122 .ufcon = UFCON,
123 },
124 /* port 2 is not actually used */
125 [2] = {
126 .hwport = 2,
127 .flags = 0,
128 .ucon = UCON,
129 .ulcon = ULCON,
130 .ufcon = UFCON,
131 }
132 };
133
134 /* definitions for the vr1000 extra 16550 serial ports */
135
136 #define VR1000_BAUDBASE (3692307)
137
138 #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
139
140 static struct plat_serial8250_port serial_platform_data[] = {
141 [0] = {
142 .mapbase = VR1000_SERIAL_MAPBASE(0),
143 .irq = VR1000_IRQ_SERIAL + 0,
144 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
145 .iotype = UPIO_MEM,
146 .regshift = 0,
147 .uartclk = VR1000_BAUDBASE,
148 },
149 [1] = {
150 .mapbase = VR1000_SERIAL_MAPBASE(1),
151 .irq = VR1000_IRQ_SERIAL + 1,
152 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
153 .iotype = UPIO_MEM,
154 .regshift = 0,
155 .uartclk = VR1000_BAUDBASE,
156 },
157 [2] = {
158 .mapbase = VR1000_SERIAL_MAPBASE(2),
159 .irq = VR1000_IRQ_SERIAL + 2,
160 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
161 .iotype = UPIO_MEM,
162 .regshift = 0,
163 .uartclk = VR1000_BAUDBASE,
164 },
165 [3] = {
166 .mapbase = VR1000_SERIAL_MAPBASE(3),
167 .irq = VR1000_IRQ_SERIAL + 3,
168 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
169 .iotype = UPIO_MEM,
170 .regshift = 0,
171 .uartclk = VR1000_BAUDBASE,
172 },
173 { },
174 };
175
176 static struct platform_device serial_device = {
177 .name = "serial8250",
178 .id = PLAT8250_DEV_PLATFORM,
179 .dev = {
180 .platform_data = serial_platform_data,
181 },
182 };
183
184 /* DM9000 ethernet devices */
185
186 static struct resource vr1000_dm9k0_resource[] = {
187 [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4),
188 [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40),
189 [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000A, 1, NULL, IORESOURCE_IRQ \
190 | IORESOURCE_IRQ_HIGHLEVEL),
191 };
192
193 static struct resource vr1000_dm9k1_resource[] = {
194 [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4),
195 [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40),
196 [2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000N, 1, NULL, IORESOURCE_IRQ \
197 | IORESOURCE_IRQ_HIGHLEVEL),
198 };
199
200 /* for the moment we limit ourselves to 16bit IO until some
201 * better IO routines can be written and tested
202 */
203
204 static struct dm9000_plat_data vr1000_dm9k_platdata = {
205 .flags = DM9000_PLATF_16BITONLY,
206 };
207
208 static struct platform_device vr1000_dm9k0 = {
209 .name = "dm9000",
210 .id = 0,
211 .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
212 .resource = vr1000_dm9k0_resource,
213 .dev = {
214 .platform_data = &vr1000_dm9k_platdata,
215 }
216 };
217
218 static struct platform_device vr1000_dm9k1 = {
219 .name = "dm9000",
220 .id = 1,
221 .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
222 .resource = vr1000_dm9k1_resource,
223 .dev = {
224 .platform_data = &vr1000_dm9k_platdata,
225 }
226 };
227
228 /* LEDS */
229
230 static struct s3c24xx_led_platdata vr1000_led1_pdata = {
231 .name = "led1",
232 .gpio = S3C2410_GPB(0),
233 .def_trigger = "",
234 };
235
236 static struct s3c24xx_led_platdata vr1000_led2_pdata = {
237 .name = "led2",
238 .gpio = S3C2410_GPB(1),
239 .def_trigger = "",
240 };
241
242 static struct s3c24xx_led_platdata vr1000_led3_pdata = {
243 .name = "led3",
244 .gpio = S3C2410_GPB(2),
245 .def_trigger = "",
246 };
247
248 static struct platform_device vr1000_led1 = {
249 .name = "s3c24xx_led",
250 .id = 1,
251 .dev = {
252 .platform_data = &vr1000_led1_pdata,
253 },
254 };
255
256 static struct platform_device vr1000_led2 = {
257 .name = "s3c24xx_led",
258 .id = 2,
259 .dev = {
260 .platform_data = &vr1000_led2_pdata,
261 },
262 };
263
264 static struct platform_device vr1000_led3 = {
265 .name = "s3c24xx_led",
266 .id = 3,
267 .dev = {
268 .platform_data = &vr1000_led3_pdata,
269 },
270 };
271
272 /* I2C devices. */
273
274 static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
275 {
276 I2C_BOARD_INFO("tlv320aic23", 0x1a),
277 }, {
278 I2C_BOARD_INFO("tmp101", 0x48),
279 }, {
280 I2C_BOARD_INFO("m41st87", 0x68),
281 },
282 };
283
284 /* devices for this board */
285
286 static struct platform_device *vr1000_devices[] __initdata = {
287 &s3c_device_ohci,
288 &s3c_device_lcd,
289 &s3c_device_wdt,
290 &s3c_device_i2c0,
291 &s3c_device_adc,
292 &serial_device,
293 &vr1000_dm9k0,
294 &vr1000_dm9k1,
295 &vr1000_led1,
296 &vr1000_led2,
297 &vr1000_led3,
298 };
299
300 static struct clk *vr1000_clocks[] __initdata = {
301 &s3c24xx_dclk0,
302 &s3c24xx_dclk1,
303 &s3c24xx_clkout0,
304 &s3c24xx_clkout1,
305 &s3c24xx_uclk,
306 };
307
308 static void vr1000_power_off(void)
309 {
310 gpio_direction_output(S3C2410_GPB(9), 1);
311 }
312
313 static void __init vr1000_map_io(void)
314 {
315 /* initialise clock sources */
316
317 s3c24xx_dclk0.parent = &clk_upll;
318 s3c24xx_dclk0.rate = 12*1000*1000;
319
320 s3c24xx_dclk1.parent = NULL;
321 s3c24xx_dclk1.rate = 3692307;
322
323 s3c24xx_clkout0.parent = &s3c24xx_dclk0;
324 s3c24xx_clkout1.parent = &s3c24xx_dclk1;
325
326 s3c24xx_uclk.parent = &s3c24xx_clkout1;
327
328 s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
329
330 pm_power_off = vr1000_power_off;
331
332 s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
333 s3c24xx_init_clocks(0);
334 s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
335 }
336
337 static void __init vr1000_init(void)
338 {
339 s3c_i2c0_set_platdata(NULL);
340 platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
341
342 i2c_register_board_info(0, vr1000_i2c_devs,
343 ARRAY_SIZE(vr1000_i2c_devs));
344
345 nor_simtec_init();
346 simtec_audio_add(NULL, true, NULL);
347
348 WARN_ON(gpio_request(S3C2410_GPB(9), "power off"));
349 }
350
351 MACHINE_START(VR1000, "Thorcom-VR1000")
352 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
353 .atag_offset = 0x100,
354 .map_io = vr1000_map_io,
355 .init_machine = vr1000_init,
356 .init_irq = s3c24xx_init_irq,
357 .init_time = s3c24xx_timer_init,
358 .restart = s3c2410_restart,
359 MACHINE_END
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