1 /* linux/arch/arm/plat-s3c24xx/s3c244x.c
3 * Copyright (c) 2004-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/serial_s3c.h>
21 #include <linux/platform_device.h>
22 #include <linux/reboot.h>
23 #include <linux/device.h>
24 #include <linux/syscore_ops.h>
25 #include <linux/clk.h>
28 #include <asm/system_misc.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/map.h>
31 #include <asm/mach/irq.h>
33 #include <mach/hardware.h>
36 #include <plat/cpu-freq.h>
38 #include <mach/regs-clock.h>
39 #include <mach/regs-gpio.h>
41 #include <plat/clock.h>
42 #include <plat/devs.h>
46 #include <plat/nand-core.h>
47 #include <plat/watchdog-reset.h>
52 static struct map_desc s3c244x_iodesc
[] __initdata
= {
58 /* uart initialisation */
60 void __init
s3c244x_init_uarts(struct s3c2410_uartcfg
*cfg
, int no
)
62 s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources
, cfg
, no
);
65 void __init
s3c244x_map_io(void)
67 /* register our io-tables */
69 iotable_init(s3c244x_iodesc
, ARRAY_SIZE(s3c244x_iodesc
));
71 /* rename any peripherals used differing from the s3c2410 */
73 s3c_device_sdi
.name
= "s3c2440-sdi";
74 s3c_device_i2c0
.name
= "s3c2440-i2c";
75 s3c_nand_setname("s3c2440-nand");
76 s3c_device_ts
.name
= "s3c2440-ts";
77 s3c_device_usbgadget
.name
= "s3c2440-usbgadget";
78 s3c2410_device_dclk
.name
= "s3c2440-dclk";
81 #ifdef CONFIG_SAMSUNG_CLOCK
82 void __init_or_cpufreq
s3c244x_setup_clocks(void)
88 unsigned long hclk
, fclk
, pclk
;
91 xtal_clk
= clk_get(NULL
, "xtal");
92 xtal
= clk_get_rate(xtal_clk
);
95 fclk
= s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON
), xtal
) * 2;
97 clkdiv
= __raw_readl(S3C2410_CLKDIVN
);
98 camdiv
= __raw_readl(S3C2440_CAMDIVN
);
100 /* work out clock scalings */
102 switch (clkdiv
& S3C2440_CLKDIVN_HDIVN_MASK
) {
103 case S3C2440_CLKDIVN_HDIVN_1
:
107 case S3C2440_CLKDIVN_HDIVN_2
:
111 case S3C2440_CLKDIVN_HDIVN_4_8
:
112 hdiv
= (camdiv
& S3C2440_CAMDIVN_HCLK4_HALF
) ? 8 : 4;
115 case S3C2440_CLKDIVN_HDIVN_3_6
:
116 hdiv
= (camdiv
& S3C2440_CAMDIVN_HCLK3_HALF
) ? 6 : 3;
121 pclk
= hclk
/ ((clkdiv
& S3C2440_CLKDIVN_PDIVN
) ? 2 : 1);
123 /* print brief summary of clocks, etc */
125 printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
126 print_mhz(fclk
), print_mhz(hclk
), print_mhz(pclk
));
128 s3c24xx_setup_clocks(fclk
, hclk
, pclk
);
131 void __init
s3c244x_init_clocks(int xtal
)
133 /* initialise the clocks here, to allow other things like the
134 * console to use them, and to add new ones after the initialisation
137 s3c24xx_register_baseclocks(xtal
);
138 s3c244x_setup_clocks();
139 s3c2410_baseclk_add();
140 samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG
);
143 void __init_or_cpufreq
s3c244x_setup_clocks(void)
148 /* Since the S3C2442 and S3C2440 share items, put both subsystems here */
150 struct bus_type s3c2440_subsys
= {
151 .name
= "s3c2440-core",
152 .dev_name
= "s3c2440-core",
155 struct bus_type s3c2442_subsys
= {
156 .name
= "s3c2442-core",
157 .dev_name
= "s3c2442-core",
160 /* need to register the subsystem before we actually register the device, and
161 * we also need to ensure that it has been initialised before any of the
162 * drivers even try to use it (even if not on an s3c2440 based system)
163 * as a driver which may support both 2410 and 2440 may try and use it.
166 static int __init
s3c2440_core_init(void)
168 return subsys_system_register(&s3c2440_subsys
, NULL
);
171 core_initcall(s3c2440_core_init
);
173 static int __init
s3c2442_core_init(void)
175 return subsys_system_register(&s3c2442_subsys
, NULL
);
178 core_initcall(s3c2442_core_init
);
182 static struct sleep_save s3c244x_sleep
[] = {
183 SAVE_ITEM(S3C2440_DSC0
),
184 SAVE_ITEM(S3C2440_DSC1
),
185 SAVE_ITEM(S3C2440_GPJDAT
),
186 SAVE_ITEM(S3C2440_GPJCON
),
187 SAVE_ITEM(S3C2440_GPJUP
)
190 static int s3c244x_suspend(void)
192 s3c_pm_do_save(s3c244x_sleep
, ARRAY_SIZE(s3c244x_sleep
));
196 static void s3c244x_resume(void)
198 s3c_pm_do_restore(s3c244x_sleep
, ARRAY_SIZE(s3c244x_sleep
));
201 #define s3c244x_suspend NULL
202 #define s3c244x_resume NULL
205 struct syscore_ops s3c244x_pm_syscore_ops
= {
206 .suspend
= s3c244x_suspend
,
207 .resume
= s3c244x_resume
,
210 void s3c244x_restart(enum reboot_mode mode
, const char *cmd
)
212 if (mode
== REBOOT_SOFT
)
217 /* we'll take a jump through zero as a poor second */