ARM: S3C64XX: Hook up some additional supplies on Cragganmore
[deliverable/linux.git] / arch / arm / mach-s3c64xx / mach-crag6410.c
1 /* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/list.h>
16 #include <linux/serial_core.h>
17 #include <linux/platform_device.h>
18 #include <linux/fb.h>
19 #include <linux/io.h>
20 #include <linux/init.h>
21 #include <linux/gpio.h>
22 #include <linux/delay.h>
23 #include <linux/regulator/machine.h>
24 #include <linux/regulator/fixed.h>
25 #include <linux/pwm_backlight.h>
26 #include <linux/dm9000.h>
27 #include <linux/gpio_keys.h>
28 #include <linux/basic_mmio_gpio.h>
29 #include <linux/spi/spi.h>
30
31 #include <linux/i2c/pca953x.h>
32
33 #include <video/platform_lcd.h>
34
35 #include <linux/mfd/wm831x/core.h>
36 #include <linux/mfd/wm831x/pdata.h>
37 #include <linux/mfd/wm831x/irq.h>
38 #include <linux/mfd/wm831x/gpio.h>
39
40 #include <asm/mach/arch.h>
41 #include <asm/mach-types.h>
42
43 #include <mach/hardware.h>
44 #include <mach/map.h>
45
46 #include <mach/s3c6410.h>
47 #include <mach/regs-sys.h>
48 #include <mach/regs-gpio.h>
49 #include <mach/regs-modem.h>
50 #include <mach/crag6410.h>
51
52 #include <mach/regs-gpio-memport.h>
53
54 #include <plat/regs-serial.h>
55 #include <plat/regs-fb-v4.h>
56 #include <plat/fb.h>
57 #include <plat/sdhci.h>
58 #include <plat/gpio-cfg.h>
59 #include <plat/s3c64xx-spi.h>
60
61 #include <plat/keypad.h>
62 #include <plat/clock.h>
63 #include <plat/devs.h>
64 #include <plat/cpu.h>
65 #include <plat/adc.h>
66 #include <plat/iic.h>
67 #include <plat/pm.h>
68
69 /* serial port setup */
70
71 #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
72 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
73 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
74
75 static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
76 [0] = {
77 .hwport = 0,
78 .flags = 0,
79 .ucon = UCON,
80 .ulcon = ULCON,
81 .ufcon = UFCON,
82 },
83 [1] = {
84 .hwport = 1,
85 .flags = 0,
86 .ucon = UCON,
87 .ulcon = ULCON,
88 .ufcon = UFCON,
89 },
90 [2] = {
91 .hwport = 2,
92 .flags = 0,
93 .ucon = UCON,
94 .ulcon = ULCON,
95 .ufcon = UFCON,
96 },
97 [3] = {
98 .hwport = 3,
99 .flags = 0,
100 .ucon = UCON,
101 .ulcon = ULCON,
102 .ufcon = UFCON,
103 },
104 };
105
106 static struct platform_pwm_backlight_data crag6410_backlight_data = {
107 .pwm_id = 0,
108 .max_brightness = 1000,
109 .dft_brightness = 600,
110 .pwm_period_ns = 100000, /* about 1kHz */
111 };
112
113 static struct platform_device crag6410_backlight_device = {
114 .name = "pwm-backlight",
115 .id = -1,
116 .dev = {
117 .parent = &s3c_device_timer[0].dev,
118 .platform_data = &crag6410_backlight_data,
119 },
120 };
121
122 static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
123 {
124 pr_debug("%s: setting power %d\n", __func__, power);
125
126 if (power) {
127 gpio_set_value(S3C64XX_GPB(0), 1);
128 msleep(1);
129 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
130 } else {
131 gpio_direction_output(S3C64XX_GPF(14), 0);
132 gpio_set_value(S3C64XX_GPB(0), 0);
133 }
134 }
135
136 static struct platform_device crag6410_lcd_powerdev = {
137 .name = "platform-lcd",
138 .id = -1,
139 .dev.parent = &s3c_device_fb.dev,
140 .dev.platform_data = &(struct plat_lcd_data) {
141 .set_power = crag6410_lcd_power_set,
142 },
143 };
144
145 /* 640x480 URT */
146 static struct s3c_fb_pd_win crag6410_fb_win0 = {
147 /* this is to ensure we use win0 */
148 .win_mode = {
149 .left_margin = 150,
150 .right_margin = 80,
151 .upper_margin = 40,
152 .lower_margin = 5,
153 .hsync_len = 40,
154 .vsync_len = 5,
155 .xres = 640,
156 .yres = 480,
157 },
158 .max_bpp = 32,
159 .default_bpp = 16,
160 .virtual_y = 480 * 2,
161 .virtual_x = 640,
162 };
163
164 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
165 static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
166 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
167 .win[0] = &crag6410_fb_win0,
168 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
169 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
170 };
171
172 /* 2x6 keypad */
173
174 static uint32_t crag6410_keymap[] __initdata = {
175 /* KEY(row, col, keycode) */
176 KEY(0, 0, KEY_VOLUMEUP),
177 KEY(0, 1, KEY_HOME),
178 KEY(0, 2, KEY_VOLUMEDOWN),
179 KEY(0, 3, KEY_HELP),
180 KEY(0, 4, KEY_MENU),
181 KEY(0, 5, KEY_MEDIA),
182 KEY(1, 0, 232),
183 KEY(1, 1, KEY_DOWN),
184 KEY(1, 2, KEY_LEFT),
185 KEY(1, 3, KEY_UP),
186 KEY(1, 4, KEY_RIGHT),
187 KEY(1, 5, KEY_CAMERA),
188 };
189
190 static struct matrix_keymap_data crag6410_keymap_data __initdata = {
191 .keymap = crag6410_keymap,
192 .keymap_size = ARRAY_SIZE(crag6410_keymap),
193 };
194
195 static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
196 .keymap_data = &crag6410_keymap_data,
197 .rows = 2,
198 .cols = 6,
199 };
200
201 static struct gpio_keys_button crag6410_gpio_keys[] = {
202 [0] = {
203 .code = KEY_SUSPEND,
204 .gpio = S3C64XX_GPL(10), /* EINT 18 */
205 .type = EV_KEY,
206 .wakeup = 1,
207 .active_low = 1,
208 },
209 [1] = {
210 .code = SW_FRONT_PROXIMITY,
211 .gpio = S3C64XX_GPN(11), /* EINT 11 */
212 .type = EV_SW,
213 },
214 };
215
216 static struct gpio_keys_platform_data crag6410_gpio_keydata = {
217 .buttons = crag6410_gpio_keys,
218 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
219 };
220
221 static struct platform_device crag6410_gpio_keydev = {
222 .name = "gpio-keys",
223 .id = 0,
224 .dev.platform_data = &crag6410_gpio_keydata,
225 };
226
227 static struct resource crag6410_dm9k_resource[] = {
228 [0] = {
229 .start = S3C64XX_PA_XM0CSN5,
230 .end = S3C64XX_PA_XM0CSN5 + 1,
231 .flags = IORESOURCE_MEM,
232 },
233 [1] = {
234 .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
235 .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
236 .flags = IORESOURCE_MEM,
237 },
238 [2] = {
239 .start = S3C_EINT(17),
240 .end = S3C_EINT(17),
241 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
242 },
243 };
244
245 static struct dm9000_plat_data mini6410_dm9k_pdata = {
246 .flags = DM9000_PLATF_16BITONLY,
247 };
248
249 static struct platform_device crag6410_dm9k_device = {
250 .name = "dm9000",
251 .id = -1,
252 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
253 .resource = crag6410_dm9k_resource,
254 .dev.platform_data = &mini6410_dm9k_pdata,
255 };
256
257 static struct resource crag6410_mmgpio_resource[] = {
258 [0] = {
259 .start = S3C64XX_PA_XM0CSN4 + 1,
260 .end = S3C64XX_PA_XM0CSN4 + 1,
261 .flags = IORESOURCE_MEM,
262 },
263 };
264
265 static struct platform_device crag6410_mmgpio = {
266 .name = "basic-mmio-gpio",
267 .id = -1,
268 .resource = crag6410_mmgpio_resource,
269 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
270 .dev.platform_data = &(struct bgpio_pdata) {
271 .base = -1,
272 },
273 };
274
275 static struct platform_device speyside_device = {
276 .name = "speyside",
277 .id = -1,
278 };
279
280 static struct platform_device speyside_wm8962_device = {
281 .name = "speyside-wm8962",
282 .id = -1,
283 };
284
285 static struct regulator_consumer_supply wallvdd_consumers[] = {
286 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
287 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
288 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
289 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
290 };
291
292 static struct regulator_init_data wallvdd_data = {
293 .constraints = {
294 .always_on = 1,
295 },
296 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
297 .consumer_supplies = wallvdd_consumers,
298 };
299
300 static struct fixed_voltage_config wallvdd_pdata = {
301 .supply_name = "WALLVDD",
302 .microvolts = 5000000,
303 .init_data = &wallvdd_data,
304 .gpio = -EINVAL,
305 };
306
307 static struct platform_device wallvdd_device = {
308 .name = "reg-fixed-voltage",
309 .id = -1,
310 .dev = {
311 .platform_data = &wallvdd_pdata,
312 },
313 };
314
315 static struct platform_device *crag6410_devices[] __initdata = {
316 &s3c_device_hsmmc0,
317 &s3c_device_hsmmc1,
318 &s3c_device_hsmmc2,
319 &s3c_device_i2c0,
320 &s3c_device_i2c1,
321 &s3c_device_fb,
322 &s3c_device_ohci,
323 &s3c_device_usb_hsotg,
324 &s3c_device_adc,
325 &s3c_device_rtc,
326 &s3c_device_ts,
327 &s3c_device_timer[0],
328 &s3c64xx_device_iis0,
329 &s3c64xx_device_iis1,
330 &samsung_asoc_dma,
331 &samsung_device_keypad,
332 &crag6410_gpio_keydev,
333 &crag6410_dm9k_device,
334 &s3c64xx_device_spi0,
335 &crag6410_mmgpio,
336 &crag6410_lcd_powerdev,
337 &crag6410_backlight_device,
338 &speyside_device,
339 &speyside_wm8962_device,
340 &wallvdd_device,
341 };
342
343 static struct pca953x_platform_data crag6410_pca_data = {
344 .gpio_base = PCA935X_GPIO_BASE,
345 .irq_base = 0,
346 };
347
348 /* VDDARM is controlled by DVS1 connected to GPK(0) */
349 static struct wm831x_buckv_pdata vddarm_pdata = {
350 .dvs_control_src = 1,
351 .dvs_gpio = S3C64XX_GPK(0),
352 };
353
354 static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
355 REGULATOR_SUPPLY("vddarm", NULL),
356 };
357
358 static struct regulator_init_data vddarm __initdata = {
359 .constraints = {
360 .name = "VDDARM",
361 .min_uV = 1000000,
362 .max_uV = 1300000,
363 .always_on = 1,
364 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
365 },
366 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
367 .consumer_supplies = vddarm_consumers,
368 .supply_regulator = "WALLVDD",
369 .driver_data = &vddarm_pdata,
370 };
371
372 static struct regulator_init_data vddint __initdata = {
373 .constraints = {
374 .name = "VDDINT",
375 .min_uV = 1000000,
376 .max_uV = 1200000,
377 .always_on = 1,
378 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
379 },
380 };
381
382 static struct regulator_init_data vddmem __initdata = {
383 .constraints = {
384 .name = "VDDMEM",
385 .always_on = 1,
386 },
387 };
388
389 static struct regulator_init_data vddsys __initdata = {
390 .constraints = {
391 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
392 .always_on = 1,
393 },
394 };
395
396 static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
397 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
398 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
399 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
400 };
401
402 static struct regulator_init_data vddmmc __initdata = {
403 .constraints = {
404 .name = "VDDMMC,UH",
405 .always_on = 1,
406 },
407 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
408 .consumer_supplies = vddmmc_consumers,
409 .supply_regulator = "WALLVDD",
410 };
411
412 static struct regulator_init_data vddotgi __initdata = {
413 .constraints = {
414 .name = "VDDOTGi",
415 .always_on = 1,
416 },
417 .supply_regulator = "WALLVDD",
418 };
419
420 static struct regulator_init_data vddotg __initdata = {
421 .constraints = {
422 .name = "VDDOTG",
423 .always_on = 1,
424 },
425 .supply_regulator = "WALLVDD",
426 };
427
428 static struct regulator_init_data vddhi __initdata = {
429 .constraints = {
430 .name = "VDDHI",
431 .always_on = 1,
432 },
433 .supply_regulator = "WALLVDD",
434 };
435
436 static struct regulator_init_data vddadc __initdata = {
437 .constraints = {
438 .name = "VDDADC,VDDDAC",
439 .always_on = 1,
440 },
441 .supply_regulator = "WALLVDD",
442 };
443
444 static struct regulator_init_data vddmem0 __initdata = {
445 .constraints = {
446 .name = "VDDMEM0",
447 .always_on = 1,
448 },
449 .supply_regulator = "WALLVDD",
450 };
451
452 static struct regulator_init_data vddpll __initdata = {
453 .constraints = {
454 .name = "VDDPLL",
455 .always_on = 1,
456 },
457 .supply_regulator = "WALLVDD",
458 };
459
460 static struct regulator_init_data vddlcd __initdata = {
461 .constraints = {
462 .name = "VDDLCD",
463 .always_on = 1,
464 },
465 .supply_regulator = "WALLVDD",
466 };
467
468 static struct regulator_init_data vddalive __initdata = {
469 .constraints = {
470 .name = "VDDALIVE",
471 .always_on = 1,
472 },
473 .supply_regulator = "WALLVDD",
474 };
475
476 static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
477 .charger_enable = 1,
478 .vlim = 2500, /* mV */
479 .ilim = 200, /* uA */
480 };
481
482 static struct wm831x_status_pdata banff_red_led __initdata = {
483 .name = "banff:red:",
484 .default_src = WM831X_STATUS_MANUAL,
485 };
486
487 static struct wm831x_status_pdata banff_green_led __initdata = {
488 .name = "banff:green:",
489 .default_src = WM831X_STATUS_MANUAL,
490 };
491
492 static struct wm831x_touch_pdata touch_pdata __initdata = {
493 .data_irq = S3C_EINT(26),
494 .pd_irq = S3C_EINT(27),
495 };
496
497 static struct wm831x_pdata crag_pmic_pdata __initdata = {
498 .wm831x_num = 1,
499 .irq_base = BANFF_PMIC_IRQ_BASE,
500 .gpio_base = GPIO_BOARD_START + 8,
501
502 .backup = &banff_backup_pdata,
503
504 .gpio_defaults = {
505 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
506 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
507 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
508 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
509 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
510 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
511 },
512
513 .dcdc = {
514 &vddarm, /* DCDC1 */
515 &vddint, /* DCDC2 */
516 &vddmem, /* DCDC3 */
517 },
518
519 .ldo = {
520 &vddsys, /* LDO1 */
521 &vddmmc, /* LDO2 */
522 NULL, /* LDO3 */
523 &vddotgi, /* LDO4 */
524 &vddotg, /* LDO5 */
525 &vddhi, /* LDO6 */
526 &vddadc, /* LDO7 */
527 &vddmem0, /* LDO8 */
528 &vddpll, /* LDO9 */
529 &vddlcd, /* LDO10 */
530 &vddalive, /* LDO11 */
531 },
532
533 .status = {
534 &banff_green_led,
535 &banff_red_led,
536 },
537
538 .touch = &touch_pdata,
539 };
540
541 static struct i2c_board_info i2c_devs0[] __initdata = {
542 { I2C_BOARD_INFO("24c08", 0x50), },
543 { I2C_BOARD_INFO("tca6408", 0x20),
544 .platform_data = &crag6410_pca_data,
545 },
546 { I2C_BOARD_INFO("wm8312", 0x34),
547 .platform_data = &crag_pmic_pdata,
548 .irq = S3C_EINT(23),
549 },
550 };
551
552 static struct s3c2410_platform_i2c i2c0_pdata = {
553 .frequency = 400000,
554 };
555
556 static struct regulator_init_data pvdd_1v2 __initdata = {
557 .constraints = {
558 .name = "PVDD_1V2",
559 .always_on = 1,
560 },
561 };
562
563 static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
564 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
565 REGULATOR_SUPPLY("DBVDD", "1-001a"),
566 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
567 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
568 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
569 REGULATOR_SUPPLY("CPVDD", "1-001a"),
570 REGULATOR_SUPPLY("AVDD2", "1-001a"),
571 REGULATOR_SUPPLY("DCVDD", "1-001a"),
572 REGULATOR_SUPPLY("AVDD", "1-001a"),
573 };
574
575 static struct regulator_init_data pvdd_1v8 __initdata = {
576 .constraints = {
577 .name = "PVDD_1V8",
578 .always_on = 1,
579 },
580
581 .consumer_supplies = pvdd_1v8_consumers,
582 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
583 };
584
585 static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
586 REGULATOR_SUPPLY("MICVDD", "1-001a"),
587 REGULATOR_SUPPLY("AVDD1", "1-001a"),
588 };
589
590 static struct regulator_init_data pvdd_3v3 __initdata = {
591 .constraints = {
592 .name = "PVDD_3V3",
593 .always_on = 1,
594 },
595
596 .consumer_supplies = pvdd_3v3_consumers,
597 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
598 };
599
600 static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
601 .wm831x_num = 2,
602 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
603 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
604
605 .gpio_defaults = {
606 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
607 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
608 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
609 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
610 },
611
612 .dcdc = {
613 &pvdd_1v2, /* DCDC1 */
614 &pvdd_1v8, /* DCDC2 */
615 &pvdd_3v3, /* DCDC3 */
616 },
617
618 .disable_touch = true,
619 };
620
621 static struct i2c_board_info i2c_devs1[] __initdata = {
622 { I2C_BOARD_INFO("wm8311", 0x34),
623 .irq = S3C_EINT(0),
624 .platform_data = &glenfarclas_pmic_pdata },
625
626 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
627 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
628 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
629
630 { I2C_BOARD_INFO("wm1250-ev1", 0x27) },
631 };
632
633 static void __init crag6410_map_io(void)
634 {
635 s3c64xx_init_io(NULL, 0);
636 s3c24xx_init_clocks(12000000);
637 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
638
639 /* LCD type and Bypass set by bootloader */
640 }
641
642 static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
643 .max_width = 4,
644 .cd_type = S3C_SDHCI_CD_PERMANENT,
645 };
646
647 static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
648 .max_width = 4,
649 .cd_type = S3C_SDHCI_CD_GPIO,
650 .ext_cd_gpio = S3C64XX_GPF(11),
651 };
652
653 static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
654 {
655 /* Set all the necessary GPG pins to special-function 2 */
656 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
657
658 /* force card-detected for prototype 0 */
659 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
660 }
661
662 static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
663 .max_width = 4,
664 .cd_type = S3C_SDHCI_CD_INTERNAL,
665 .cfg_gpio = crag6410_cfg_sdhci0,
666 };
667
668 static void __init crag6410_machine_init(void)
669 {
670 /* Open drain IRQs need pullups */
671 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
672 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
673
674 gpio_request(S3C64XX_GPB(0), "LCD power");
675 gpio_direction_output(S3C64XX_GPB(0), 0);
676
677 gpio_request(S3C64XX_GPF(14), "LCD PWM");
678 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
679
680 gpio_request(S3C64XX_GPB(1), "SD power");
681 gpio_direction_output(S3C64XX_GPB(1), 0);
682
683 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
684 gpio_direction_output(S3C64XX_GPF(10), 1);
685
686 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
687 s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
688 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
689
690 s3c_i2c0_set_platdata(&i2c0_pdata);
691 s3c_i2c1_set_platdata(NULL);
692 s3c_fb_set_platdata(&crag6410_lcd_pdata);
693
694 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
695 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
696
697 samsung_keypad_set_platdata(&crag6410_keypad_data);
698
699 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
700
701 regulator_has_full_constraints();
702
703 s3c_pm_init();
704 }
705
706 MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
707 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
708 .boot_params = S3C64XX_PA_SDRAM + 0x100,
709 .init_irq = s3c6410_init_irq,
710 .map_io = crag6410_map_io,
711 .init_machine = crag6410_machine_init,
712 .timer = &s3c24xx_timer,
713 MACHINE_END
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