Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[deliverable/linux.git] / arch / arm / mach-s3c64xx / mach-real6410.c
1 /* linux/arch/arm/mach-s3c64xx/mach-real6410.c
2 *
3 * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/fb.h>
18 #include <linux/gpio.h>
19 #include <linux/kernel.h>
20 #include <linux/list.h>
21 #include <linux/dm9000.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/platform_device.h>
25 #include <linux/serial_core.h>
26 #include <linux/types.h>
27
28 #include <asm/mach-types.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/map.h>
31
32 #include <mach/map.h>
33 #include <mach/regs-gpio.h>
34
35 #include <plat/adc.h>
36 #include <plat/cpu.h>
37 #include <plat/devs.h>
38 #include <plat/fb.h>
39 #include <linux/platform_data/mtd-nand-s3c2410.h>
40 #include <plat/regs-serial.h>
41 #include <linux/platform_data/touchscreen-s3c2410.h>
42
43 #include <video/platform_lcd.h>
44 #include <video/samsung_fimd.h>
45
46 #include "common.h"
47 #include "regs-modem.h"
48 #include "regs-srom.h"
49
50 #define UCON S3C2410_UCON_DEFAULT
51 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
52 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
53
54 static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
55 [0] = {
56 .hwport = 0,
57 .flags = 0,
58 .ucon = UCON,
59 .ulcon = ULCON,
60 .ufcon = UFCON,
61 },
62 [1] = {
63 .hwport = 1,
64 .flags = 0,
65 .ucon = UCON,
66 .ulcon = ULCON,
67 .ufcon = UFCON,
68 },
69 [2] = {
70 .hwport = 2,
71 .flags = 0,
72 .ucon = UCON,
73 .ulcon = ULCON,
74 .ufcon = UFCON,
75 },
76 [3] = {
77 .hwport = 3,
78 .flags = 0,
79 .ucon = UCON,
80 .ulcon = ULCON,
81 .ufcon = UFCON,
82 },
83 };
84
85 /* DM9000AEP 10/100 ethernet controller */
86
87 static struct resource real6410_dm9k_resource[] = {
88 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),
89 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
90 [2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \
91 | IORESOURCE_IRQ_HIGHLEVEL),
92 };
93
94 static struct dm9000_plat_data real6410_dm9k_pdata = {
95 .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
96 };
97
98 static struct platform_device real6410_device_eth = {
99 .name = "dm9000",
100 .id = -1,
101 .num_resources = ARRAY_SIZE(real6410_dm9k_resource),
102 .resource = real6410_dm9k_resource,
103 .dev = {
104 .platform_data = &real6410_dm9k_pdata,
105 },
106 };
107
108 static struct s3c_fb_pd_win real6410_lcd_type0_fb_win = {
109 .max_bpp = 32,
110 .default_bpp = 16,
111 .xres = 480,
112 .yres = 272,
113 };
114
115 static struct fb_videomode real6410_lcd_type0_timing = {
116 /* 4.3" 480x272 */
117 .left_margin = 3,
118 .right_margin = 2,
119 .upper_margin = 1,
120 .lower_margin = 1,
121 .hsync_len = 40,
122 .vsync_len = 1,
123 };
124
125 static struct s3c_fb_pd_win real6410_lcd_type1_fb_win = {
126 .max_bpp = 32,
127 .default_bpp = 16,
128 .xres = 800,
129 .yres = 480,
130 };
131
132 static struct fb_videomode real6410_lcd_type1_timing = {
133 /* 7.0" 800x480 */
134 .left_margin = 8,
135 .right_margin = 13,
136 .upper_margin = 7,
137 .lower_margin = 5,
138 .hsync_len = 3,
139 .vsync_len = 1,
140 .xres = 800,
141 .yres = 480,
142 };
143
144 static struct s3c_fb_platdata real6410_lcd_pdata[] __initdata = {
145 {
146 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
147 .vtiming = &real6410_lcd_type0_timing,
148 .win[0] = &real6410_lcd_type0_fb_win,
149 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
150 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
151 }, {
152 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
153 .vtiming = &real6410_lcd_type1_timing,
154 .win[0] = &real6410_lcd_type1_fb_win,
155 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
156 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
157 },
158 { },
159 };
160
161 static struct mtd_partition real6410_nand_part[] = {
162 [0] = {
163 .name = "uboot",
164 .size = SZ_1M,
165 .offset = 0,
166 },
167 [1] = {
168 .name = "kernel",
169 .size = SZ_2M,
170 .offset = SZ_1M,
171 },
172 [2] = {
173 .name = "rootfs",
174 .size = MTDPART_SIZ_FULL,
175 .offset = SZ_1M + SZ_2M,
176 },
177 };
178
179 static struct s3c2410_nand_set real6410_nand_sets[] = {
180 [0] = {
181 .name = "nand",
182 .nr_chips = 1,
183 .nr_partitions = ARRAY_SIZE(real6410_nand_part),
184 .partitions = real6410_nand_part,
185 },
186 };
187
188 static struct s3c2410_platform_nand real6410_nand_info = {
189 .tacls = 25,
190 .twrph0 = 55,
191 .twrph1 = 40,
192 .nr_sets = ARRAY_SIZE(real6410_nand_sets),
193 .sets = real6410_nand_sets,
194 };
195
196 static struct platform_device *real6410_devices[] __initdata = {
197 &real6410_device_eth,
198 &s3c_device_hsmmc0,
199 &s3c_device_hsmmc1,
200 &s3c_device_fb,
201 &s3c_device_nand,
202 &s3c_device_adc,
203 &s3c_device_ts,
204 &s3c_device_ohci,
205 };
206
207 static void __init real6410_map_io(void)
208 {
209 u32 tmp;
210
211 s3c64xx_init_io(NULL, 0);
212 s3c24xx_init_clocks(12000000);
213 s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs));
214
215 /* set the LCD type */
216 tmp = __raw_readl(S3C64XX_SPCON);
217 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
218 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
219 __raw_writel(tmp, S3C64XX_SPCON);
220
221 /* remove the LCD bypass */
222 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
223 tmp &= ~MIFPCON_LCD_BYPASS;
224 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
225 }
226
227 /*
228 * real6410_features string
229 *
230 * 0-9 LCD configuration
231 *
232 */
233 static char real6410_features_str[12] __initdata = "0";
234
235 static int __init real6410_features_setup(char *str)
236 {
237 if (str)
238 strlcpy(real6410_features_str, str,
239 sizeof(real6410_features_str));
240 return 1;
241 }
242
243 __setup("real6410=", real6410_features_setup);
244
245 #define FEATURE_SCREEN (1 << 0)
246
247 struct real6410_features_t {
248 int done;
249 int lcd_index;
250 };
251
252 static void real6410_parse_features(
253 struct real6410_features_t *features,
254 const char *features_str)
255 {
256 const char *fp = features_str;
257
258 features->done = 0;
259 features->lcd_index = 0;
260
261 while (*fp) {
262 char f = *fp++;
263
264 switch (f) {
265 case '0'...'9': /* tft screen */
266 if (features->done & FEATURE_SCREEN) {
267 printk(KERN_INFO "REAL6410: '%c' ignored, "
268 "screen type already set\n", f);
269 } else {
270 int li = f - '0';
271 if (li >= ARRAY_SIZE(real6410_lcd_pdata))
272 printk(KERN_INFO "REAL6410: '%c' out "
273 "of range LCD mode\n", f);
274 else {
275 features->lcd_index = li;
276 }
277 }
278 features->done |= FEATURE_SCREEN;
279 break;
280 }
281 }
282 }
283
284 static void __init real6410_machine_init(void)
285 {
286 u32 cs1;
287 struct real6410_features_t features = { 0 };
288
289 printk(KERN_INFO "REAL6410: Option string real6410=%s\n",
290 real6410_features_str);
291
292 /* Parse the feature string */
293 real6410_parse_features(&features, real6410_features_str);
294
295 printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n",
296 real6410_lcd_pdata[features.lcd_index].win[0]->xres,
297 real6410_lcd_pdata[features.lcd_index].win[0]->yres);
298
299 s3c_fb_set_platdata(&real6410_lcd_pdata[features.lcd_index]);
300 s3c_nand_set_platdata(&real6410_nand_info);
301 s3c24xx_ts_set_platdata(NULL);
302
303 /* configure nCS1 width to 16 bits */
304
305 cs1 = __raw_readl(S3C64XX_SROM_BW) &
306 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
307 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
308 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
309 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
310 S3C64XX_SROM_BW__NCS1__SHIFT;
311 __raw_writel(cs1, S3C64XX_SROM_BW);
312
313 /* set timing for nCS1 suitable for ethernet chip */
314
315 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
316 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
317 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
318 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
319 (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
320 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
321 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
322
323 gpio_request(S3C64XX_GPF(15), "LCD power");
324
325 platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices));
326 }
327
328 MACHINE_START(REAL6410, "REAL6410")
329 /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
330 .atag_offset = 0x100,
331
332 .init_irq = s3c6410_init_irq,
333 .map_io = real6410_map_io,
334 .init_machine = real6410_machine_init,
335 .init_late = s3c64xx_init_late,
336 .init_time = s3c24xx_timer_init,
337 .restart = s3c64xx_restart,
338 MACHINE_END
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