arch/arm/mach-s5p6440/include/mach/map.h

   1 /* linux/arch/arm/mach-s5p6440/include/mach/map.h
   2  *
   3  * Copyright (c) 2009 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com/
   5  *
   6  * S5P6440 - Memory map definitions
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #ifndef __ASM_ARCH_MAP_H
  14 #define __ASM_ARCH_MAP_H __FILE__
  15
  16 #include <plat/map-base.h>
  17
  18 /* Chip ID */
  19 #define S5P6440_PA_CHIPID       (0xE0000000)
  20 #define S5P_PA_CHIPID           S5P6440_PA_CHIPID
  21 #define S5P_VA_CHIPID           S3C_ADDR(0x00700000)
  22
  23 /* SYSCON */
  24 #define S5P6440_PA_SYSCON       (0xE0100000)
  25 #define S5P_PA_SYSCON           S5P6440_PA_SYSCON
  26 #define S5P_VA_SYSCON           S3C_VA_SYS
  27
  28 #define S5P6440_PA_CLK          (S5P6440_PA_SYSCON + 0x0)
  29 #define S5P_PA_CLK              S5P6440_PA_CLK
  30 #define S5P_VA_CLK              (S5P_VA_SYSCON + 0x0)
  31
  32 /* GPIO */
  33 #define S5P6440_PA_GPIO         (0xE0308000)
  34 #define S5P_PA_GPIO             S5P6440_PA_GPIO
  35 #define S5P_VA_GPIO             S3C_ADDR(0x00500000)
  36
  37 /* VIC0 */
  38 #define S5P6440_PA_VIC0         (0xE4000000)
  39 #define S5P_PA_VIC0             S5P6440_PA_VIC0
  40 #define S5P_VA_VIC0             (S3C_VA_IRQ + 0x0)
  41 #define VA_VIC0                 S5P_VA_VIC0
  42
  43 /* VIC1 */
  44 #define S5P6440_PA_VIC1         (0xE4100000)
  45 #define S5P_PA_VIC1             S5P6440_PA_VIC1
  46 #define S5P_VA_VIC1             (S3C_VA_IRQ + 0x10000)
  47 #define VA_VIC1                 S5P_VA_VIC1
  48
  49 /* Timer */
  50 #define S5P6440_PA_TIMER        (0xEA000000)
  51 #define S5P_PA_TIMER            S5P6440_PA_TIMER
  52 #define S5P_VA_TIMER            S3C_VA_TIMER
  53
  54 /* RTC */
  55 #define S5P6440_PA_RTC          (0xEA100000)
  56 #define S5P_PA_RTC              S5P6440_PA_RTC
  57 #define S5P_VA_RTC              S3C_ADDR(0x00600000)
  58
  59 /* WDT */
  60 #define S5P6440_PA_WDT          (0xEA200000)
  61 #define S5P_PA_WDT              S5P6440_PA_WDT
  62 #define S5p_VA_WDT              S3C_VA_WATCHDOG
  63
  64 /* UART */
  65 #define S5P6440_PA_UART         (0xEC000000)
  66 #define S5P_PA_UART             S5P6440_PA_UART
  67 #define S5P_VA_UART             S3C_VA_UART
  68
  69 #define S5P_PA_UART0            (S5P_PA_UART + 0x0)
  70 #define S5P_PA_UART1            (S5P_PA_UART + 0x400)
  71 #define S5P_PA_UART2            (S5P_PA_UART + 0x800)
  72 #define S5P_PA_UART3            (S5P_PA_UART + 0xC00)
  73 #define S5P_UART_OFFSET         (0x400)
  74
  75 #define S5P_VA_UARTx(x)         (S5P_VA_UART + (S5P_PA_UART & 0xfffff) \
  76                                 + ((x) * S5P_UART_OFFSET))
  77
  78 #define S5P_VA_UART0            S5P_VA_UARTx(0)
  79 #define S5P_VA_UART1            S5P_VA_UARTx(1)
  80 #define S5P_VA_UART2            S5P_VA_UARTx(2)
  81 #define S5P_VA_UART3            S5P_VA_UARTx(3)
  82 #define S5P_SZ_UART             SZ_256
  83
  84 /* I2C */
  85 #define S5P6440_PA_IIC0         (0xEC104000)
  86 #define S5P_PA_IIC0             S5P6440_PA_IIC0
  87 #define S5p_VA_IIC0             S3C_ADDR(0x00700000)
  88
  89 /* SDRAM */
  90 #define S5P6440_PA_SDRAM        (0x20000000)
  91 #define S5P_PA_SDRAM            S5P6440_PA_SDRAM
  92
  93 /* compatibiltiy defines. */
  94 #define S3C_PA_UART             S5P_PA_UART
  95 #define S3C_UART_OFFSET         S5P_UART_OFFSET
  96 #define S3C_PA_TIMER            S5P_PA_TIMER
  97 #define S3C_PA_IIC              S5P_PA_IIC0
  98
  99 #endif /* __ASM_ARCH_MAP_H */