arch/arm/mach-s5pv210/dma.c

   1 /* linux/arch/arm/mach-s5pv210/dma.c
   2  *
   3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * Copyright (C) 2010 Samsung Electronics Co. Ltd.
   7  *      Jaswinder Singh <jassi.brar@samsung.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  */
  23
  24 #include <linux/dma-mapping.h>
  25 #include <linux/amba/bus.h>
  26 #include <linux/amba/pl330.h>
  27
  28 #include <asm/irq.h>
  29 #include <plat/devs.h>
  30 #include <plat/irqs.h>
  31
  32 #include <mach/map.h>
  33 #include <mach/irqs.h>
  34 #include <mach/dma.h>
  35
  36 static u64 dma_dmamask = DMA_BIT_MASK(32);
  37
  38 struct dma_pl330_peri pdma0_peri[28] = {
  39         {
  40                 .peri_id = (u8)DMACH_UART0_RX,
  41                 .rqtype = DEVTOMEM,
  42         }, {
  43                 .peri_id = (u8)DMACH_UART0_TX,
  44                 .rqtype = MEMTODEV,
  45         }, {
  46                 .peri_id = (u8)DMACH_UART1_RX,
  47                 .rqtype = DEVTOMEM,
  48         }, {
  49                 .peri_id = (u8)DMACH_UART1_TX,
  50                 .rqtype = MEMTODEV,
  51         }, {
  52                 .peri_id = (u8)DMACH_UART2_RX,
  53                 .rqtype = DEVTOMEM,
  54         }, {
  55                 .peri_id = (u8)DMACH_UART2_TX,
  56                 .rqtype = MEMTODEV,
  57         }, {
  58                 .peri_id = (u8)DMACH_UART3_RX,
  59                 .rqtype = DEVTOMEM,
  60         }, {
  61                 .peri_id = (u8)DMACH_UART3_TX,
  62                 .rqtype = MEMTODEV,
  63         }, {
  64                 .peri_id = DMACH_MAX,
  65         }, {
  66                 .peri_id = (u8)DMACH_I2S0_RX,
  67                 .rqtype = DEVTOMEM,
  68         }, {
  69                 .peri_id = (u8)DMACH_I2S0_TX,
  70                 .rqtype = MEMTODEV,
  71         }, {
  72                 .peri_id = (u8)DMACH_I2S0S_TX,
  73                 .rqtype = MEMTODEV,
  74         }, {
  75                 .peri_id = (u8)DMACH_I2S1_RX,
  76                 .rqtype = DEVTOMEM,
  77         }, {
  78                 .peri_id = (u8)DMACH_I2S1_TX,
  79                 .rqtype = MEMTODEV,
  80         }, {
  81                 .peri_id = (u8)DMACH_MAX,
  82         }, {
  83                 .peri_id = (u8)DMACH_MAX,
  84         }, {
  85                 .peri_id = (u8)DMACH_SPI0_RX,
  86                 .rqtype = DEVTOMEM,
  87         }, {
  88                 .peri_id = (u8)DMACH_SPI0_TX,
  89                 .rqtype = MEMTODEV,
  90         }, {
  91                 .peri_id = (u8)DMACH_SPI1_RX,
  92                 .rqtype = DEVTOMEM,
  93         }, {
  94                 .peri_id = (u8)DMACH_SPI1_TX,
  95                 .rqtype = MEMTODEV,
  96         }, {
  97                 .peri_id = (u8)DMACH_MAX,
  98         }, {
  99                 .peri_id = (u8)DMACH_MAX,
 100         }, {
 101                 .peri_id = (u8)DMACH_AC97_MICIN,
 102                 .rqtype = DEVTOMEM,
 103         }, {
 104                 .peri_id = (u8)DMACH_AC97_PCMIN,
 105                 .rqtype = DEVTOMEM,
 106         }, {
 107                 .peri_id = (u8)DMACH_AC97_PCMOUT,
 108                 .rqtype = MEMTODEV,
 109         }, {
 110                 .peri_id = (u8)DMACH_MAX,
 111         }, {
 112                 .peri_id = (u8)DMACH_PWM,
 113         }, {
 114                 .peri_id = (u8)DMACH_SPDIF,
 115                 .rqtype = MEMTODEV,
 116         },
 117 };
 118
 119 struct dma_pl330_platdata s5pv210_pdma0_pdata = {
 120         .nr_valid_peri = ARRAY_SIZE(pdma0_peri),
 121         .peri = pdma0_peri,
 122 };
 123
 124 struct amba_device s5pv210_device_pdma0 = {
 125         .dev = {
 126                 .init_name = "dma-pl330.0",
 127                 .dma_mask = &dma_dmamask,
 128                 .coherent_dma_mask = DMA_BIT_MASK(32),
 129                 .platform_data = &s5pv210_pdma0_pdata,
 130         },
 131         .res = {
 132                 .start = S5PV210_PA_PDMA0,
 133                 .end = S5PV210_PA_PDMA0 + SZ_4K,
 134                 .flags = IORESOURCE_MEM,
 135         },
 136         .irq = {IRQ_PDMA0, NO_IRQ},
 137         .periphid = 0x00041330,
 138 };
 139
 140 struct dma_pl330_peri pdma1_peri[32] = {
 141         {
 142                 .peri_id = (u8)DMACH_UART0_RX,
 143                 .rqtype = DEVTOMEM,
 144         }, {
 145                 .peri_id = (u8)DMACH_UART0_TX,
 146                 .rqtype = MEMTODEV,
 147         }, {
 148                 .peri_id = (u8)DMACH_UART1_RX,
 149                 .rqtype = DEVTOMEM,
 150         }, {
 151                 .peri_id = (u8)DMACH_UART1_TX,
 152                 .rqtype = MEMTODEV,
 153         }, {
 154                 .peri_id = (u8)DMACH_UART2_RX,
 155                 .rqtype = DEVTOMEM,
 156         }, {
 157                 .peri_id = (u8)DMACH_UART2_TX,
 158                 .rqtype = MEMTODEV,
 159         }, {
 160                 .peri_id = (u8)DMACH_UART3_RX,
 161                 .rqtype = DEVTOMEM,
 162         }, {
 163                 .peri_id = (u8)DMACH_UART3_TX,
 164                 .rqtype = MEMTODEV,
 165         }, {
 166                 .peri_id = DMACH_MAX,
 167         }, {
 168                 .peri_id = (u8)DMACH_I2S0_RX,
 169                 .rqtype = DEVTOMEM,
 170         }, {
 171                 .peri_id = (u8)DMACH_I2S0_TX,
 172                 .rqtype = MEMTODEV,
 173         }, {
 174                 .peri_id = (u8)DMACH_I2S0S_TX,
 175                 .rqtype = MEMTODEV,
 176         }, {
 177                 .peri_id = (u8)DMACH_I2S1_RX,
 178                 .rqtype = DEVTOMEM,
 179         }, {
 180                 .peri_id = (u8)DMACH_I2S1_TX,
 181                 .rqtype = MEMTODEV,
 182         }, {
 183                 .peri_id = (u8)DMACH_I2S2_RX,
 184                 .rqtype = DEVTOMEM,
 185         }, {
 186                 .peri_id = (u8)DMACH_I2S2_TX,
 187                 .rqtype = MEMTODEV,
 188         }, {
 189                 .peri_id = (u8)DMACH_SPI0_RX,
 190                 .rqtype = DEVTOMEM,
 191         }, {
 192                 .peri_id = (u8)DMACH_SPI0_TX,
 193                 .rqtype = MEMTODEV,
 194         }, {
 195                 .peri_id = (u8)DMACH_SPI1_RX,
 196                 .rqtype = DEVTOMEM,
 197         }, {
 198                 .peri_id = (u8)DMACH_SPI1_TX,
 199                 .rqtype = MEMTODEV,
 200         }, {
 201                 .peri_id = (u8)DMACH_MAX,
 202         }, {
 203                 .peri_id = (u8)DMACH_MAX,
 204         }, {
 205                 .peri_id = (u8)DMACH_PCM0_RX,
 206                 .rqtype = DEVTOMEM,
 207         }, {
 208                 .peri_id = (u8)DMACH_PCM0_TX,
 209                 .rqtype = MEMTODEV,
 210         }, {
 211                 .peri_id = (u8)DMACH_PCM1_RX,
 212                 .rqtype = DEVTOMEM,
 213         }, {
 214                 .peri_id = (u8)DMACH_PCM1_TX,
 215                 .rqtype = MEMTODEV,
 216         }, {
 217                 .peri_id = (u8)DMACH_MSM_REQ0,
 218         }, {
 219                 .peri_id = (u8)DMACH_MSM_REQ1,
 220         }, {
 221                 .peri_id = (u8)DMACH_MSM_REQ2,
 222         }, {
 223                 .peri_id = (u8)DMACH_MSM_REQ3,
 224         }, {
 225                 .peri_id = (u8)DMACH_PCM2_RX,
 226                 .rqtype = DEVTOMEM,
 227         }, {
 228                 .peri_id = (u8)DMACH_PCM2_TX,
 229                 .rqtype = MEMTODEV,
 230         },
 231 };
 232
 233 struct dma_pl330_platdata s5pv210_pdma1_pdata = {
 234         .nr_valid_peri = ARRAY_SIZE(pdma1_peri),
 235         .peri = pdma1_peri,
 236 };
 237
 238 struct amba_device s5pv210_device_pdma1 = {
 239         .dev = {
 240                 .init_name = "dma-pl330.1",
 241                 .dma_mask = &dma_dmamask,
 242                 .coherent_dma_mask = DMA_BIT_MASK(32),
 243                 .platform_data = &s5pv210_pdma1_pdata,
 244         },
 245         .res = {
 246                 .start = S5PV210_PA_PDMA1,
 247                 .end = S5PV210_PA_PDMA1 + SZ_4K,
 248                 .flags = IORESOURCE_MEM,
 249         },
 250         .irq = {IRQ_PDMA1, NO_IRQ},
 251         .periphid = 0x00041330,
 252 };
 253
 254 static int __init s5pv210_dma_init(void)
 255 {
 256         amba_device_register(&s5pv210_device_pdma0, &iomem_resource);
 257         amba_device_register(&s5pv210_device_pdma1, &iomem_resource);
 258
 259         return 0;
 260 }
 261 arch_initcall(s5pv210_dma_init);