arch/arm/mach-sa1100/generic.c

   1 /*
   2  * linux/arch/arm/mach-sa1100/generic.c
   3  *
   4  * Author: Nicolas Pitre
   5  *
   6  * Code common to all SA11x0 machines.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 #include <linux/config.h>
  13 #include <linux/module.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/pm.h>
  18 #include <linux/cpufreq.h>
  19 #include <linux/ioport.h>
  20 #include <linux/platform_device.h>
  21
  22 #include <asm/div64.h>
  23 #include <asm/hardware.h>
  24 #include <asm/system.h>
  25 #include <asm/pgtable.h>
  26 #include <asm/mach/map.h>
  27 #include <asm/irq.h>
  28
  29 #include "generic.h"
  30
  31 #define NR_FREQS        16
  32
  33 /*
  34  * This table is setup for a 3.6864MHz Crystal.
  35  */
  36 static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
  37          590,   /*  59.0 MHz */
  38          737,   /*  73.7 MHz */
  39          885,   /*  88.5 MHz */
  40         1032,   /* 103.2 MHz */
  41         1180,   /* 118.0 MHz */
  42         1327,   /* 132.7 MHz */
  43         1475,   /* 147.5 MHz */
  44         1622,   /* 162.2 MHz */
  45         1769,   /* 176.9 MHz */
  46         1917,   /* 191.7 MHz */
  47         2064,   /* 206.4 MHz */
  48         2212,   /* 221.2 MHz */
  49         2359,   /* 235.9 MHz */
  50         2507,   /* 250.7 MHz */
  51         2654,   /* 265.4 MHz */
  52         2802    /* 280.2 MHz */
  53 };
  54
  55 #if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110)
  56 /* rounds up(!)  */
  57 unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
  58 {
  59         int i;
  60
  61         khz /= 100;
  62
  63         for (i = 0; i < NR_FREQS; i++)
  64                 if (cclk_frequency_100khz[i] >= khz)
  65                         break;
  66
  67         return i;
  68 }
  69
  70 unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
  71 {
  72         unsigned int freq = 0;
  73         if (idx < NR_FREQS)
  74                 freq = cclk_frequency_100khz[idx] * 100;
  75         return freq;
  76 }
  77
  78
  79 /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
  80  * this platform, anyway.
  81  */
  82 int sa11x0_verify_speed(struct cpufreq_policy *policy)
  83 {
  84         unsigned int tmp;
  85         if (policy->cpu)
  86                 return -EINVAL;
  87
  88         cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  89
  90         /* make sure that at least one frequency is within the policy */
  91         tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
  92         if (tmp > policy->max)
  93                 policy->max = tmp;
  94
  95         cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  96
  97         return 0;
  98 }
  99
 100 unsigned int sa11x0_getspeed(unsigned int cpu)
 101 {
 102         if (cpu)
 103                 return 0;
 104         return cclk_frequency_100khz[PPCR & 0xf] * 100;
 105 }
 106
 107 #else
 108 /*
 109  * We still need to provide this so building without cpufreq works.
 110  */
 111 unsigned int cpufreq_get(unsigned int cpu)
 112 {
 113         return cclk_frequency_100khz[PPCR & 0xf] * 100;
 114 }
 115 EXPORT_SYMBOL(cpufreq_get);
 116 #endif
 117
 118 /*
 119  * This is the SA11x0 sched_clock implementation.  This has
 120  * a resolution of 271ns, and a maximum value of 1165s.
 121  *  ( * 1E9 / 3686400 => * 78125 / 288)
 122  */
 123 unsigned long long sched_clock(void)
 124 {
 125         unsigned long long v;
 126
 127         v = (unsigned long long)OSCR * 78125;
 128         do_div(v, 288);
 129
 130         return v;
 131 }
 132
 133 /*
 134  * Default power-off for SA1100
 135  */
 136 static void sa1100_power_off(void)
 137 {
 138         mdelay(100);
 139         local_irq_disable();
 140         /* disable internal oscillator, float CS lines */
 141         PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
 142         /* enable wake-up on GPIO0 (Assabet...) */
 143         PWER = GFER = GRER = 1;
 144         /*
 145          * set scratchpad to zero, just in case it is used as a
 146          * restart address by the bootloader.
 147          */
 148         PSPR = 0;
 149         /* enter sleep mode */
 150         PMCR = PMCR_SF;
 151 }
 152
 153 static struct resource sa11x0udc_resources[] = {
 154         [0] = {
 155                 .start  = 0x80000000,
 156                 .end    = 0x8000ffff,
 157                 .flags  = IORESOURCE_MEM,
 158         },
 159 };
 160
 161 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
 162
 163 static struct platform_device sa11x0udc_device = {
 164         .name           = "sa11x0-udc",
 165         .id             = -1,
 166         .dev            = {
 167                 .dma_mask = &sa11x0udc_dma_mask,
 168                 .coherent_dma_mask = 0xffffffff,
 169         },
 170         .num_resources  = ARRAY_SIZE(sa11x0udc_resources),
 171         .resource       = sa11x0udc_resources,
 172 };
 173
 174 static struct resource sa11x0uart1_resources[] = {
 175         [0] = {
 176                 .start  = 0x80010000,
 177                 .end    = 0x8001ffff,
 178                 .flags  = IORESOURCE_MEM,
 179         },
 180 };
 181
 182 static struct platform_device sa11x0uart1_device = {
 183         .name           = "sa11x0-uart",
 184         .id             = 1,
 185         .num_resources  = ARRAY_SIZE(sa11x0uart1_resources),
 186         .resource       = sa11x0uart1_resources,
 187 };
 188
 189 static struct resource sa11x0uart3_resources[] = {
 190         [0] = {
 191                 .start  = 0x80050000,
 192                 .end    = 0x8005ffff,
 193                 .flags  = IORESOURCE_MEM,
 194         },
 195 };
 196
 197 static struct platform_device sa11x0uart3_device = {
 198         .name           = "sa11x0-uart",
 199         .id             = 3,
 200         .num_resources  = ARRAY_SIZE(sa11x0uart3_resources),
 201         .resource       = sa11x0uart3_resources,
 202 };
 203
 204 static struct resource sa11x0mcp_resources[] = {
 205         [0] = {
 206                 .start  = 0x80060000,
 207                 .end    = 0x8006ffff,
 208                 .flags  = IORESOURCE_MEM,
 209         },
 210 };
 211
 212 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
 213
 214 static struct platform_device sa11x0mcp_device = {
 215         .name           = "sa11x0-mcp",
 216         .id             = -1,
 217         .dev = {
 218                 .dma_mask = &sa11x0mcp_dma_mask,
 219                 .coherent_dma_mask = 0xffffffff,
 220         },
 221         .num_resources  = ARRAY_SIZE(sa11x0mcp_resources),
 222         .resource       = sa11x0mcp_resources,
 223 };
 224
 225 void sa11x0_set_mcp_data(struct mcp_plat_data *data)
 226 {
 227         sa11x0mcp_device.dev.platform_data = data;
 228 }
 229
 230 static struct resource sa11x0ssp_resources[] = {
 231         [0] = {
 232                 .start  = 0x80070000,
 233                 .end    = 0x8007ffff,
 234                 .flags  = IORESOURCE_MEM,
 235         },
 236 };
 237
 238 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
 239
 240 static struct platform_device sa11x0ssp_device = {
 241         .name           = "sa11x0-ssp",
 242         .id             = -1,
 243         .dev = {
 244                 .dma_mask = &sa11x0ssp_dma_mask,
 245                 .coherent_dma_mask = 0xffffffff,
 246         },
 247         .num_resources  = ARRAY_SIZE(sa11x0ssp_resources),
 248         .resource       = sa11x0ssp_resources,
 249 };
 250
 251 static struct resource sa11x0fb_resources[] = {
 252         [0] = {
 253                 .start  = 0xb0100000,
 254                 .end    = 0xb010ffff,
 255                 .flags  = IORESOURCE_MEM,
 256         },
 257         [1] = {
 258                 .start  = IRQ_LCD,
 259                 .end    = IRQ_LCD,
 260                 .flags  = IORESOURCE_IRQ,
 261         },
 262 };
 263
 264 static struct platform_device sa11x0fb_device = {
 265         .name           = "sa11x0-fb",
 266         .id             = -1,
 267         .dev = {
 268                 .coherent_dma_mask = 0xffffffff,
 269         },
 270         .num_resources  = ARRAY_SIZE(sa11x0fb_resources),
 271         .resource       = sa11x0fb_resources,
 272 };
 273
 274 static struct platform_device sa11x0pcmcia_device = {
 275         .name           = "sa11x0-pcmcia",
 276         .id             = -1,
 277 };
 278
 279 static struct platform_device sa11x0mtd_device = {
 280         .name           = "flash",
 281         .id             = -1,
 282 };
 283
 284 void sa11x0_set_flash_data(struct flash_platform_data *flash,
 285                            struct resource *res, int nr)
 286 {
 287         sa11x0mtd_device.dev.platform_data = flash;
 288         sa11x0mtd_device.resource = res;
 289         sa11x0mtd_device.num_resources = nr;
 290 }
 291
 292 static struct resource sa11x0ir_resources[] = {
 293         {
 294                 .start  = __PREG(Ser2UTCR0),
 295                 .end    = __PREG(Ser2UTCR0) + 0x24 - 1,
 296                 .flags  = IORESOURCE_MEM,
 297         }, {
 298                 .start  = __PREG(Ser2HSCR0),
 299                 .end    = __PREG(Ser2HSCR0) + 0x1c - 1,
 300                 .flags  = IORESOURCE_MEM,
 301         }, {
 302                 .start  = __PREG(Ser2HSCR2),
 303                 .end    = __PREG(Ser2HSCR2) + 0x04 - 1,
 304                 .flags  = IORESOURCE_MEM,
 305         }, {
 306                 .start  = IRQ_Ser2ICP,
 307                 .end    = IRQ_Ser2ICP,
 308                 .flags  = IORESOURCE_IRQ,
 309         }
 310 };
 311
 312 static struct platform_device sa11x0ir_device = {
 313         .name           = "sa11x0-ir",
 314         .id             = -1,
 315         .num_resources  = ARRAY_SIZE(sa11x0ir_resources),
 316         .resource       = sa11x0ir_resources,
 317 };
 318
 319 void sa11x0_set_irda_data(struct irda_platform_data *irda)
 320 {
 321         sa11x0ir_device.dev.platform_data = irda;
 322 }
 323
 324 static struct platform_device *sa11x0_devices[] __initdata = {
 325         &sa11x0udc_device,
 326         &sa11x0uart1_device,
 327         &sa11x0uart3_device,
 328         &sa11x0mcp_device,
 329         &sa11x0ssp_device,
 330         &sa11x0pcmcia_device,
 331         &sa11x0fb_device,
 332         &sa11x0mtd_device,
 333 };
 334
 335 static int __init sa1100_init(void)
 336 {
 337         pm_power_off = sa1100_power_off;
 338
 339         if (sa11x0ir_device.dev.platform_data)
 340                 platform_device_register(&sa11x0ir_device);
 341
 342         return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
 343 }
 344
 345 arch_initcall(sa1100_init);
 346
 347 void (*sa1100fb_backlight_power)(int on);
 348 void (*sa1100fb_lcd_power)(int on);
 349
 350 EXPORT_SYMBOL(sa1100fb_backlight_power);
 351 EXPORT_SYMBOL(sa1100fb_lcd_power);
 352
 353
 354 /*
 355  * Common I/O mapping:
 356  *
 357  * Typically, static virtual address mappings are as follow:
 358  *
 359  * 0xf0000000-0xf3ffffff:       miscellaneous stuff (CPLDs, etc.)
 360  * 0xf4000000-0xf4ffffff:       SA-1111
 361  * 0xf5000000-0xf5ffffff:       reserved (used by cache flushing area)
 362  * 0xf6000000-0xfffeffff:       reserved (internal SA1100 IO defined above)
 363  * 0xffff0000-0xffff0fff:       SA1100 exception vectors
 364  * 0xffff2000-0xffff2fff:       Minicache copy_user_page area
 365  *
 366  * Below 0xe8000000 is reserved for vm allocation.
 367  *
 368  * The machine specific code must provide the extra mapping beside the
 369  * default mapping provided here.
 370  */
 371
 372 static struct map_desc standard_io_desc[] __initdata = {
 373         {       /* PCM */
 374                 .virtual        =  0xf8000000,
 375                 .pfn            = __phys_to_pfn(0x80000000),
 376                 .length         = 0x00100000,
 377                 .type           = MT_DEVICE
 378         }, {    /* SCM */
 379                 .virtual        =  0xfa000000,
 380                 .pfn            = __phys_to_pfn(0x90000000),
 381                 .length         = 0x00100000,
 382                 .type           = MT_DEVICE
 383         }, {    /* MER */
 384                 .virtual        =  0xfc000000,
 385                 .pfn            = __phys_to_pfn(0xa0000000),
 386                 .length         = 0x00100000,
 387                 .type           = MT_DEVICE
 388         }, {    /* LCD + DMA */
 389                 .virtual        =  0xfe000000,
 390                 .pfn            = __phys_to_pfn(0xb0000000),
 391                 .length         = 0x00200000,
 392                 .type           = MT_DEVICE
 393         },
 394 };
 395
 396 void __init sa1100_map_io(void)
 397 {
 398         iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
 399 }
 400
 401 /*
 402  * Disable the memory bus request/grant signals on the SA1110 to
 403  * ensure that we don't receive spurious memory requests.  We set
 404  * the MBGNT signal false to ensure the SA1111 doesn't own the
 405  * SDRAM bus.
 406  */
 407 void __init sa1110_mb_disable(void)
 408 {
 409         unsigned long flags;
 410
 411         local_irq_save(flags);
 412
 413         PGSR &= ~GPIO_MBGNT;
 414         GPCR = GPIO_MBGNT;
 415         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 416
 417         GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
 418
 419         local_irq_restore(flags);
 420 }
 421
 422 /*
 423  * If the system is going to use the SA-1111 DMA engines, set up
 424  * the memory bus request/grant pins.
 425  */
 426 void __init sa1110_mb_enable(void)
 427 {
 428         unsigned long flags;
 429
 430         local_irq_save(flags);
 431
 432         PGSR &= ~GPIO_MBGNT;
 433         GPCR = GPIO_MBGNT;
 434         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 435
 436         GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
 437         TUCR |= TUCR_MR;
 438
 439         local_irq_restore(flags);
 440 }
 441